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r600g: enable thread offloading
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
0bbbd82488
commit
c79e9f0ed5
6 changed files with 17 additions and 16 deletions
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@ -117,9 +117,8 @@ static struct r600_fence *r600_create_fence(struct r600_pipe_context *ctx)
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}
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static void r600_flush(struct pipe_context *ctx,
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struct pipe_fence_handle **fence,
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unsigned flags)
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void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
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unsigned flags)
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{
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struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
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struct r600_fence **rfence = (struct r600_fence**)fence;
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@ -273,6 +273,11 @@ struct pipe_resource *r600_buffer_from_handle(struct pipe_screen *screen,
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struct winsys_handle *whandle);
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void r600_upload_index_buffer(struct r600_pipe_context *rctx, struct r600_drawl *draw);
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/* r600_pipe.c */
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void r600_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
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unsigned flags);
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/* r600_query.c */
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void r600_init_query_functions(struct r600_pipe_context *rctx);
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@ -66,7 +66,7 @@ static void r600_copy_from_staging_texture(struct pipe_context *ctx, struct r600
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rtransfer->staging_texture,
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0, &sbox);
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ctx->flush(ctx, NULL);
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r600_flush(ctx, NULL, RADEON_FLUSH_ASYNC);
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}
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unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
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@ -645,7 +645,7 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
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if (usage & PIPE_TRANSFER_READ) {
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r600_copy_to_staging_texture(ctx, trans);
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/* Always referenced in the blit. */
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ctx->flush(ctx, NULL);
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r600_flush(ctx, NULL, 0);
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}
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return &trans->transfer;
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}
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@ -1156,7 +1156,7 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr
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if ((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
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/* need to flush */
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r600_context_flush(ctx, 0);
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r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
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}
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/* at that point everythings is flushed and ctx->pm4_cdwords = 0 */
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if ((ctx->pm4_dirty_cdwords + ndwords) > ctx->pm4_ndwords) {
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@ -249,9 +249,6 @@ struct radeon *radeon_create(struct radeon_winsys *ws)
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if (radeon_drm_get_tiling(radeon))
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return NULL;
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/* XXX disable ioctl thread offloading until the porting is done. */
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setenv("RADEON_THREAD", "0", 0);
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return radeon;
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}
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@ -938,7 +938,7 @@ void r600_context_flush_all(struct r600_context *ctx, unsigned flush_flags)
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if ((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
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/* need to flush */
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r600_context_flush(ctx, 0);
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r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
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}
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ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_SURFACE_SYNC, 3, ctx->predicate_drawing);
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@ -1436,7 +1436,7 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
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if ((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
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/* need to flush */
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r600_context_flush(ctx, 0);
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r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
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}
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/* at that point everythings is flushed and ctx->pm4_cdwords = 0 */
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if ((ctx->pm4_dirty_cdwords + ndwords) > ctx->pm4_ndwords) {
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@ -1549,7 +1549,7 @@ void r600_context_emit_fence(struct r600_context *ctx, struct r600_bo *fence_bo,
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if ((ctx->pm4_dirty_cdwords + ndwords + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
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/* need to flush */
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r600_context_flush(ctx, 0);
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r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
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}
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ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE, 0, 0);
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@ -1611,7 +1611,7 @@ void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
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if ((required_space + ctx->pm4_cdwords) > ctx->pm4_ndwords) {
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/* need to flush */
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r600_context_flush(ctx, 0);
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r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
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}
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if (query->type == PIPE_QUERY_OCCLUSION_COUNTER) {
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@ -1622,7 +1622,7 @@ void r600_query_begin(struct r600_context *ctx, struct r600_query *query)
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query->queries_emitted = 1;
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} else {
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if (++query->queries_emitted > query->buffer_size / query->result_size / 2)
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r600_context_flush(ctx, 0);
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r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
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}
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}
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@ -1714,7 +1714,7 @@ void r600_query_predication(struct r600_context *ctx, struct r600_query *query,
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{
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if (operation == PREDICATION_OP_CLEAR) {
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if (ctx->pm4_cdwords + 3 > ctx->pm4_ndwords)
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r600_context_flush(ctx, 0);
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r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
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ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_SET_PREDICATION, 1, 0);
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ctx->pm4[ctx->pm4_cdwords++] = 0;
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@ -1730,7 +1730,7 @@ void r600_query_predication(struct r600_context *ctx, struct r600_query *query,
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count /= query->result_size;
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if (ctx->pm4_cdwords + 5 * count > ctx->pm4_ndwords)
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r600_context_flush(ctx, 0);
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r600_context_flush(ctx, RADEON_FLUSH_ASYNC);
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op = PRED_OP(operation) | PREDICATION_DRAW_VISIBLE |
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(flag_wait ? PREDICATION_HINT_WAIT : PREDICATION_HINT_NOWAIT_DRAW);
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