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brw: Refactor urb_read_length setting for TES

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We now calculate it when emitting push input loads at the NIR level,
rather than in the backend.

v2: Fix missing interaction with legacy tesslevel remapping

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41821>
This commit is contained in:
Kenneth Graunke 2026-03-19 14:48:27 -07:00 • committed by Marge Bot
parent 4dfa11a9d6
commit c798a9df1c
4 changed files with 17 additions and 14 deletions
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5
src/intel/compiler/brw/brw_compile_tes.cpp
View file

@ -108,7 +108,8 @@ brw_compile_tes(const struct brw_compiler *compiler,
key->base.vue_layout, pos_slots);
brw_nir_apply_key(pt, &key->base, dispatch_width);
brw_nir_lower_tes_inputs(nir, devinfo, &input_vue_map);
brw_nir_lower_tes_inputs(nir, devinfo, &input_vue_map,
&prog_data->base.urb_read_length);
brw_nir_lower_vue_outputs(nir);
BRW_NIR_SNAPSHOT("after_lower_io");
@ -135,8 +136,6 @@ brw_compile_tes(const struct brw_compiler *compiler,
/* URB entry sizes are stored as a multiple of 64 bytes. */
prog_data->base.urb_entry_size = align(output_size_bytes, 64) / 64;
prog_data->base.urb_read_length = 0;
brw_fill_tess_info_from_shader_info(&prog_data->tess_info,
&nir->info);

9
src/intel/compiler/brw/brw_from_nir.cpp
View file

@ -2954,15 +2954,6 @@ brw_from_nir_emit_tes_intrinsic(nir_to_brw_state &ntb,
bld.MOV(retype(dest, BRW_TYPE_UD), s.tes_payload().urb_output);
break;
case nir_intrinsic_load_attribute_payload_intel:
assert(instr->def.bit_size == 32);
tes_prog_data->base.urb_read_length =
MAX2(tes_prog_data->base.urb_read_length,
DIV_ROUND_UP(nir_src_as_uint(instr->src[0]) +
4 * instr->def.num_components, 32));
brw_from_nir_emit_intrinsic(ntb, bld, instr);
break;
case nir_intrinsic_load_tess_config_intel:
bld.MOV(retype(dest, BRW_TYPE_UD),
byte_offset(

11
src/intel/compiler/brw/brw_nir.c
View file

@ -463,6 +463,9 @@ try_load_push_input(nir_builder *b,
return &io->def;
}
*cb_data->push_input_read_length = MAX2(*cb_data->push_input_read_length,
DIV_ROUND_UP(byte_end_offset, 32));
return load_push_input(b, io, byte_offset);
}
@ -1293,7 +1296,8 @@ brw_nir_lower_gs_inputs(nir_shader *nir,
void
brw_nir_lower_tes_inputs(nir_shader *nir,
const struct intel_device_info *devinfo,
const struct intel_vue_map *vue_map)
const struct intel_vue_map *vue_map,
unsigned *out_urb_read_length)
{
NIR_PASS(_, nir, nir_lower_tess_level_array_vars_to_vec);
@ -1310,9 +1314,14 @@ brw_nir_lower_tes_inputs(nir_shader *nir,
NIR_PASS(_, nir, remap_tess_levels, devinfo,
nir->info.tess._primitive_mode);
*out_urb_read_length =
(nir->info.inputs_read & (VARYING_BIT_TESS_LEVEL_INNER |
VARYING_BIT_TESS_LEVEL_OUTER)) ? 1 : 0;
const struct brw_lower_urb_cb_data cb_data = {
.devinfo = devinfo,
.vec4_access = true,
.push_input_read_length = out_urb_read_length,
.max_push_bytes = 32 * 16, /* 32 vec4s */
.varying_to_slot = vue_map->varying_to_slot,
.per_vertex_stride = vue_map->num_per_vertex_slots * 16,

6
src/intel/compiler/brw/brw_nir.h
View file

@ -162,6 +162,9 @@ bool brw_nir_lower_fully_covered(nir_shader *nir);
struct brw_lower_urb_cb_data {
const struct intel_device_info *devinfo;
/** Input URB read length (returned by lowering) */
unsigned *push_input_read_length;
/** Maximum amount of pushed data in bytes */
unsigned max_push_bytes;
@ -223,7 +226,8 @@ void brw_nir_lower_gs_inputs(nir_shader *nir,
unsigned *out_urb_read_length);
void brw_nir_lower_tes_inputs(nir_shader *nir,
const struct intel_device_info *devinfo,
const struct intel_vue_map *vue);
const struct intel_vue_map *vue,
unsigned *out_urb_read_length);
void brw_nir_lower_fs_inputs(nir_shader *nir,
const struct intel_device_info *devinfo,
const struct brw_fs_prog_key *key);