winsys/radeon: Use separate caching buffer manager for each set of flags

Otherwise the caching buffer manager may return a buffer which was created
with a different set of flags, which can cause trouble.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit 3ede67a4c6)

Conflicts:
	src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
This commit is contained in:
Michel Dänzer 2014-10-08 16:34:46 +09:00 committed by Emil Velikov
parent b37c1d4642
commit c759d1b6bf
3 changed files with 31 additions and 38 deletions

View file

@ -811,17 +811,12 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
desc.flags = flags;
/* Assign a buffer manager. */
assert(flags < RADEON_NUM_CACHE_MANAGERS);
if (use_reusable_pool) {
if (domain == RADEON_DOMAIN_VRAM) {
if (flags & RADEON_FLAG_GTT_WC)
provider = ws->cman_vram_gtt_wc;
else
provider = ws->cman_vram;
} else if (flags & RADEON_FLAG_GTT_WC) {
provider = ws->cman_gtt_wc;
} else {
provider = ws->cman_gtt;
}
if (domain == RADEON_DOMAIN_VRAM)
provider = ws->cman_vram[flags];
else
provider = ws->cman_gtt[flags];
} else {
provider = ws->kman;
}

View file

@ -441,6 +441,7 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
static void radeon_winsys_destroy(struct radeon_winsys *rws)
{
struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
int i;
if (ws->thread) {
ws->kill_thread = 1;
@ -453,10 +454,10 @@ static void radeon_winsys_destroy(struct radeon_winsys *rws)
pipe_mutex_destroy(ws->cmask_owner_mutex);
pipe_mutex_destroy(ws->cs_stack_lock);
ws->cman_vram->destroy(ws->cman_vram);
ws->cman_vram_gtt_wc->destroy(ws->cman_vram_gtt_wc);
ws->cman_gtt->destroy(ws->cman_gtt);
ws->cman_gtt_wc->destroy(ws->cman_gtt_wc);
for (i = 0; i < RADEON_NUM_CACHE_MANAGERS; i++) {
ws->cman_gtt[i]->destroy(ws->cman_gtt[i]);
ws->cman_vram[i]->destroy(ws->cman_vram[i]);
}
ws->kman->destroy(ws->kman);
if (ws->gen >= DRV_R600) {
radeon_surface_manager_free(ws->surf_man);
@ -643,6 +644,7 @@ PUBLIC struct radeon_winsys *
radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
{
struct radeon_drm_winsys *ws;
int i;
pipe_mutex_lock(fd_tab_mutex);
if (!fd_tab) {
@ -671,18 +673,16 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
ws->kman = radeon_bomgr_create(ws);
if (!ws->kman)
goto fail;
ws->cman_vram = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
if (!ws->cman_vram)
goto fail;
ws->cman_vram_gtt_wc = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
if (!ws->cman_vram_gtt_wc)
goto fail;
ws->cman_gtt = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
if (!ws->cman_gtt)
goto fail;
ws->cman_gtt_wc = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
if (!ws->cman_gtt_wc)
goto fail;
for (i = 0; i < RADEON_NUM_CACHE_MANAGERS; i++) {
ws->cman_vram[i] = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
if (!ws->cman_vram[i])
goto fail;
ws->cman_gtt[i] = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
if (!ws->cman_gtt[i])
goto fail;
}
if (ws->gen >= DRV_R600) {
ws->surf_man = radeon_surface_manager_new(fd);
@ -737,14 +737,12 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
fail:
pipe_mutex_unlock(fd_tab_mutex);
if (ws->cman_gtt)
ws->cman_gtt->destroy(ws->cman_gtt);
if (ws->cman_gtt_wc)
ws->cman_gtt_wc->destroy(ws->cman_gtt_wc);
if (ws->cman_vram)
ws->cman_vram->destroy(ws->cman_vram);
if (ws->cman_vram_gtt_wc)
ws->cman_vram_gtt_wc->destroy(ws->cman_vram_gtt_wc);
for (i = 0; i < RADEON_NUM_CACHE_MANAGERS; i++) {
if (ws->cman_gtt[i])
ws->cman_gtt[i]->destroy(ws->cman_gtt[i]);
if (ws->cman_vram[i])
ws->cman_vram[i]->destroy(ws->cman_vram[i]);
}
if (ws->kman)
ws->kman->destroy(ws->kman);
if (ws->surf_man)

View file

@ -41,6 +41,8 @@ enum radeon_generation {
DRV_SI
};
#define RADEON_NUM_CACHE_MANAGERS 8
struct radeon_drm_winsys {
struct radeon_winsys base;
struct pipe_reference reference;
@ -58,10 +60,8 @@ struct radeon_drm_winsys {
uint32_t accel_working2;
struct pb_manager *kman;
struct pb_manager *cman_vram;
struct pb_manager *cman_vram_gtt_wc;
struct pb_manager *cman_gtt;
struct pb_manager *cman_gtt_wc;
struct pb_manager *cman_vram[RADEON_NUM_CACHE_MANAGERS];
struct pb_manager *cman_gtt[RADEON_NUM_CACHE_MANAGERS];
struct radeon_surface_manager *surf_man;
uint32_t num_cpus; /* Number of CPUs. */