From c747c1e1f4f48b543a8ed8f7f7db32e5393d41a0 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 2 Oct 2024 02:32:26 -0700 Subject: [PATCH] intel/brw: Fix spill/fill count for load/store_scratch in SIMD32 Honestly, I don't know what I was thinking - we are emitting a single spill/fill message here, but were counting it as 2 spill/fills in SIMD32 shaders. So our eventual shader stat reporting would subtract the number of spills and fills from send_count, and get a negative number, wrapping around to just shy of UINT32_MAX. That's way too many sends. This is especially noticable on Xe2 which often uses SIMD32 shaders. Backport-to: 24.2 Reviewed-by: Caio Oliveira Reviewed-by: Ian Romanick Part-of: --- src/intel/compiler/brw_fs_nir.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index f94ac31ba59..a768c98e5f2 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -7376,9 +7376,9 @@ fs_nir_emit_memory_access(nir_to_brw_state &ntb, } if (is_store) - s.shader_stats.spill_count += DIV_ROUND_UP(s.dispatch_width, 16); + ++s.shader_stats.spill_count; else - s.shader_stats.fill_count += DIV_ROUND_UP(s.dispatch_width, 16); + ++s.shader_stats.fill_count; data_src = 0; break;