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pan/va: Fix v4s8 form of R2 opcodes

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The XML had a typo which was copypasted (incorrectly) into various instructions.
Fixes a pile of integer_ops subtests.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18656>
This commit is contained in:
Alyssa Rosenzweig 2022-06-23 18:33:37 -04:00 • committed by Marge Bot
parent 48ba7f8627
commit c717c28d87
2 changed files with 7 additions and 5 deletions
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10
src/panfrost/bifrost/valhall/ISA.xml
View file

@ -1822,7 +1822,7 @@
<ins name="IADD.v4u8" opcode="0xA2"/>
<ins name="IADD.s32" opcode="0xA8"/>
<ins name="IADD.v2s16" opcode="0xA9"/>
<ins name="IADD.v4s8" opcode="0x1A2"/>
<ins name="IADD.v4s8" opcode="0xAA"/>
<ins name="IADD.u64" opcode="0x1A3"/>
<ins name="IADD.s64" opcode="0x1AB"/>
<!-- <ins name="IADD.s32" opcode="0x1A0"/> -->
@ -1843,7 +1843,7 @@
<ins name="ISUB.v4u8" opcode="0xA2"/>
<ins name="ISUB.s32" opcode="0xA8"/>
<ins name="ISUB.v2s16" opcode="0xA9"/>
<ins name="ISUB.v4s8" opcode="0x1A2"/>
<ins name="ISUB.v4s8" opcode="0xAA"/>
<ins name="ISUB.u64" opcode="0x1A3"/>
<ins name="ISUB.s64" opcode="0x1AB"/>
<desc>$A - B$ with optional saturation</desc>
@ -1886,7 +1886,7 @@
<ins name="IMUL.v4i8" opcode="0xA2"/>
<ins name="IMUL.s32" opcode="0xA8"/>
<ins name="IMUL.v2s16" opcode="0xA9"/>
<ins name="IMUL.v4s8" opcode="0x1A2"/>
<ins name="IMUL.v4s8" opcode="0xAA"/>
<ins name="IMULD.u64" opcode="0x1A3"/>
<!-- <ins name="IMUL.s32" opcode="0x1A0"/> -->
<desc>
@ -1907,7 +1907,7 @@
<ins name="HADD.v4u8" opcode="0xA2"/>
<ins name="HADD.s32" opcode="0xA8"/>
<ins name="HADD.v2s16" opcode="0xA9"/>
<ins name="HADD.v4s8" opcode="0x1A2"/>
<ins name="HADD.v4s8" opcode="0xAA"/>
<mod name="rhadd" start="30" size="1"/>
<src widen="true">A</src>
<src widen="true">B</src>
@ -1924,7 +1924,7 @@
<ins name="CLPER.v4u8" opcode="0xA2"/>
<ins name="CLPER.s32" opcode="0xA8"/>
<ins name="CLPER.v2s16" opcode="0xA9"/>
<ins name="CLPER.v4s8" opcode="0x1A2"/>
<ins name="CLPER.v4s8" opcode="0xAA"/>
<ins name="CLPER.u64" opcode="0x1A3"/>
<ins name="CLPER.s64" opcode="0x1AB"/>
<!-- <ins name="CLPER.s32" opcode="0x1A0"/> -->

2
src/panfrost/bifrost/valhall/test/assembler-cases.txt
View file

@ -237,3 +237,5 @@ c0 f1 00 00 10 c1 2f 08 BRANCHZI.eq.absolute.wait0 0x0, blend_descriptor_0.w1
41 41 40 ad 01 c0 f5 00 FCMP_AND.v2f16.gt.m1 r0, ^r1, ^r1.h11, ^r0
c4 c0 40 10 71 c0 b6 00 LSHIFT_AND.v4i8 r0, 0x1000000.b3333, 0x0.b00, ^r0
40 00 13 00 80 c0 90 00 V2U8_TO_V2F16 r0, ^r0.b02
41 40 00 40 00 c0 aa 00 IADD.v4s8.saturate r0, ^r1, ^r0
41 40 01 40 00 c0 aa 00 ISUB.v4s8.saturate r0, ^r1, ^r0