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nir_lower_mem_access_bit_sizes: Support unaligned stores via a pair of atomics
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8282 Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23173>
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2 changed files with 89 additions and 14 deletions
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@ -5115,6 +5115,7 @@ typedef nir_mem_access_size_align
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typedef struct {
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nir_lower_mem_access_bit_sizes_cb callback;
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nir_variable_mode modes;
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bool may_lower_unaligned_stores_to_atomics;
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void *cb_data;
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} nir_lower_mem_access_bit_sizes_options;
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@ -230,7 +230,7 @@ lower_mem_load(nir_builder *b, nir_intrinsic_instr *intrin,
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static bool
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lower_mem_store(nir_builder *b, nir_intrinsic_instr *intrin,
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nir_lower_mem_access_bit_sizes_cb mem_access_size_align_cb,
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const void *cb_data)
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const void *cb_data, bool allow_unaligned_stores_as_atomics)
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{
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assert(intrin->src[0].is_ssa);
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nir_ssa_def *value = intrin->src[0].ssa;
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@ -287,28 +287,101 @@ lower_mem_store(nir_builder *b, nir_intrinsic_instr *intrin,
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const uint32_t max_chunk_bytes = end - chunk_start;
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const uint32_t chunk_align_offset =
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(whole_align_offset + chunk_start) % align_mul;
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const uint32_t chunk_align =
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nir_combined_align(align_mul, chunk_align_offset);
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requested = mem_access_size_align_cb(intrin->intrinsic, max_chunk_bytes,
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bit_size, align_mul, chunk_align_offset,
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offset_is_const, cb_data);
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const uint32_t chunk_bytes =
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requested.num_components * (requested.bit_size / 8);
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assert(chunk_bytes <= max_chunk_bytes);
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uint32_t chunk_bytes = requested.num_components * (requested.bit_size / 8);
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assert(util_is_power_of_two_nonzero(requested.align));
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assert(requested.align <= align_mul);
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assert((chunk_align_offset % requested.align) == 0);
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if (chunk_align < requested.align ||
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chunk_bytes > max_chunk_bytes) {
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/* Otherwise the caller made a mistake with their return values. */
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assert(chunk_bytes <= 32);
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assert(allow_unaligned_stores_as_atomics);
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nir_ssa_def *packed = nir_extract_bits(b, &value, 1, chunk_start * 8,
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requested.num_components,
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requested.bit_size);
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/* We'll turn this into a pair of 32-bit atomics to modify only the right
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* bits of memory.
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*/
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requested = (nir_mem_access_size_align){
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.align = 4,
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.bit_size = 32,
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.num_components = 1,
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};
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nir_ssa_def *chunk_offset = nir_iadd_imm(b, offset, chunk_start);
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dup_mem_intrinsic(b, intrin, chunk_offset,
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align_mul, chunk_align_offset, packed,
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requested.num_components, requested.bit_size);
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uint64_t align_mask = requested.align - 1;
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nir_ssa_def *chunk_offset = nir_iadd_imm(b, offset, chunk_start);
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nir_ssa_def *pad = chunk_align < 4 ?
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nir_iand_imm(b, chunk_offset, align_mask) :
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nir_imm_intN_t(b, 0, chunk_offset->bit_size);
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chunk_offset = nir_iand_imm(b, chunk_offset, ~align_mask);
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unsigned max_pad = chunk_align < requested.align ? requested.align - chunk_align : 0;
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unsigned requested_bytes =
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requested.num_components * requested.bit_size / 8;
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chunk_bytes = MIN2(max_chunk_bytes, requested_bytes - max_pad);
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unsigned chunk_bits = chunk_bytes * 8;
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nir_ssa_def *chunk_value = value;
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/* The one special case where nir_extract_bits cannot get a scalar by asking for
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* 1 component of chunk_bits.
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*/
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if (chunk_bits == 24) {
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chunk_value = nir_pad_vec4(b, chunk_value);
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chunk_bits = 32;
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}
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nir_ssa_def *data = nir_u2u32(b,
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nir_extract_bits(b, &chunk_value, 1, chunk_start * 8,
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1, chunk_bits));
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nir_ssa_def *iand_mask = nir_imm_int(b, (1 << chunk_bits) - 1);
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if (chunk_align < requested.align) {
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nir_ssa_def *shift = nir_imul_imm(b, pad, 8);
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data = nir_ishl(b, data, shift);
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iand_mask = nir_inot(b, nir_ishl(b, iand_mask, shift));
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}
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switch (intrin->intrinsic) {
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case nir_intrinsic_store_ssbo:
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nir_build_ssbo_atomic(b, 32, intrin->src[1].ssa, chunk_offset, iand_mask,
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.atomic_op = nir_atomic_op_iand,
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.access = nir_intrinsic_access(intrin));
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nir_build_ssbo_atomic(b, 32, intrin->src[1].ssa, chunk_offset, data,
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.atomic_op = nir_atomic_op_ior,
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.access = nir_intrinsic_access(intrin));
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break;
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case nir_intrinsic_store_global:
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nir_build_global_atomic(b, 32, chunk_offset, iand_mask,
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.atomic_op = nir_atomic_op_iand);
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nir_build_global_atomic(b, 32, chunk_offset, data,
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.atomic_op = nir_atomic_op_ior);
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break;
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case nir_intrinsic_store_shared:
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nir_build_shared_atomic(b, 32, chunk_offset, iand_mask,
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.atomic_op = nir_atomic_op_iand,
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.base = nir_intrinsic_base(intrin));
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nir_build_shared_atomic(b, 32, chunk_offset, data,
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.atomic_op = nir_atomic_op_ior,
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.base = nir_intrinsic_base(intrin));
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break;
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default:
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unreachable("Unsupported unaligned store");
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}
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} else {
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nir_ssa_def *packed = nir_extract_bits(b, &value, 1, chunk_start * 8,
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requested.num_components,
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requested.bit_size);
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nir_ssa_def *chunk_offset = nir_iadd_imm(b, offset, chunk_start);
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dup_mem_intrinsic(b, intrin, chunk_offset,
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align_mul, chunk_align_offset, packed,
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requested.num_components, requested.bit_size);
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}
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BITSET_CLEAR_RANGE(mask, chunk_start, (chunk_start + chunk_bytes - 1));
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}
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@ -381,7 +454,8 @@ lower_mem_access_instr(nir_builder *b, nir_instr *instr, void *_data)
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case nir_intrinsic_store_shared:
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case nir_intrinsic_store_scratch:
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case nir_intrinsic_store_task_payload:
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return lower_mem_store(b, intrin, state->callback, state->cb_data);
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return lower_mem_store(b, intrin, state->callback, state->cb_data,
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state->may_lower_unaligned_stores_to_atomics);
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default:
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return false;
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