From c707d26202c630963e39397b729edf520645b592 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Tue, 19 May 2020 16:33:10 -0700
Subject: [PATCH] ci: Disable SMP on the a5xx boards.

CPU0 comes up at some plausible freq, but the rest are at 19Mhz waiting
for cpufreq to come up, which has not been upstreamed.

(cherry picked from commit 6033c10092ae69ce2a0ad8fe0a25e124f6bbf50c)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5548>
---
 .gitlab-ci.yml | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 0ad67a5e63d..f87e507443a 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -874,7 +874,9 @@ arm64_a530_gles2:
   variables:
     BM_KERNEL: /lava-files/db820c-kernel
     BM_DTB: /lava-files/db820c.dtb
-    BM_CMDLINE: "ip=dhcp console=ttyMSM0,115200n8"
+    # Disable SMP because only CPU 0 is at a freq higher than 19mhz on
+    # current upstream kernel.
+    BM_CMDLINE: "ip=dhcp console=ttyMSM0,115200n8 nosmp"
     DEQP_EXPECTED_FAILS: deqp-freedreno-a530-fails.txt
     DEQP_SKIPS: deqp-freedreno-a530-skips.txt
     DEQP_EXPECTED_RENDERER: FD530