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pan/bi: Lower 8-bit fragment input
Same reasons/technique as fragment output lowering, just need the NIR. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10393>
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1 changed files with 46 additions and 21 deletions
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@ -2962,15 +2962,8 @@ bi_optimize_nir(nir_shader *nir, bool is_blend)
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static bool
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bifrost_nir_lower_i8_fragout_impl(struct nir_builder *b,
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nir_instr *instr, UNUSED void *data)
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nir_intrinsic_instr *intr, UNUSED void *data)
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{
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if (instr->type != nir_instr_type_intrinsic)
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return false;
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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if (intr->intrinsic != nir_intrinsic_store_output)
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return false;
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if (nir_src_bit_size(intr->src[0]) != 8)
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return false;
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@ -2979,27 +2972,53 @@ bifrost_nir_lower_i8_fragout_impl(struct nir_builder *b,
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assert(type == nir_type_int || type == nir_type_uint);
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b->cursor = nir_before_instr(instr);
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nir_ssa_def *cast = type == nir_type_int ?
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nir_i2i(b, intr->src[0].ssa, 16) :
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nir_u2u(b, intr->src[0].ssa, 16);
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b->cursor = nir_before_instr(&intr->instr);
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nir_ssa_def *cast = nir_convert_to_bit_size(b, intr->src[0].ssa, type, 16);
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nir_intrinsic_set_src_type(intr, type | 16);
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nir_instr_rewrite_src(&intr->instr, &intr->src[0],
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nir_src_for_ssa(cast));
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nir_instr_rewrite_src_ssa(&intr->instr, &intr->src[0], cast);
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return true;
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}
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static bool
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bifrost_nir_lower_i8_fragout(nir_shader *shader)
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bifrost_nir_lower_i8_fragin_impl(struct nir_builder *b,
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nir_intrinsic_instr *intr, UNUSED void *data)
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{
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if (shader->info.stage != MESA_SHADER_FRAGMENT)
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if (nir_dest_bit_size(intr->dest) != 8)
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return false;
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return nir_shader_instructions_pass(shader,
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bifrost_nir_lower_i8_fragout_impl,
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nir_metadata_block_index | nir_metadata_dominance,
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NULL);
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nir_alu_type type =
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nir_alu_type_get_base_type(nir_intrinsic_dest_type(intr));
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assert(type == nir_type_int || type == nir_type_uint);
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b->cursor = nir_before_instr(&intr->instr);
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nir_ssa_def *out =
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nir_load_output(b, intr->num_components, 16, intr->src[0].ssa,
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.base = nir_intrinsic_base(intr),
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.component = nir_intrinsic_component(intr),
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.dest_type = type | 16,
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.io_semantics = nir_intrinsic_io_semantics(intr));
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nir_ssa_def *cast = nir_convert_to_bit_size(b, out, type, 8);
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nir_ssa_def_rewrite_uses(&intr->dest.ssa, cast);
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return true;
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}
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static bool
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bifrost_nir_lower_i8_frag(struct nir_builder *b,
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nir_instr *instr, UNUSED void *data)
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{
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if (instr->type != nir_instr_type_intrinsic)
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return false;
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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if (intr->intrinsic == nir_intrinsic_load_output)
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return bifrost_nir_lower_i8_fragin_impl(b, intr, data);
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else if (intr->intrinsic == nir_intrinsic_store_output)
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return bifrost_nir_lower_i8_fragout_impl(b, intr, data);
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else
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return false;
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}
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/* Dead code elimination for branches at the end of a block - only one branch
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@ -3075,7 +3094,13 @@ bifrost_compile_shader_nir(nir_shader *nir,
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NIR_PASS_V(nir, nir_lower_ssbo);
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NIR_PASS_V(nir, pan_nir_lower_zs_store);
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NIR_PASS_V(nir, pan_lower_sample_pos);
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NIR_PASS_V(nir, bifrost_nir_lower_i8_fragout);
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if (nir->info.stage == MESA_SHADER_FRAGMENT) {
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NIR_PASS_V(nir, nir_shader_instructions_pass,
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bifrost_nir_lower_i8_frag,
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nir_metadata_block_index | nir_metadata_dominance,
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NULL);
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}
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bi_optimize_nir(nir, ctx->inputs->is_blend);
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