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i965: Generalize the pixel_x/y workaround for all UW types.

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This is the only case where a fs_reg in brw_fs_visitor is used during
optimization/code generation, and it meant that optimizations had to be
careful to not move pixel_x/y's register number without updating it.

Additionally, it turns out we had a couple of other UW values that weren't
getting this treatment (like gl_SampleID), so this more general fix is
probably a good idea (though I wasn't able to replicate problems with
either pixel_[xy]'s values or gl_SampleID, even when telling the register
allocator to reuse registers immediately)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 66f5c8df06)
This commit is contained in:
Eric Anholt 2014-05-06 13:22:10 -07:00 • committed by Carl Worth
parent 64ff84abae
commit c6a6acb6b4
1 changed files with 4 additions and 4 deletions
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8
src/mesa/drivers/dri/i965/brw_fs_live_variables.cpp
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@ -86,10 +86,10 @@ fs_live_variables::setup_one_read(bblock_t *block, fs_inst *inst,
*/
int end_ip = ip;
if (v->dispatch_width == 16 && (reg.stride == 0 ||
((v->pixel_x.file == GRF &&
v->pixel_x.reg == reg.reg) ||
(v->pixel_y.file == GRF &&
v->pixel_y.reg == reg.reg)))) {
reg.type == BRW_REGISTER_TYPE_UW ||
reg.type == BRW_REGISTER_TYPE_W ||
reg.type == BRW_REGISTER_TYPE_UB ||
reg.type == BRW_REGISTER_TYPE_B)) {
end_ip++;
}