diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp
index b12e286f384..05dbe0461b5 100644
--- a/src/compiler/glsl/glsl_to_nir.cpp
+++ b/src/compiler/glsl/glsl_to_nir.cpp
@@ -1121,9 +1121,12 @@ nir_visitor::visit(ir_call *ir)
          atomic_op = nir_atomic_op_dec_wrap;
          break;
       case ir_intrinsic_memory_barrier:
-         op = shader->options->use_scoped_barrier
-            ? nir_intrinsic_scoped_barrier
-            : nir_intrinsic_memory_barrier;
+      case ir_intrinsic_memory_barrier_buffer:
+      case ir_intrinsic_memory_barrier_image:
+      case ir_intrinsic_memory_barrier_shared:
+      case ir_intrinsic_memory_barrier_atomic_counter:
+      case ir_intrinsic_group_memory_barrier:
+         op = nir_intrinsic_scoped_barrier;
          break;
       case ir_intrinsic_image_size:
          op = nir_intrinsic_image_deref_size;
@@ -1143,31 +1146,6 @@ nir_visitor::visit(ir_call *ir)
       case ir_intrinsic_end_invocation_interlock:
          op = nir_intrinsic_end_invocation_interlock;
          break;
-      case ir_intrinsic_group_memory_barrier:
-         op = shader->options->use_scoped_barrier
-            ? nir_intrinsic_scoped_barrier
-            : nir_intrinsic_group_memory_barrier;
-         break;
-      case ir_intrinsic_memory_barrier_atomic_counter:
-         op = shader->options->use_scoped_barrier
-            ? nir_intrinsic_scoped_barrier
-            : nir_intrinsic_memory_barrier_atomic_counter;
-         break;
-      case ir_intrinsic_memory_barrier_buffer:
-         op = shader->options->use_scoped_barrier
-            ? nir_intrinsic_scoped_barrier
-            : nir_intrinsic_memory_barrier_buffer;
-         break;
-      case ir_intrinsic_memory_barrier_image:
-         op = shader->options->use_scoped_barrier
-            ? nir_intrinsic_scoped_barrier
-            : nir_intrinsic_memory_barrier_image;
-         break;
-      case ir_intrinsic_memory_barrier_shared:
-         op = shader->options->use_scoped_barrier
-            ? nir_intrinsic_scoped_barrier
-            : nir_intrinsic_memory_barrier_shared;
-         break;
       case ir_intrinsic_vote_any:
          op = nir_intrinsic_vote_any;
          break;
@@ -1404,14 +1382,6 @@ nir_visitor::visit(ir_call *ir)
          nir_builder_instr_insert(&b, &instr->instr);
          break;
       }
-      case nir_intrinsic_memory_barrier:
-      case nir_intrinsic_group_memory_barrier:
-      case nir_intrinsic_memory_barrier_atomic_counter:
-      case nir_intrinsic_memory_barrier_buffer:
-      case nir_intrinsic_memory_barrier_image:
-      case nir_intrinsic_memory_barrier_shared:
-         nir_builder_instr_insert(&b, &instr->instr);
-         break;
       case nir_intrinsic_scoped_barrier: {
          /* The nir_intrinsic_scoped_barrier follows the general
           * semantics of SPIR-V memory barriers, so this and other memory
@@ -2681,21 +2651,12 @@ nir_visitor::visit(ir_dereference_array *ir)
 void
 nir_visitor::visit(ir_barrier *)
 {
-   if (shader->options->use_scoped_barrier) {
-      if (shader->info.stage == MESA_SHADER_COMPUTE) {
-         nir_scoped_barrier(&b, NIR_SCOPE_WORKGROUP, NIR_SCOPE_WORKGROUP,
-                            NIR_MEMORY_ACQ_REL, nir_var_mem_shared);
-      } else if (shader->info.stage == MESA_SHADER_TESS_CTRL) {
-         nir_scoped_barrier(&b, NIR_SCOPE_WORKGROUP, NIR_SCOPE_WORKGROUP,
-                            NIR_MEMORY_ACQ_REL, nir_var_shader_out);
-      }
-   } else {
-      if (shader->info.stage == MESA_SHADER_COMPUTE)
-         nir_memory_barrier_shared(&b);
-      else if (shader->info.stage == MESA_SHADER_TESS_CTRL)
-         nir_memory_barrier_tcs_patch(&b);
-
-      nir_control_barrier(&b);
+   if (shader->info.stage == MESA_SHADER_COMPUTE) {
+      nir_scoped_barrier(&b, NIR_SCOPE_WORKGROUP, NIR_SCOPE_WORKGROUP,
+                         NIR_MEMORY_ACQ_REL, nir_var_mem_shared);
+   } else if (shader->info.stage == MESA_SHADER_TESS_CTRL) {
+      nir_scoped_barrier(&b, NIR_SCOPE_WORKGROUP, NIR_SCOPE_WORKGROUP,
+                         NIR_MEMORY_ACQ_REL, nir_var_shader_out);
    }
 }