diff --git a/src/gallium/drivers/panfrost/pan_cmdstream.c b/src/gallium/drivers/panfrost/pan_cmdstream.c index a47c645ebb8..7516e67f51b 100644 --- a/src/gallium/drivers/panfrost/pan_cmdstream.c +++ b/src/gallium/drivers/panfrost/pan_cmdstream.c @@ -2538,7 +2538,7 @@ emit_fbd(struct panfrost_batch *batch, struct pan_fb_info *fb) #endif batch->framebuffer.gpu |= - GENX(pan_emit_fbd)(fb, &tls, &batch->tiler_ctx, batch->framebuffer.cpu); + GENX(pan_emit_fbd)(fb, 0, &tls, &batch->tiler_ctx, batch->framebuffer.cpu); } /* Mark a surface as written */ diff --git a/src/panfrost/lib/pan_desc.c b/src/panfrost/lib/pan_desc.c index e337a7f3dc6..527d979e863 100644 --- a/src/panfrost/lib/pan_desc.c +++ b/src/panfrost/lib/pan_desc.c @@ -176,7 +176,8 @@ translate_s_format(enum pipe_format in) } static void -pan_prepare_s(const struct pan_fb_info *fb, struct MALI_ZS_CRC_EXTENSION *ext) +pan_prepare_s(const struct pan_fb_info *fb, unsigned layer_idx, + struct MALI_ZS_CRC_EXTENSION *ext) { const struct pan_image_view *s = fb->zs.view.s; @@ -189,7 +190,7 @@ pan_prepare_s(const struct pan_fb_info *fb, struct MALI_ZS_CRC_EXTENSION *ext) ext->s_msaa = mali_sampling_mode(s); struct pan_surface surf; - pan_iview_get_surface(s, 0, 0, 0, &surf); + pan_iview_get_surface(s, 0, layer_idx, 0, &surf); assert(image->layout.modifier == DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED || @@ -205,7 +206,8 @@ pan_prepare_s(const struct pan_fb_info *fb, struct MALI_ZS_CRC_EXTENSION *ext) } static void -pan_prepare_zs(const struct pan_fb_info *fb, struct MALI_ZS_CRC_EXTENSION *ext) +pan_prepare_zs(const struct pan_fb_info *fb, unsigned layer_idx, + struct MALI_ZS_CRC_EXTENSION *ext) { const struct pan_image_view *zs = fb->zs.view.zs; @@ -218,7 +220,7 @@ pan_prepare_zs(const struct pan_fb_info *fb, struct MALI_ZS_CRC_EXTENSION *ext) ext->zs_msaa = mali_sampling_mode(zs); struct pan_surface surf; - pan_iview_get_surface(zs, 0, 0, 0, &surf); + pan_iview_get_surface(zs, 0, layer_idx, 0, &surf); UNUSED const struct pan_image_slice_layout *slice = &image->layout.slices[level]; @@ -295,13 +297,14 @@ pan_prepare_crc(const struct pan_fb_info *fb, int rt_crc, } static void -pan_emit_zs_crc_ext(const struct pan_fb_info *fb, int rt_crc, void *zs_crc_ext) +pan_emit_zs_crc_ext(const struct pan_fb_info *fb, unsigned layer_idx, + int rt_crc, void *zs_crc_ext) { pan_pack(zs_crc_ext, ZS_CRC_EXTENSION, cfg) { pan_prepare_crc(fb, rt_crc, &cfg); cfg.zs_clean_pixel_write_enable = fb->zs.clear.z || fb->zs.clear.s; - pan_prepare_zs(fb, &cfg); - pan_prepare_s(fb, &cfg); + pan_prepare_zs(fb, layer_idx, &cfg); + pan_prepare_s(fb, layer_idx, &cfg); } } @@ -433,21 +436,21 @@ pan_rt_init_format(const struct pan_image_view *rt, } static void -pan_prepare_rt(const struct pan_fb_info *fb, - unsigned idx, unsigned cbuf_offset, +pan_prepare_rt(const struct pan_fb_info *fb, unsigned layer_idx, + unsigned rt_idx, unsigned cbuf_offset, struct MALI_RENDER_TARGET *cfg) { - cfg->clean_pixel_write_enable = fb->rts[idx].clear; + cfg->clean_pixel_write_enable = fb->rts[rt_idx].clear; cfg->internal_buffer_offset = cbuf_offset; - if (fb->rts[idx].clear) { - cfg->clear.color_0 = fb->rts[idx].clear_value[0]; - cfg->clear.color_1 = fb->rts[idx].clear_value[1]; - cfg->clear.color_2 = fb->rts[idx].clear_value[2]; - cfg->clear.color_3 = fb->rts[idx].clear_value[3]; + if (fb->rts[rt_idx].clear) { + cfg->clear.color_0 = fb->rts[rt_idx].clear_value[0]; + cfg->clear.color_1 = fb->rts[rt_idx].clear_value[1]; + cfg->clear.color_2 = fb->rts[rt_idx].clear_value[2]; + cfg->clear.color_3 = fb->rts[rt_idx].clear_value[3]; } - const struct pan_image_view *rt = fb->rts[idx].view; - if (!rt || fb->rts[idx].discard) { + const struct pan_image_view *rt = fb->rts[rt_idx].view; + if (!rt || fb->rts[rt_idx].discard) { cfg->internal_format = MALI_COLOR_BUFFER_INTERNAL_FORMAT_R8G8B8A8; cfg->internal_buffer_offset = cbuf_offset; #if PAN_ARCH >= 7 @@ -463,8 +466,12 @@ pan_prepare_rt(const struct pan_fb_info *fb, cfg->dithering_enable = true; unsigned level = rt->first_level; + ASSERTED unsigned layer_count = rt->dim == MALI_TEXTURE_DIMENSION_3D + ? rt->planes[0]->layout.depth + : rt->last_layer - rt->first_layer + 1; + assert(rt->last_level == rt->first_level); - assert(rt->last_layer == rt->first_layer); + assert(layer_idx < layer_count); int row_stride = image->layout.slices[level].row_stride; @@ -481,7 +488,7 @@ pan_prepare_rt(const struct pan_fb_info *fb, cfg->writeback_block_format = mod_to_block_fmt(image->layout.modifier); struct pan_surface surf; - pan_iview_get_surface(rt, 0, 0, 0, &surf); + pan_iview_get_surface(rt, 0, layer_idx, 0, &surf); if (drm_is_afbc(image->layout.modifier)) { #if PAN_ARCH >= 9 @@ -601,11 +608,11 @@ pan_emit_midgard_tiler(const struct pan_fb_info *fb, #if PAN_ARCH >= 5 static void -pan_emit_rt(const struct pan_fb_info *fb, +pan_emit_rt(const struct pan_fb_info *fb, unsigned layer_idx, unsigned idx, unsigned cbuf_offset, void *out) { pan_pack(out, RENDER_TARGET, cfg) { - pan_prepare_rt(fb, idx, cbuf_offset, &cfg); + pan_prepare_rt(fb, layer_idx, idx, cbuf_offset, &cfg); } } @@ -674,7 +681,8 @@ pan_force_clean_write(const struct pan_fb_info *fb, unsigned tile_size) #endif unsigned -GENX(pan_emit_fbd)(const struct pan_fb_info *fb, const struct pan_tls_info *tls, +GENX(pan_emit_fbd)(const struct pan_fb_info *fb, unsigned layer_idx, + const struct pan_tls_info *tls, const struct pan_tiler_context *tiler_ctx, void *out) { void *fbd = out; @@ -791,14 +799,14 @@ GENX(pan_emit_fbd)(const struct pan_fb_info *fb, const struct pan_tls_info *tls, #endif if (has_zs_crc_ext) { - pan_emit_zs_crc_ext(fb, crc_rt, out + pan_size(FRAMEBUFFER)); + pan_emit_zs_crc_ext(fb, layer_idx, crc_rt, out + pan_size(FRAMEBUFFER)); rtd += pan_size(ZS_CRC_EXTENSION); } unsigned rt_count = MAX2(fb->rt_count, 1); unsigned cbuf_offset = 0; for (unsigned i = 0; i < rt_count; i++) { - pan_emit_rt(fb, i, cbuf_offset, rtd); + pan_emit_rt(fb, layer_idx, i, cbuf_offset, rtd); rtd += pan_size(RENDER_TARGET); if (!fb->rts[i].view) continue; @@ -819,7 +827,8 @@ GENX(pan_emit_fbd)(const struct pan_fb_info *fb, const struct pan_tls_info *tls, } #else /* PAN_ARCH == 4 */ unsigned -GENX(pan_emit_fbd)(const struct pan_fb_info *fb, const struct pan_tls_info *tls, +GENX(pan_emit_fbd)(const struct pan_fb_info *fb, unsigned layer_idx, + const struct pan_tls_info *tls, const struct pan_tiler_context *tiler_ctx, void *fbd) { assert(fb->rt_count <= 1); diff --git a/src/panfrost/lib/pan_desc.h b/src/panfrost/lib/pan_desc.h index 21e2bf2dea8..8cbf710cce8 100644 --- a/src/panfrost/lib/pan_desc.h +++ b/src/panfrost/lib/pan_desc.h @@ -179,7 +179,7 @@ void GENX(pan_emit_tls)(const struct pan_tls_info *info, void *out); int GENX(pan_select_crc_rt)(const struct pan_fb_info *fb, unsigned tile_size); -unsigned GENX(pan_emit_fbd)(const struct pan_fb_info *fb, +unsigned GENX(pan_emit_fbd)(const struct pan_fb_info *fb, unsigned layer_idx, const struct pan_tls_info *tls, const struct pan_tiler_context *tiler_ctx, void *out); diff --git a/src/panfrost/vulkan/jm/panvk_vX_cmd_buffer.c b/src/panfrost/vulkan/jm/panvk_vX_cmd_buffer.c index 99a8c46381d..ea9952ac599 100644 --- a/src/panfrost/vulkan/jm/panvk_vX_cmd_buffer.c +++ b/src/panfrost/vulkan/jm/panvk_vX_cmd_buffer.c @@ -150,9 +150,9 @@ panvk_per_arch(cmd_close_batch)(struct panvk_cmd_buffer *cmdbuf) panfrost_sample_positions_offset( pan_sample_pattern(fbinfo->nr_samples)); - batch->fb.desc.gpu |= - GENX(pan_emit_fbd)(&cmdbuf->state.gfx.render.fb.info, &batch->tlsinfo, - &batch->tiler.ctx, batch->fb.desc.cpu); + batch->fb.desc.gpu |= GENX(pan_emit_fbd)( + &cmdbuf->state.gfx.render.fb.info, 0, &batch->tlsinfo, + &batch->tiler.ctx, batch->fb.desc.cpu); panvk_cmd_prepare_fragment_job(cmdbuf); }