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i965/fs: Remove fs_visitor::try_replace_with_sel().

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No shader-db changes on g4x, snb, hsw, or bdw.

Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Matt Turner 2015-08-17 14:38:31 -07:00
parent 64e312d7fa
commit c676c432f3
3 changed files with 0 additions and 92 deletions
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1
src/mesa/drivers/dri/i965/brw_fs.h
View file

@ -225,7 +225,6 @@ public:
void emit_gen6_gather_wa(uint8_t wa, fs_reg dst);
fs_reg resolve_source_modifiers(const fs_reg &src);
void emit_discard_jump();
bool try_replace_with_sel();
bool opt_peephole_sel();
bool opt_peephole_predicated_break();
bool opt_saturate_propagation();

2
src/mesa/drivers/dri/i965/brw_fs_nir.cpp
View file

@ -416,8 +416,6 @@ fs_visitor::nir_emit_if(nir_if *if_stmt)
nir_emit_cf_list(&if_stmt->else_list);
bld.emit(BRW_OPCODE_ENDIF);
try_replace_with_sel();
}
void

89
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
View file

@ -441,95 +441,6 @@ fs_visitor::swizzle_result(ir_texture_opcode op, int dest_components,
}
}
/**
* Try to replace IF/MOV/ELSE/MOV/ENDIF with SEL.
*
* Many GLSL shaders contain the following pattern:
*
* x = condition ? foo : bar
*
* The compiler emits an ir_if tree for this, since each subexpression might be
* a complex tree that could have side-effects or short-circuit logic.
*
* However, the common case is to simply select one of two constants or
* variable values---which is exactly what SEL is for. In this case, the
* assembly looks like:
*
* (+f0) IF
* MOV dst src0
* ELSE
* MOV dst src1
* ENDIF
*
* which can be easily translated into:
*
* (+f0) SEL dst src0 src1
*
* If src0 is an immediate value, we promote it to a temporary GRF.
*/
bool
fs_visitor::try_replace_with_sel()
{
fs_inst *endif_inst = (fs_inst *) instructions.get_tail();
assert(endif_inst->opcode == BRW_OPCODE_ENDIF);
/* Pattern match in reverse: IF, MOV, ELSE, MOV, ENDIF. */
int opcodes[] = {
BRW_OPCODE_IF, BRW_OPCODE_MOV, BRW_OPCODE_ELSE, BRW_OPCODE_MOV,
};
fs_inst *match = (fs_inst *) endif_inst->prev;
for (int i = 0; i < 4; i++) {
if (match->is_head_sentinel() || match->opcode != opcodes[4-i-1])
return false;
match = (fs_inst *) match->prev;
}
/* The opcodes match; it looks like the right sequence of instructions. */
fs_inst *else_mov = (fs_inst *) endif_inst->prev;
fs_inst *then_mov = (fs_inst *) else_mov->prev->prev;
fs_inst *if_inst = (fs_inst *) then_mov->prev;
/* Check that the MOVs are the right form. */
if (then_mov->dst.equals(else_mov->dst) &&
!then_mov->is_partial_write() &&
!else_mov->is_partial_write()) {
/* Remove the matched instructions; we'll emit a SEL to replace them. */
while (!if_inst->next->is_tail_sentinel())
if_inst->next->exec_node::remove();
if_inst->exec_node::remove();
/* Only the last source register can be a constant, so if the MOV in
* the "then" clause uses a constant, we need to put it in a temporary.
*/
fs_reg src0(then_mov->src[0]);
if (src0.file == IMM) {
src0 = vgrf(glsl_type::float_type);
src0.type = then_mov->src[0].type;
bld.MOV(src0, then_mov->src[0]);
}
if (if_inst->conditional_mod) {
/* Sandybridge-specific IF with embedded comparison */
bld.CMP(bld.null_reg_d(), if_inst->src[0], if_inst->src[1],
if_inst->conditional_mod);
set_predicate(BRW_PREDICATE_NORMAL,
bld.emit(BRW_OPCODE_SEL, then_mov->dst,
src0, else_mov->src[0]));
} else {
/* Separate CMP and IF instructions */
set_predicate_inv(if_inst->predicate, if_inst->predicate_inverse,
bld.emit(BRW_OPCODE_SEL, then_mov->dst,
src0, else_mov->src[0]));
}
return true;
}
return false;
}
/** Emits a dummy fragment shader consisting of magenta for bringup purposes. */
void
fs_visitor::emit_dummy_fs()