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gallium/radeon: move radeon_winsys::cs_memory_below_limit to drivers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
parent
076db67217
commit
c5ff0d3e65
7 changed files with 32 additions and 52 deletions
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@ -37,7 +37,8 @@ void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
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if (radeon_emitted(ctx->b.dma.cs, 0))
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ctx->b.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
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if (!ctx->b.ws->cs_memory_below_limit(ctx->b.gfx.cs, ctx->b.vram, ctx->b.gtt)) {
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if (!radeon_cs_memory_below_limit(ctx->b.screen, ctx->b.gfx.cs,
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ctx->b.vram, ctx->b.gtt)) {
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ctx->b.gtt = 0;
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ctx->b.vram = 0;
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ctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
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@ -33,6 +33,29 @@
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#include "r600_pipe_common.h"
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#include "r600d_common.h"
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/**
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* Return true if there is enough memory in VRAM and GTT for the buffers
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* added so far.
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*
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* \param vram VRAM memory size not added to the buffer list yet
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* \param gtt GTT memory size not added to the buffer list yet
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*/
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static inline bool
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radeon_cs_memory_below_limit(struct r600_common_screen *screen,
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struct radeon_winsys_cs *cs,
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uint64_t vram, uint64_t gtt)
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{
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vram += cs->used_vram;
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gtt += cs->used_gart;
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/* Anything that goes above the VRAM size should go to GTT. */
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if (vram > screen->info.vram_size)
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gtt += vram - screen->info.vram_size;
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/* Now we just need to check if we have enough GTT. */
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return gtt < screen->info.gart_size * 0.7;
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}
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/**
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* Add a buffer to the buffer list for the given command stream (CS).
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*
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@ -80,9 +103,9 @@ radeon_add_to_buffer_list_check_mem(struct r600_common_context *rctx,
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bool check_mem)
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{
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if (check_mem &&
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!rctx->ws->cs_memory_below_limit(ring->cs,
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rctx->vram + rbo->vram_usage,
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rctx->gtt + rbo->gart_usage))
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!radeon_cs_memory_below_limit(rctx->screen, ring->cs,
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rctx->vram + rbo->vram_usage,
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rctx->gtt + rbo->gart_usage))
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ring->flush(rctx, RADEON_FLUSH_ASYNC, NULL);
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return radeon_add_to_buffer_list(rctx, ring, rbo, usage, priority);
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@ -166,7 +166,7 @@ void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
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* is too large.
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*/
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if (!ctx->ws->cs_check_space(ctx->dma.cs, num_dw) ||
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!ctx->ws->cs_memory_below_limit(ctx->dma.cs, vram, gtt)) {
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!radeon_cs_memory_below_limit(ctx->screen, ctx->dma.cs, vram, gtt)) {
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ctx->dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
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assert((num_dw + ctx->dma.cs->current.cdw) <= ctx->dma.cs->current.max_dw);
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}
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@ -707,17 +707,6 @@ struct radeon_winsys {
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*/
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bool (*cs_check_space)(struct radeon_winsys_cs *cs, unsigned dw);
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/**
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* Return true if there is enough memory in VRAM and GTT for the buffers
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* added so far.
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*
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* \param cs A command stream to validate.
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* \param vram VRAM memory size pending to be use
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* \param gtt GTT memory size pending to be use
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*/
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bool (*cs_memory_below_limit)(struct radeon_winsys_cs *cs,
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uint64_t vram, uint64_t gtt);
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/**
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* Return the buffer list.
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*
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@ -25,6 +25,7 @@
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*/
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#include "si_pipe.h"
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#include "radeon/r600_cs.h"
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static unsigned si_descriptor_list_cs_space(unsigned count, unsigned element_size)
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{
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@ -71,8 +72,8 @@ void si_need_cs_space(struct si_context *ctx)
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* that have been added (cs_add_buffer) and two counters in the pipe
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* driver for those that haven't been added yet.
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*/
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if (unlikely(!ctx->b.ws->cs_memory_below_limit(ctx->b.gfx.cs,
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ctx->b.vram, ctx->b.gtt))) {
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if (unlikely(!radeon_cs_memory_below_limit(ctx->b.screen, ctx->b.gfx.cs,
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ctx->b.vram, ctx->b.gtt))) {
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ctx->b.gtt = 0;
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ctx->b.vram = 0;
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ctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
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@ -782,23 +782,6 @@ static bool amdgpu_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
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return true;
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}
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static bool amdgpu_cs_memory_below_limit(struct radeon_winsys_cs *rcs,
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uint64_t vram, uint64_t gtt)
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{
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struct amdgpu_cs *cs = amdgpu_cs(rcs);
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struct amdgpu_winsys *ws = cs->ctx->ws;
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vram += cs->main.base.used_vram;
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gtt += cs->main.base.used_gart;
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/* Anything that goes above the VRAM size should go to GTT. */
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if (vram > ws->info.vram_size)
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gtt += vram - ws->info.vram_size;
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/* Now we just need to check if we have enough GTT. */
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return gtt < ws->info.gart_size * 0.7;
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}
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static unsigned amdgpu_cs_get_buffer_list(struct radeon_winsys_cs *rcs,
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struct radeon_bo_list_item *list)
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{
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@ -1112,7 +1095,6 @@ void amdgpu_cs_init_functions(struct amdgpu_winsys *ws)
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ws->base.cs_lookup_buffer = amdgpu_cs_lookup_buffer;
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ws->base.cs_validate = amdgpu_cs_validate;
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ws->base.cs_check_space = amdgpu_cs_check_space;
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ws->base.cs_memory_below_limit = amdgpu_cs_memory_below_limit;
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ws->base.cs_get_buffer_list = amdgpu_cs_get_buffer_list;
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ws->base.cs_flush = amdgpu_cs_flush;
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ws->base.cs_is_buffer_referenced = amdgpu_bo_is_referenced;
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@ -389,21 +389,6 @@ static bool radeon_drm_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
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return rcs->current.max_dw - rcs->current.cdw >= dw;
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}
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static bool radeon_drm_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt)
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{
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struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
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vram += cs->base.used_vram;
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gtt += cs->base.used_gart;
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/* Anything that goes above the VRAM size should go to GTT. */
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if (vram > cs->ws->info.vram_size)
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gtt += vram - cs->ws->info.vram_size;
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/* Now we just need to check if we have enough GTT. */
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return gtt < cs->ws->info.gart_size * 0.7;
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}
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static unsigned radeon_drm_cs_get_buffer_list(struct radeon_winsys_cs *rcs,
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struct radeon_bo_list_item *list)
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{
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@ -676,7 +661,6 @@ void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws)
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ws->base.cs_lookup_buffer = radeon_drm_cs_lookup_buffer;
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ws->base.cs_validate = radeon_drm_cs_validate;
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ws->base.cs_check_space = radeon_drm_cs_check_space;
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ws->base.cs_memory_below_limit = radeon_drm_cs_memory_below_limit;
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ws->base.cs_get_buffer_list = radeon_drm_cs_get_buffer_list;
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ws->base.cs_flush = radeon_drm_cs_flush;
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ws->base.cs_is_buffer_referenced = radeon_bo_is_referenced;
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