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r300: bump the RC_MAX_INDEX_BITS
We skip ntt regalloc for vertex shaders and we have 1024 instruction limit for R500 vs, so in theory we could run some shaders with more that 1024 ssa registers (if we can optimize the number of instruction in the backend). So add one more bit. Reviewed-by: Filip Gawin <filip.gawin@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24154>
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@ -101,7 +101,7 @@ enum {
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RC_NUM_SPECIAL_REGISTERS
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};
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#define RC_REGISTER_INDEX_BITS 10
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#define RC_REGISTER_INDEX_BITS 11
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#define RC_REGISTER_MAX_INDEX (1 << RC_REGISTER_INDEX_BITS)
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typedef enum {
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