radeon/vcn: use cdw to calculate slice header index

Use DWORD count to calculate the number of DWORD filled in slice header template.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6942>
This commit is contained in:
Boyuan Zhang 2020-09-13 20:04:28 -04:00
parent e37cd34ea6
commit c56a1898d7

View file

@ -640,12 +640,14 @@ static void radeon_enc_slice_header(struct radeon_encoder *enc)
uint32_t instruction[RENCODE_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS] = {0};
uint32_t num_bits[RENCODE_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS] = {0};
unsigned int inst_index = 0;
unsigned int bit_index = 0;
unsigned int cdw_start = 0;
unsigned int cdw_filled = 0;
unsigned int bits_copied = 0;
RADEON_ENC_BEGIN(enc->cmd.slice_header);
radeon_enc_reset(enc);
radeon_enc_set_emulation_prevention(enc, false);
cdw_start = enc->cs->current.cdw;
if (enc->enc_pic.is_idr)
radeon_enc_code_fixed_bits(enc, 0x65, 8);
else if (enc->enc_pic.not_referenced)
@ -654,7 +656,6 @@ static void radeon_enc_slice_header(struct radeon_encoder *enc)
radeon_enc_code_fixed_bits(enc, 0x41, 8);
radeon_enc_flush_headers(enc);
bit_index++;
instruction[inst_index] = RENCODE_HEADER_INSTRUCTION_COPY;
num_bits[inst_index] = enc->bits_output - bits_copied;
bits_copied = enc->bits_output;
@ -724,7 +725,6 @@ static void radeon_enc_slice_header(struct radeon_encoder *enc)
radeon_enc_code_ue(enc, enc->enc_pic.spec_misc.cabac_init_idc);
radeon_enc_flush_headers(enc);
bit_index++;
instruction[inst_index] = RENCODE_HEADER_INSTRUCTION_COPY;
num_bits[inst_index] = enc->bits_output - bits_copied;
bits_copied = enc->bits_output;
@ -741,7 +741,6 @@ static void radeon_enc_slice_header(struct radeon_encoder *enc)
}
radeon_enc_flush_headers(enc);
bit_index++;
instruction[inst_index] = RENCODE_HEADER_INSTRUCTION_COPY;
num_bits[inst_index] = enc->bits_output - bits_copied;
bits_copied = enc->bits_output;
@ -749,7 +748,8 @@ static void radeon_enc_slice_header(struct radeon_encoder *enc)
instruction[inst_index] = RENCODE_HEADER_INSTRUCTION_END;
for (int i = bit_index; i < RENCODE_SLICE_HEADER_TEMPLATE_MAX_TEMPLATE_SIZE_IN_DWORDS; i++)
cdw_filled = enc->cs->current.cdw - cdw_start;
for (int i = 0; i < RENCODE_SLICE_HEADER_TEMPLATE_MAX_TEMPLATE_SIZE_IN_DWORDS - cdw_filled; i++)
RADEON_ENC_CS(0x00000000);
for (int j = 0; j < RENCODE_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS; j++) {
@ -765,19 +765,20 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
uint32_t instruction[RENCODE_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS] = {0};
uint32_t num_bits[RENCODE_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS] = {0};
unsigned int inst_index = 0;
unsigned int bit_index = 0;
unsigned int cdw_start = 0;
unsigned int cdw_filled = 0;
unsigned int bits_copied = 0;
RADEON_ENC_BEGIN(enc->cmd.slice_header);
radeon_enc_reset(enc);
radeon_enc_set_emulation_prevention(enc, false);
cdw_start = enc->cs->current.cdw;
radeon_enc_code_fixed_bits(enc, 0x0, 1);
radeon_enc_code_fixed_bits(enc, enc->enc_pic.nal_unit_type, 6);
radeon_enc_code_fixed_bits(enc, 0x0, 6);
radeon_enc_code_fixed_bits(enc, 0x1, 3);
radeon_enc_flush_headers(enc);
bit_index++;
instruction[inst_index] = RENCODE_HEADER_INSTRUCTION_COPY;
num_bits[inst_index] = enc->bits_output - bits_copied;
bits_copied = enc->bits_output;
@ -792,7 +793,6 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
radeon_enc_code_ue(enc, 0x0);
radeon_enc_flush_headers(enc);
bit_index++;
instruction[inst_index] = RENCODE_HEADER_INSTRUCTION_COPY;
num_bits[inst_index] = enc->bits_output - bits_copied;
bits_copied = enc->bits_output;
@ -840,7 +840,6 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
}
radeon_enc_flush_headers(enc);
bit_index++;
instruction[inst_index] = RENCODE_HEADER_INSTRUCTION_COPY;
num_bits[inst_index] = enc->bits_output - bits_copied;
bits_copied = enc->bits_output;
@ -855,7 +854,6 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
1);
radeon_enc_flush_headers(enc);
bit_index++;
instruction[inst_index] = RENCODE_HEADER_INSTRUCTION_COPY;
num_bits[inst_index] = enc->bits_output - bits_copied;
bits_copied = enc->bits_output;
@ -864,7 +862,8 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
instruction[inst_index] = RENCODE_HEADER_INSTRUCTION_END;
for (int i = bit_index; i < RENCODE_SLICE_HEADER_TEMPLATE_MAX_TEMPLATE_SIZE_IN_DWORDS; i++)
cdw_filled = enc->cs->current.cdw - cdw_start;
for (int i = 0; i < RENCODE_SLICE_HEADER_TEMPLATE_MAX_TEMPLATE_SIZE_IN_DWORDS - cdw_filled; i++)
RADEON_ENC_CS(0x00000000);
for (int j = 0; j < RENCODE_SLICE_HEADER_TEMPLATE_MAX_NUM_INSTRUCTIONS; j++) {