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radeonsi: kill 16-bit VS outputs if PS doesn't use them or doing Z-only draw
The kill_outputs logic uses our internal IO indices. Just add indices for 16-bit varyings. We don't have enough free indices to use, but we can reuse the indices that GLES doesn't have. Those are all the legacy desktop GL varyings. Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9051>
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4 changed files with 34 additions and 33 deletions
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@ -88,34 +88,41 @@ unsigned si_shader_io_get_unique_index(unsigned semantic, bool is_varying)
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case VARYING_SLOT_POS:
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return 0;
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default:
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/* Since some shader stages use the the highest used IO index
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/* Since some shader stages use the highest used IO index
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* to determine the size to allocate for inputs/outputs
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* (in LDS, tess and GS rings). GENERIC should be placed right
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* after POSITION to make that size as small as possible.
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*/
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if (semantic >= VARYING_SLOT_VAR0 &&
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semantic < VARYING_SLOT_VAR0 + SI_MAX_IO_GENERIC)
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return 1 + (semantic - VARYING_SLOT_VAR0);
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if (semantic >= VARYING_SLOT_VAR0 && semantic <= VARYING_SLOT_VAR31)
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return 1 + (semantic - VARYING_SLOT_VAR0); /* 1..32 */
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/* Put 16-bit GLES varyings after 32-bit varyings. They can use the same indices as
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* legacy desktop GL varyings because they are mutually exclusive.
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*/
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if (semantic >= VARYING_SLOT_VAR0_16BIT && semantic <= VARYING_SLOT_VAR15_16BIT)
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return 33 + (semantic - VARYING_SLOT_VAR0_16BIT); /* 33..48 */
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assert(!"invalid generic index");
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return 0;
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/* Legacy desktop GL varyings. */
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case VARYING_SLOT_FOGC:
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return SI_MAX_IO_GENERIC + 1;
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return 33;
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case VARYING_SLOT_COL0:
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return SI_MAX_IO_GENERIC + 2;
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return 34;
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case VARYING_SLOT_COL1:
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return SI_MAX_IO_GENERIC + 3;
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return 35;
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case VARYING_SLOT_BFC0:
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/* If it's a varying, COLOR and BCOLOR alias. */
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if (is_varying)
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return SI_MAX_IO_GENERIC + 2;
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return 34;
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else
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return SI_MAX_IO_GENERIC + 4;
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return 36;
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case VARYING_SLOT_BFC1:
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if (is_varying)
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return SI_MAX_IO_GENERIC + 3;
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return 35;
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else
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return SI_MAX_IO_GENERIC + 5;
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return 37;
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case VARYING_SLOT_TEX0:
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case VARYING_SLOT_TEX1:
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case VARYING_SLOT_TEX2:
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@ -124,26 +131,25 @@ unsigned si_shader_io_get_unique_index(unsigned semantic, bool is_varying)
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case VARYING_SLOT_TEX5:
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case VARYING_SLOT_TEX6:
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case VARYING_SLOT_TEX7:
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return SI_MAX_IO_GENERIC + 6 + (semantic - VARYING_SLOT_TEX0);
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/* These are rarely used between LS and HS or ES and GS. */
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case VARYING_SLOT_CLIP_DIST0:
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return SI_MAX_IO_GENERIC + 6 + 8;
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case VARYING_SLOT_CLIP_DIST1:
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return SI_MAX_IO_GENERIC + 6 + 8 + 1;
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return 38 + (semantic - VARYING_SLOT_TEX0);
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case VARYING_SLOT_CLIP_VERTEX:
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return SI_MAX_IO_GENERIC + 6 + 8 + 2;
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return 46;
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/* Varyings present in both GLES and desktop GL must start at 49 after 16-bit varyings. */
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case VARYING_SLOT_CLIP_DIST0:
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return 49;
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case VARYING_SLOT_CLIP_DIST1:
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return 50;
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case VARYING_SLOT_PSIZ:
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return SI_MAX_IO_GENERIC + 6 + 8 + 3;
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return 51;
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/* These can't be written by LS, HS, and ES. */
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case VARYING_SLOT_LAYER:
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return SI_MAX_IO_GENERIC + 6 + 8 + 4;
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return 52;
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case VARYING_SLOT_VIEWPORT:
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return SI_MAX_IO_GENERIC + 6 + 8 + 5;
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return 53;
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case VARYING_SLOT_PRIMITIVE_ID:
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STATIC_ASSERT(SI_MAX_IO_GENERIC + 6 + 8 + 6 <= 63);
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return SI_MAX_IO_GENERIC + 6 + 8 + 6;
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return 54;
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}
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}
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@ -156,11 +156,6 @@ struct si_context;
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#define SI_MAX_ATTRIBS 16
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#define SI_MAX_VS_OUTPUTS 40
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/* Shader IO unique indices are supported for VARYING_SLOT_VARn with an
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* index smaller than this.
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*/
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#define SI_MAX_IO_GENERIC 32
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#define SI_NGG_PRIM_EDGE_FLAG_BITS ((1 << 9) | (1 << 19) | (1 << 29))
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/* SGPR user data indices */
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@ -476,7 +476,7 @@ static void si_build_param_exports(struct si_shader_context *ctx,
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continue;
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}
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if (semantic < VARYING_SLOT_VAR0 + SI_MAX_IO_GENERIC &&
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if ((semantic <= VARYING_SLOT_VAR31 || semantic >= VARYING_SLOT_VAR0_16BIT) &&
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shader->key.opt.kill_outputs &
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(1ull << si_shader_io_get_unique_index(semantic, true)))
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continue;
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@ -2565,7 +2565,7 @@ static void si_init_shader_selector_async(void *job, int thread_index)
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unsigned semantic = sel->info.output_semantic[i];
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unsigned id;
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if (semantic < VARYING_SLOT_MAX &&
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if ((semantic <= VARYING_SLOT_VAR31 || semantic >= VARYING_SLOT_VAR0_16BIT) &&
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semantic != VARYING_SLOT_POS &&
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semantic != VARYING_SLOT_PSIZ &&
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semantic != VARYING_SLOT_CLIP_VERTEX &&
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@ -2734,7 +2734,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
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semantic == VARYING_SLOT_TESS_LEVEL_OUTER ||
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(semantic >= VARYING_SLOT_PATCH0 && semantic < VARYING_SLOT_TESS_MAX)) {
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sel->patch_outputs_written |= 1ull << si_shader_io_get_unique_index_patch(semantic);
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} else if (semantic < VARYING_SLOT_MAX &&
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} else if ((semantic <= VARYING_SLOT_VAR31 || semantic >= VARYING_SLOT_VAR0_16BIT) &&
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semantic != VARYING_SLOT_EDGE) {
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sel->outputs_written |= 1ull << si_shader_io_get_unique_index(semantic, false);
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sel->outputs_written_before_ps |= 1ull
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@ -2807,7 +2807,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
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for (i = 0; i < sel->info.num_inputs; i++) {
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unsigned semantic = sel->info.input_semantic[i];
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if (semantic < VARYING_SLOT_MAX &&
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if ((semantic <= VARYING_SLOT_VAR31 || semantic >= VARYING_SLOT_VAR0_16BIT) &&
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semantic != VARYING_SLOT_PNTC) {
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sel->inputs_read |= 1ull << si_shader_io_get_unique_index(semantic, true);
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}
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