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brw/emit: Fix typo in recently added ADD3 assertion

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The current assertion fails as soon as a MAD with src0 and src2 being
immediate is detected.

The assertion was supposted to catch, "If it's ADD3, only one of src0
and src2 can be immediate." The detect this, the opcode test should have
been !=.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Fixes: c1c09e3c4a ("brw/emit: Add correct 3-source instruction assertions for each platform")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32436>
This commit is contained in:
Ian Romanick 2024-11-18 09:25:53 -08:00 • committed by Marge Bot
parent 25de9dcd76
commit c52ce6157f
1 changed files with 1 additions and 1 deletions
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2
src/intel/compiler/brw_eu_emit.c
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@ -562,7 +562,7 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest,
/* Having two immediate sources is allowed, but this should have been /* Having two immediate sources is allowed, but this should have been
* converted to a regular ADD by brw_fs_opt_algebraic. * converted to a regular ADD by brw_fs_opt_algebraic.
*/ */
assert(opcode == BRW_OPCODE_ADD3 || assert(opcode != BRW_OPCODE_ADD3 ||
!(src0.file == IMM && src2.file == IMM)); !(src0.file == IMM && src2.file == IMM));
} }