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i965/blorp: Fix clear code for ignoring colormask for XRGB formats on Gen9+
This is equivalent of 73b01e2711
for blorp.
v2 (Ken): No need to call _mesa_format_has_color_component() now
that the number of components is gotten from
_mesa_base_format_component_count().
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
parent
19948f1bf6
commit
c4ec0121a8
1 changed files with 26 additions and 7 deletions
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@ -25,6 +25,7 @@
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#include "main/blend.h"
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#include "main/fbobject.h"
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#include "main/renderbuffer.h"
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#include "main/glformats.h"
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#include "util/ralloc.h"
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@ -135,6 +136,29 @@ brw_blorp_const_color_program::~brw_blorp_const_color_program()
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ralloc_free(mem_ctx);
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}
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static bool
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set_write_disables(const struct intel_renderbuffer *irb,
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const GLubyte *color_mask, bool *color_write_disable)
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{
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/* Format information in the renderbuffer represents the requirements
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* given by the client. There are cases where the backing miptree uses,
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* for example, RGBA to represent RGBX. Since the client is only expecting
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* RGB we can treat alpha as not used and write whatever we like into it.
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*/
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const GLenum base_format = irb->Base.Base._BaseFormat;
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const int components = _mesa_base_format_component_count(base_format);
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bool disables = false;
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assert(components > 0);
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for (int i = 0; i < components; i++) {
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color_write_disable[i] = !color_mask[i];
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disables = disables || !color_mask[i];
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}
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return disables;
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}
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brw_blorp_clear_params::brw_blorp_clear_params(struct brw_context *brw,
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struct gl_framebuffer *fb,
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struct gl_renderbuffer *rb,
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@ -185,13 +209,8 @@ brw_blorp_clear_params::brw_blorp_clear_params(struct brw_context *brw,
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/* Constant color writes ignore everyting in blend and color calculator
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* state. This is not documented.
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*/
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for (int i = 0; i < 4; i++) {
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if (_mesa_format_has_color_component(irb->mt->format, i) &&
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!color_mask[i]) {
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color_write_disable[i] = true;
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wm_prog_key.use_simd16_replicated_data = false;
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}
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}
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if (set_write_disables(irb, color_mask, color_write_disable))
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wm_prog_key.use_simd16_replicated_data = false;
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if (irb->mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_NO_MCS &&
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!partial_clear && wm_prog_key.use_simd16_replicated_data &&
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