diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c index 587ae0b402e..c267a05a0a5 100644 --- a/src/intel/compiler/brw_compiler.c +++ b/src/intel/compiler/brw_compiler.c @@ -281,6 +281,17 @@ brw_get_compiler_config_value(const struct brw_compiler *compiler) return config; } +void +brw_device_sha1(char *hex, + const struct intel_device_info *devinfo) { + struct mesa_sha1 ctx; + _mesa_sha1_init(&ctx); + brw_device_sha1_update(&ctx, devinfo); + unsigned char result[20]; + _mesa_sha1_final(&ctx, result); + _mesa_sha1_format(hex, result); +} + unsigned brw_prog_data_size(gl_shader_stage stage) { diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index 003cd37e2f4..b47fd3bf667 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -29,6 +29,7 @@ #include "dev/intel_device_info.h" #include "isl/isl.h" #include "util/macros.h" +#include "util/mesa-sha1.h" #include "util/enum_operators.h" #include "util/ralloc.h" #include "util/u_math.h" @@ -1684,6 +1685,20 @@ brw_compiler_create(void *mem_ctx, const struct intel_device_info *devinfo); uint64_t brw_get_compiler_config_value(const struct brw_compiler *compiler); +/* Provides a string sha1 hash of all device information fields that could + * affect shader compilation. + */ +void +brw_device_sha1(char *hex, const struct intel_device_info *devinfo); + +/* For callers computing their own UUID or hash. Hashes all device + * information fields that could affect shader compilation into the provided + * sha1_ctx. + */ +void +brw_device_sha1_update(struct mesa_sha1 *sha1_ctx, + const struct intel_device_info *devinfo); + unsigned brw_prog_data_size(gl_shader_stage stage); diff --git a/src/intel/compiler/brw_device_sha1_gen_c.py b/src/intel/compiler/brw_device_sha1_gen_c.py new file mode 100755 index 00000000000..06aaa3b5478 --- /dev/null +++ b/src/intel/compiler/brw_device_sha1_gen_c.py @@ -0,0 +1,74 @@ +#!/usr/bin/env python3 +COPYRIGHT = """\ +/* + * Copyright 2024 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ +""" + +import argparse +import os +import sys + +from mako.template import Template +from mako import exceptions + +sys.path.append(f"{os.path.dirname(sys.argv[0])}/../dev") +import intel_device_info + +template = COPYRIGHT + """ + +/* DO NOT EDIT - This file generated automatically by intel_device_serialize_c.py script */ + +#include "dev/intel_device_info.h" +#include "brw_compiler.h" +#define SHA_UPDATE_FIELD(field) _mesa_sha1_update(ctx, &devinfo->field, sizeof(devinfo->field)) + +void +brw_device_sha1_update(struct mesa_sha1 *ctx, + const struct intel_device_info *devinfo) { +% for member in compiler_fields: + SHA_UPDATE_FIELD(${member.name}); +% endfor +} + +#undef SHA_UPDATE_FIELD + +""" + +def main(): + """print intel_device_serialize.c at the specified path""" + parser = argparse.ArgumentParser() + parser.add_argument('--outdir', required=True, + help='Directory to put the generated files in') + args = parser.parse_args() + path = os.path.join(args.outdir, 'brw_device_sha1_gen.c') + device_members = intel_device_info.TYPES_BY_NAME["intel_device_info"].members + compiler_fields = [field for field in device_members if field.compiler_field] + with open(path, 'w', encoding='utf-8') as f: + try: + f.write(Template(template).render(compiler_fields=compiler_fields)) + except: + print(exceptions.text_error_template().render(compiler_fields=compiler_fields)) + +if __name__ == "__main__": + main() diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build index 720c391e16f..896f8599fda 100644 --- a/src/intel/compiler/meson.build +++ b/src/intel/compiler/meson.build @@ -150,6 +150,12 @@ libintel_compiler_files = files( 'gfx6_gs_visitor.h', ) +brw_device_sha1_gen_src = custom_target('brw_device_sha1_gen.c', + input : ['brw_device_sha1_gen_c.py', '../dev/intel_device_info.py'], + output : ['brw_device_sha1_gen.c'], + command : [prog_python, '@INPUT0@', '--outdir', meson.current_build_dir()]) + + brw_nir_trig = custom_target( 'brw_nir_trig_workarounds.c', input : 'brw_nir_trig_workarounds.py', @@ -163,7 +169,7 @@ brw_nir_trig = custom_target( libintel_compiler = static_library( 'intel_compiler', - [libintel_compiler_files, brw_nir_trig, ir_expression_operation_h], + [libintel_compiler_files, brw_nir_trig, ir_expression_operation_h, [brw_device_sha1_gen_src]], include_directories : [inc_include, inc_src, inc_intel], c_args : [no_override_init_args], gnu_symbol_visibility : 'hidden',