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intel/perf: move register definition to special file
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4344>
(cherry picked from commit f5c5574f42)
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b754deecb0
commit
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3 changed files with 9 additions and 20 deletions
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@ -9868,7 +9868,7 @@
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"description": "intel/perf: move register definition to special file",
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"nominated": false,
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"nomination_type": null,
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"resolution": 4,
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"resolution": 1,
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"master_sha": null,
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"because_sha": null
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},
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@ -53,25 +53,6 @@
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#define MI_RPC_BO_END_OFFSET_BYTES (MI_RPC_BO_SIZE / 2)
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#define MI_FREQ_END_OFFSET_BYTES (3076)
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#define INTEL_MASK(high, low) (((1u<<((high)-(low)+1))-1)<<(low))
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#define GEN7_RPSTAT1 0xA01C
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#define GEN7_RPSTAT1_CURR_GT_FREQ_SHIFT 7
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#define GEN7_RPSTAT1_CURR_GT_FREQ_MASK INTEL_MASK(13, 7)
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#define GEN7_RPSTAT1_PREV_GT_FREQ_SHIFT 0
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#define GEN7_RPSTAT1_PREV_GT_FREQ_MASK INTEL_MASK(6, 0)
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#define GEN9_RPSTAT0 0xA01C
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#define GEN9_RPSTAT0_CURR_GT_FREQ_SHIFT 23
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#define GEN9_RPSTAT0_CURR_GT_FREQ_MASK INTEL_MASK(31, 23)
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#define GEN9_RPSTAT0_PREV_GT_FREQ_SHIFT 0
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#define GEN9_RPSTAT0_PREV_GT_FREQ_MASK INTEL_MASK(8, 0)
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#define GEN6_SO_PRIM_STORAGE_NEEDED 0x2280
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#define GEN7_SO_PRIM_STORAGE_NEEDED(n) (0x5240 + (n) * 8)
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#define GEN6_SO_NUM_PRIMS_WRITTEN 0x2288
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#define GEN7_SO_NUM_PRIMS_WRITTEN(n) (0x5200 + (n) * 8)
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#define MAP_READ (1 << 0)
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#define MAP_WRITE (1 << 1)
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@ -24,6 +24,8 @@
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#ifndef GEN_PERF_REGS_H
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#define GEN_PERF_REGS_H
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#define INTEL_MASK(high, low) (((1u<<((high)-(low)+1))-1)<<(low))
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/* GT core frequency counters */
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#define GEN7_RPSTAT1 0xA01C
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#define GEN7_RPSTAT1_CURR_GT_FREQ_SHIFT 7
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@ -51,4 +53,10 @@
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#define CS_INVOCATION_COUNT 0x2290
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#define PS_DEPTH_COUNT 0x2350
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/* Stream-out counters */
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#define GEN6_SO_PRIM_STORAGE_NEEDED 0x2280
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#define GEN7_SO_PRIM_STORAGE_NEEDED(n) (0x5240 + (n) * 8)
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#define GEN6_SO_NUM_PRIMS_WRITTEN 0x2288
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#define GEN7_SO_NUM_PRIMS_WRITTEN(n) (0x5200 + (n) * 8)
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#endif /* GEN_PERF_REGS_H */
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