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radeonsi: remove SI.vs.load.buffer.index
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
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55fe5ccb39
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c497321d31
2 changed files with 12 additions and 10 deletions
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@ -118,7 +118,6 @@ static void declare_input_vs(
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LLVMValueRef args[3];
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LLVMTypeRef vec4_type;
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LLVMValueRef input;
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struct lp_build_context * uint = &si_shader_ctx->radeon_bld.soa.bld_base.uint_bld;
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struct lp_build_context * base = &si_shader_ctx->radeon_bld.soa.bld_base.base;
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//struct pipe_vertex_element *velem = &rctx->vertex_elements->elements[input_index];
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unsigned chan;
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@ -133,11 +132,9 @@ static void declare_input_vs(
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/* Build the attribute offset */
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attribute_offset = lp_build_const_int32(base->gallivm, 0);
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/* Load the buffer index is always, which is always stored in VGPR0
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/* Load the buffer index, which is always stored in VGPR0
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* for Vertex Shaders */
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buffer_index_reg = build_intrinsic(base->gallivm->builder,
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"llvm.SI.vs.load.buffer.index", uint->elem_type, NULL, 0,
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LLVMReadNoneAttribute);
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buffer_index_reg = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_VERTEX_INDEX);
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vec4_type = LLVMVectorType(base->elem_type, 4);
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args[0] = t_list;
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@ -922,21 +919,25 @@ static const struct lp_build_tgsi_action txl_action = {
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static void create_function(struct si_shader_context *si_shader_ctx)
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{
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struct gallivm_state *gallivm = si_shader_ctx->radeon_bld.soa.bld_base.base.gallivm;
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LLVMTypeRef params[4], f, i8;
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LLVMTypeRef params[5], f, i8, i32;
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unsigned i;
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f = LLVMFloatTypeInContext(gallivm->context);
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i8 = LLVMInt8TypeInContext(gallivm->context);
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i32 = LLVMInt32TypeInContext(gallivm->context);
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params[SI_PARAM_CONST] = LLVMPointerType(f, CONST_ADDR_SPACE);
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params[SI_PARAM_SAMPLER] = LLVMPointerType(LLVMVectorType(i8, 16), CONST_ADDR_SPACE);
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params[SI_PARAM_RESOURCE] = LLVMPointerType(LLVMVectorType(i8, 32), CONST_ADDR_SPACE);
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if (si_shader_ctx->type == TGSI_PROCESSOR_VERTEX)
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if (si_shader_ctx->type == TGSI_PROCESSOR_VERTEX) {
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params[SI_PARAM_VERTEX_BUFFER] = params[SI_PARAM_SAMPLER];
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else
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params[SI_PARAM_VERTEX_INDEX] = i32;
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radeon_llvm_create_func(&si_shader_ctx->radeon_bld, params, 5);
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} else {
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params[SI_PARAM_PRIM_MASK] = LLVMInt32TypeInContext(gallivm->context);
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radeon_llvm_create_func(&si_shader_ctx->radeon_bld, params, 4);
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radeon_llvm_create_func(&si_shader_ctx->radeon_bld, params, 4);
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}
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radeon_llvm_shader_type(si_shader_ctx->radeon_bld.main_fn, si_shader_ctx->type);
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for (i = SI_PARAM_CONST; i <= SI_PARAM_VERTEX_BUFFER; ++i) {
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@ -44,6 +44,7 @@
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/* VS only parameters */
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#define SI_PARAM_VERTEX_BUFFER 3
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#define SI_PARAM_VERTEX_INDEX 4
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/* PS only parameters */
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#define SI_PARAM_PRIM_MASK 3
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