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radeonsi: don't invoke si_decompress_depth if textures are not dirty at binding
This eliminates the overhead of invoking si_decompress_depth. The complication here is that we need to update needs_depth_decompress_mask every time we update dirty_level_mask. Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13492>
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5 changed files with 47 additions and 11 deletions
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@ -741,6 +741,7 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
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if ((eliminate_needed || fmask_decompress_needed) &&
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!(tex->dirty_level_mask & (1 << level))) {
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tex->dirty_level_mask |= 1 << level;
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si_set_sampler_depth_decompress_mask(sctx, tex);
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p_atomic_inc(&sctx->screen->compressed_colortex_counter);
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}
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@ -490,14 +490,14 @@ static bool color_needs_decompression(struct si_texture *tex)
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(tex->dirty_level_mask && (tex->cmask_buffer || tex->surface.meta_offset));
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}
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static bool depth_needs_decompression(struct si_texture *tex)
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static bool depth_needs_decompression(struct si_texture *tex, bool is_stencil)
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{
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/* If the depth/stencil texture is TC-compatible, no decompression
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* will be done. The decompression function will only flush DB caches
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* to make it coherent with shaders. That's necessary because the driver
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* doesn't flush DB caches in any other case.
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*/
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return tex->db_compatible;
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return tex->db_compatible && (tex->dirty_level_mask || (is_stencil && tex->stencil_dirty_level_mask));
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}
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static void si_reset_sampler_view_slot(struct si_samplers *samplers, unsigned slot,
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@ -548,15 +548,24 @@ static void si_set_sampler_views(struct si_context *sctx, unsigned shader,
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samplers->needs_depth_decompress_mask &= ~(1u << slot);
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samplers->needs_color_decompress_mask &= ~(1u << slot);
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} else {
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if (depth_needs_decompression(tex)) {
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samplers->needs_depth_decompress_mask |= 1u << slot;
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} else {
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samplers->needs_depth_decompress_mask &= ~(1u << slot);
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}
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if (color_needs_decompression(tex)) {
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samplers->needs_color_decompress_mask |= 1u << slot;
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} else {
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if (tex->is_depth) {
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samplers->has_depth_tex_mask |= 1u << slot;
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samplers->needs_color_decompress_mask &= ~(1u << slot);
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if (depth_needs_decompression(tex, sview->is_stencil_sampler)) {
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samplers->needs_depth_decompress_mask |= 1u << slot;
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} else {
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samplers->needs_depth_decompress_mask &= ~(1u << slot);
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}
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} else {
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samplers->has_depth_tex_mask &= ~(1u << slot);
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samplers->needs_depth_decompress_mask &= ~(1u << slot);
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if (color_needs_decompression(tex)) {
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samplers->needs_color_decompress_mask |= 1u << slot;
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} else {
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samplers->needs_color_decompress_mask &= ~(1u << slot);
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}
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}
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if (vi_dcc_enabled(tex, sview->base.u.tex.first_level) &&
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@ -597,6 +606,7 @@ static void si_set_sampler_views(struct si_context *sctx, unsigned shader,
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unbound_mask |= BITFIELD_RANGE(start_slot + count, unbind_num_trailing_slots);
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samplers->enabled_mask &= ~unbound_mask;
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samplers->has_depth_tex_mask &= ~unbound_mask;
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samplers->needs_depth_decompress_mask &= ~unbound_mask;
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samplers->needs_color_decompress_mask &= ~unbound_mask;
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@ -613,6 +623,11 @@ static void si_update_shader_needs_decompress_mask(struct si_context *sctx, unsi
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sctx->shader_needs_decompress_mask |= shader_bit;
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else
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sctx->shader_needs_decompress_mask &= ~shader_bit;
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if (samplers->has_depth_tex_mask)
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sctx->shader_has_depth_tex |= shader_bit;
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else
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sctx->shader_has_depth_tex &= ~shader_bit;
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}
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static void si_pipe_set_sampler_views(struct pipe_context *ctx, enum pipe_shader_type shader,
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@ -2434,7 +2449,7 @@ static void si_make_texture_handle_resident(struct pipe_context *ctx, uint64_t h
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if (sview->base.texture->target != PIPE_BUFFER) {
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struct si_texture *tex = (struct si_texture *)sview->base.texture;
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if (depth_needs_decompression(tex)) {
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if (depth_needs_decompression(tex, sview->is_stencil_sampler)) {
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util_dynarray_append(&sctx->resident_tex_needs_depth_decompress,
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struct si_texture_handle *, tex_handle);
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}
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@ -732,6 +732,7 @@ struct si_samplers {
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/* The i-th bit is set if that element is enabled (non-NULL resource). */
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unsigned enabled_mask;
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uint32_t has_depth_tex_mask;
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uint32_t needs_depth_decompress_mask;
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uint32_t needs_color_decompress_mask;
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};
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@ -1072,6 +1073,7 @@ struct si_context {
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unsigned descriptors_dirty;
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unsigned shader_pointers_dirty;
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unsigned shader_needs_decompress_mask;
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unsigned shader_has_depth_tex;
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struct si_buffer_resources internal_bindings;
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struct si_buffer_resources const_and_shader_buffers[SI_NUM_SHADERS];
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struct si_samplers samplers[SI_NUM_SHADERS];
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@ -2671,6 +2671,21 @@ static void si_init_depth_surface(struct si_context *sctx, struct si_surface *su
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surf->depth_initialized = true;
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}
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void si_set_sampler_depth_decompress_mask(struct si_context *sctx, struct si_texture *tex)
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{
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/* Check all sampler bindings in all shaders where depth textures are bound, and update
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* which samplers should be decompressed.
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*/
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u_foreach_bit(sh, sctx->shader_has_depth_tex) {
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u_foreach_bit(i, sctx->samplers[sh].has_depth_tex_mask) {
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if (sctx->samplers[sh].views[i]->texture == &tex->buffer.b.b) {
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sctx->samplers[sh].needs_depth_decompress_mask |= 1 << i;
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sctx->shader_needs_decompress_mask |= 1 << sh;
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}
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}
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}
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}
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void si_update_fb_dirtiness_after_rendering(struct si_context *sctx)
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{
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if (sctx->decompression_enabled)
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@ -2684,6 +2699,8 @@ void si_update_fb_dirtiness_after_rendering(struct si_context *sctx)
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if (tex->surface.has_stencil)
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tex->stencil_dirty_level_mask |= 1 << surf->u.tex.level;
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si_set_sampler_depth_decompress_mask(sctx, tex);
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}
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unsigned compressed_cb_mask = sctx->framebuffer.compressed_cb_mask;
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@ -539,6 +539,7 @@ struct pipe_sampler_view *si_create_sampler_view_custom(struct pipe_context *ctx
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const struct pipe_sampler_view *state,
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unsigned width0, unsigned height0,
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unsigned force_level);
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void si_set_sampler_depth_decompress_mask(struct si_context *sctx, struct si_texture *tex);
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void si_update_fb_dirtiness_after_rendering(struct si_context *sctx);
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void si_mark_display_dcc_dirty(struct si_context *sctx, struct si_texture *tex);
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void si_update_ps_iter_samples(struct si_context *sctx);
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