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r600g: fix num_banks interpretation on eg+

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Field is encoded:
0 = 4 banks
1 = 8 banks
2 = 16 banks

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
This commit is contained in:
Alex Deucher 2011-06-22 12:33:01 -04:00
parent eb2c9b5814
commit c4930cb417
1 changed files with 14 additions and 1 deletions
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15
src/gallium/winsys/r600/drm/r600_drm.c
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@ -156,7 +156,20 @@ static int eg_interpret_tiling(struct radeon *radeon, uint32_t tiling_config)
return -EINVAL;
}
radeon->tiling_info.num_banks = (tiling_config & 0xf0) >> 4;
switch ((tiling_config & 0xf0) >> 4) {
case 0:
radeon->tiling_info.num_banks = 4;
break;
case 1:
radeon->tiling_info.num_banks = 8;
break;
case 2:
radeon->tiling_info.num_banks = 16;
break;
default:
return -EINVAL;
}
switch ((tiling_config & 0xf00) >> 8) {
case 0: