fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-24 13:10:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

ac: add radeon_surf::htile_slice_size

Browse source 
Vulkan needs it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Nicolai Hähnle 2017-05-10 22:52:27 +02:00
parent 98a2492290
commit c488bf24ed
2 changed files with 6 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/amd/common/ac_surface.c
View file

@ -350,6 +350,7 @@ static int gfx6_compute_level(ADDR_HANDLE addrlib,
if (ret == ADDR_OK) {
surf->htile_size = AddrHtileOut->htileBytes;
surf->htile_slice_size = AddrHtileOut->sliceSize;
surf->htile_alignment = AddrHtileOut->baseAlign;
}
}
@ -580,6 +581,7 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib,
surf->dcc_size = 0;
surf->dcc_alignment = 1;
surf->htile_size = 0;
surf->htile_slice_size = 0;
surf->htile_alignment = 1;
/* Calculate texture layout information. */
@ -775,6 +777,7 @@ static int gfx9_compute_miptree(ADDR_HANDLE addrlib,
surf->u.gfx9.htile.rb_aligned = hin.hTileFlags.rbAligned;
surf->u.gfx9.htile.pipe_aligned = hin.hTileFlags.pipeAligned;
surf->htile_size = hout.htileBytes;
surf->htile_slice_size = hout.sliceSize;
surf->htile_alignment = hout.baseAlign;
} else {
/* DCC */
@ -961,6 +964,7 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib,
surf->surf_size = 0;
surf->dcc_size = 0;
surf->htile_size = 0;
surf->htile_slice_size = 0;
surf->u.gfx9.surf_offset = 0;
surf->u.gfx9.stencil_offset = 0;
surf->u.gfx9.fmask_size = 0;

2
src/amd/common/ac_surface.h
View file

@ -166,6 +166,8 @@ struct radeon_surf {
uint64_t dcc_size;
uint64_t htile_size;
uint32_t htile_slice_size;
uint32_t surf_alignment;
uint32_t dcc_alignment;
uint32_t htile_alignment;