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nv50: Fix GPU_READING/WRITING bit removal

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Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
CC: "9.1, 9.2, 10.0" <mesa-stable@lists.freedesktop.org>
This commit is contained in:
Ilia Mirkin 2013-12-01 23:13:56 -05:00 • committed by Maarten Lankhorst
parent 79e6512629
commit c45cf6199f
2 changed files with 3 additions and 3 deletions
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4
src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
View file

@ -61,7 +61,7 @@ nv50_validate_fb(struct nv50_context *nv50)
if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING)
nv50->state.rt_serialize = TRUE;
mt->base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
mt->base.status &= NOUVEAU_BUFFER_STATUS_GPU_READING;
mt->base.status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING;
/* only register for writing, otherwise we'd always serialize here */
BCTX_REFN(nv50->bufctx_3d, FB, &mt->base, WR);
@ -91,7 +91,7 @@ nv50_validate_fb(struct nv50_context *nv50)
if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING)
nv50->state.rt_serialize = TRUE;
mt->base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
mt->base.status &= NOUVEAU_BUFFER_STATUS_GPU_READING;
mt->base.status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING;
BCTX_REFN(nv50->bufctx_3d, FB, &mt->base, WR);
} else {

2
src/gallium/drivers/nouveau/nv50/nv50_tex.c
View file

@ -271,7 +271,7 @@ nv50_validate_tic(struct nv50_context *nv50, int s)
nv50->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32);
res->status &= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
res->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING;
res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
BCTX_REFN(nv50->bufctx_3d, TEXTURES, res, RD);