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radeon/llvm: Add i1 registers for SI.

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This commit is contained in:
Tom Stellard 2012-07-25 08:27:50 -04:00
parent bdda1cb914
commit c424975572
1 changed files with 2 additions and 0 deletions
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2
src/gallium/drivers/radeon/SIISelLowering.cpp
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@ -27,6 +27,8 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
addRegisterClass(MVT::f32, &AMDGPU::VReg_32RegClass);
addRegisterClass(MVT::i32, &AMDGPU::VReg_32RegClass);
addRegisterClass(MVT::i64, &AMDGPU::VReg_64RegClass);
addRegisterClass(MVT::i1, &AMDGPU::SCCRegRegClass);
addRegisterClass(MVT::i1, &AMDGPU::VCCRegRegClass);
addRegisterClass(MVT::v4i32, &AMDGPU::SReg_128RegClass);
addRegisterClass(MVT::v8i32, &AMDGPU::SReg_256RegClass);