fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-25 00:00:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

pan/va: Use 64-bit lowering for texturing

Browse source 
Texture instructions on Valhall take 64-bit sources. Now that we have
infrastructure to handle this properly, we don't need to use a non-SSA node to
hack around the optimization.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16585>
This commit is contained in:
Alyssa Rosenzweig 2022-05-09 15:56:25 -04:00 • committed by Marge Bot
parent 89a3746bc1
commit c387096eca
2 changed files with 14 additions and 18 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

24
src/panfrost/bifrost/bifrost_compile.c
View file

@ -3478,11 +3478,6 @@ bi_emit_tex_valhall(bi_builder *b, nir_tex_instr *instr)
image_src = bi_lshift_or_i32(b, sampler, image_src, bi_imm_u8(0));
image_src = bi_lshift_or_i32(b, texture, image_src, bi_imm_u8(16));
bi_index rsrc = bi_temp_reg(b->shader);
bi_index words[] = { image_src, bi_zero() };
bi_make_vec_to(b, rsrc, words, NULL, 2, 32);
bi_index rsrc_hi = bi_word(rsrc, 1);
unsigned mask = BI_WRITE_MASK_RGBA;
enum bi_register_format regfmt = bi_reg_fmt_for_nir(instr->dest_type);
enum bi_dimension dim = valhall_tex_dimension(instr->sampler_dim);
@ -3492,20 +3487,21 @@ bi_emit_tex_valhall(bi_builder *b, nir_tex_instr *instr)
case nir_texop_tex:
case nir_texop_txl:
case nir_texop_txb:
bi_tex_single_to(b, dest, idx, rsrc, rsrc_hi, instr->is_array,
dim, regfmt, instr->is_shadow, explicit_offset,
lod_mode, mask, sr_count);
bi_tex_single_to(b, dest, idx, image_src, bi_zero(),
instr->is_array, dim, regfmt, instr->is_shadow,
explicit_offset, lod_mode, mask, sr_count);
break;
case nir_texop_txf:
case nir_texop_txf_ms:
bi_tex_fetch_to(b, dest, idx, rsrc, rsrc_hi, instr->is_array,
dim, regfmt, explicit_offset, mask, sr_count);
bi_tex_fetch_to(b, dest, idx, image_src, bi_zero(),
instr->is_array, dim, regfmt, explicit_offset,
mask, sr_count);
break;
case nir_texop_tg4:
bi_tex_gather_to(b, dest, idx, rsrc, rsrc_hi, instr->is_array,
dim, instr->component, false, regfmt,
instr->is_shadow, explicit_offset, mask,
sr_count);
bi_tex_gather_to(b, dest, idx, image_src, bi_zero(),
instr->is_array, dim, instr->component, false,
regfmt, instr->is_shadow, explicit_offset,
mask, sr_count);
break;
default:
unreachable("Unhandled Valhall texture op");

8
src/panfrost/bifrost/valhall/ISA.xml
View file

@ -2388,7 +2388,7 @@
<sr write="true" flags="false"/>
<sr read="true" flags="false"/>
<src>Image to read from</src>
<src size="64">Image to read from</src>
</ins>
<ins name="TEX_SINGLE" title="Texture load" opcode="0x128" unit="T">
@ -2411,7 +2411,7 @@
<sr write="true" flags="false"/>
<sr read="true" flags="false"/>
<src>Image to read from</src>
<src size="64">Image to read from</src>
</ins>
<ins name="TEX_GATHER" title="Texel gather" opcode="0x129" unit="T">
@ -2435,7 +2435,7 @@
<sr write="true" flags="false"/>
<sr read="true" flags="false"/>
<src>Image to read from</src>
<src size="64">Image to read from</src>
</ins>
<ins name="TEX_DUAL" title="Dual texture" opcode="0x12F" unit="T">
@ -2458,7 +2458,7 @@
<sr write="true" flags="false"/>
<sr read="true" flags="false"/>
<src>Image to read from</src>
<src size="64">Image to read from</src>
</ins>
<ins name="VAR_TEX_BUF_SINGLE" title="Fused varying-texturing" opcode="0x130" unit="VT">