diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c
index 16deb26dc78..e64bbcae5b3 100644
--- a/src/gallium/drivers/iris/iris_clear.c
+++ b/src/gallium/drivers/iris/iris_clear.c
@@ -68,6 +68,7 @@ can_fast_clear_color(struct iris_context *ice,
                      struct pipe_resource *p_res,
                      unsigned level,
                      const struct pipe_box *box,
+                     bool render_condition_enabled,
                      enum isl_format render_format,
                      union isl_color_value color)
 {
@@ -86,6 +87,16 @@ can_fast_clear_color(struct iris_context *ice,
       return false;
    }
 
+   /* Avoid conditional fast clears to maintain correct tracking of the aux
+    * state (see iris_resource_finish_write for more info). Note that partial
+    * fast clears (if they existed) would not pose a problem with conditional
+    * rendering.
+    */
+   if (render_condition_enabled &&
+       ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT) {
+      return false;
+   }
+
    /* Disable sRGB fast-clears for non-0/1 color values. For texturing and
     * draw calls, HW expects the clear color to be in two different color
     * spaces after sRGB fast-clears - sRGB in the former and linear in the
@@ -212,23 +223,6 @@ fast_clear_color(struct iris_context *ice,
                                  sizeof(color));
 
    if (color_changed) {
-      /* We decided that we are going to fast clear, and the color is
-       * changing. But if we have a predicate bit set, the predication
-       * affects whether we should clear or not, and if we shouldn't, we
-       * also shouldn't update the clear color.
-       *
-       * However, we can't simply predicate-update the clear color (the
-       * commands don't support that). And we would lose track of the
-       * color, preventing us from doing some optimizations later.
-       *
-       * Since changing the clear color when the predication bit is enabled
-       * is not something that should happen often, we stall on the CPU here
-       * to resolve the predication, and then proceed.
-       */
-      batch->screen->vtbl.resolve_conditional_render(ice);
-      if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
-         return;
-
       /* If we are clearing to a new clear value, we need to resolve fast
        * clears from other levels/layers first, since we can't have different
        * levels/layers with different fast clear colors.
@@ -365,6 +359,7 @@ clear_color(struct iris_context *ice,
    iris_batch_maybe_flush(batch, 1500);
 
    bool can_fast_clear = can_fast_clear_color(ice, p_res, level, box,
+                                              render_condition_enabled,
                                               format, color);
    if (can_fast_clear) {
       fast_clear_color(ice, res, level, box, format, color,
@@ -414,6 +409,7 @@ can_fast_clear_depth(struct iris_context *ice,
                      struct iris_resource *res,
                      unsigned level,
                      const struct pipe_box *box,
+                     bool render_condition_enabled,
                      float depth)
 {
    struct pipe_resource *p_res = (void *) res;
@@ -431,6 +427,15 @@ can_fast_clear_depth(struct iris_context *ice,
       return false;
    }
 
+   /* Avoid conditional fast clears to maintain correct tracking of the aux
+    * state (see iris_resource_finish_write for more info). Note that partial
+    * fast clears would not pose a problem with conditional rendering.
+    */
+   if (render_condition_enabled &&
+       ice->state.predicate == IRIS_PREDICATE_STATE_USE_BIT) {
+      return false;
+   }
+
    if (!(res->aux.has_hiz & (1 << level)))
       return false;
 
@@ -459,27 +464,6 @@ fast_clear_depth(struct iris_context *ice,
     * flags out of the HiZ buffer into the real depth buffer.
     */
    if (res->aux.clear_color.f32[0] != depth) {
-      /* We decided that we are going to fast clear, and the color is
-       * changing. But if we have a predicate bit set, the predication
-       * affects whether we should clear or not, and if we shouldn't, we
-       * also shouldn't update the clear color.
-       *
-       * However, we can't simply predicate-update the clear color (the
-       * commands don't support that). And we would lose track of the
-       * color, preventing us from doing some optimizations later.
-       *
-       * For depth clears, things are even more complicated, because here we
-       * resolve the other levels/layers if they have a different color than
-       * the current one. That resolve can be predicated, but we also set those
-       * layers as ISL_AUX_STATE_RESOLVED, and this can't be predicated.
-       * Keeping track of the aux state when predication is involved is just
-       * even more complex, so the easiest thing to do when the fast clear
-       * depth is changing is to stall on the CPU and resolve the predication.
-       */
-      batch->screen->vtbl.resolve_conditional_render(ice);
-      if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER)
-         return;
-
       for (unsigned res_level = 0; res_level < res->surf.levels; res_level++) {
          if (!(res->aux.has_hiz & (1 << res_level)))
             continue;
@@ -573,7 +557,8 @@ clear_depth_stencil(struct iris_context *ice,
 
    iris_get_depth_stencil_resources(p_res, &z_res, &stencil_res);
    if (z_res && clear_depth &&
-       can_fast_clear_depth(ice, z_res, level, box, depth)) {
+       can_fast_clear_depth(ice, z_res, level, box, render_condition_enabled,
+                            depth)) {
       fast_clear_depth(ice, z_res, level, box, depth);
       iris_flush_and_dirty_for_history(ice, batch, res, 0,
                                        "cache history: post fast Z clear");