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radeonsi: remove unused TCS/TES SGPR fields

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We stopped using them when we switched to ac_nir_lower_hs_outputs_to_mem.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21860>
This commit is contained in:
Marek Olšák 2023-03-10 20:48:21 -05:00 • committed by Marge Bot
parent 2b04d6cada
commit c2f3339783
2 changed files with 2 additions and 8 deletions
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3
src/gallium/drivers/radeonsi/si_shader_internal.h
View file

@ -68,13 +68,10 @@ struct si_shader_args {
/* API TCS */
/* Offsets where TCS outputs and TCS patch outputs live in LDS (<= 16K):
* [0:15] = TCS output patch0 offset / 4, max = 16K / 4 = 4K
* [16:31] = TCS output patch0 offset for per-patch / 4, max = 16K / 4 = 4K
*/
struct ac_arg tcs_out_lds_offsets;
/* Layout of TCS outputs / TES inputs:
* [0:12] = stride between output patches in DW, num_outputs * num_vertices * 4
* max = 32*32*4 + 32*4 = 4224
* [13:18] = gl_PatchVerticesIn, max = 32
* [19:31] = high 13 bits of the 32-bit address of tessellation ring buffers
*/

7
src/gallium/drivers/radeonsi/si_state_draw.cpp
View file

@ -781,9 +781,6 @@ static void si_emit_derived_tess_state(struct si_context *sctx)
/* Compute userdata SGPRs. */
assert(((input_vertex_size / 4) & ~0xff) == 0);
assert(((output_vertex_size / 4) & ~0xff) == 0);
assert(((output_patch_size / 4) & ~0x1fff) == 0);
assert(((output_patch0_offset / 4) & ~0xffff) == 0);
assert(((perpatch_output_offset / 4) & ~0xffff) == 0);
assert(num_tcs_input_cp <= 32);
assert(num_tcs_output_cp <= 32);
@ -794,8 +791,8 @@ static void si_emit_derived_tess_state(struct si_context *sctx)
si_resource(sctx->tess_rings_tmz) : si_resource(sctx->tess_rings))->gpu_address;
assert((ring_va & u_bit_consecutive(0, 19)) == 0);
unsigned tcs_out_layout = (output_patch_size / 4) | (num_tcs_input_cp << 13) | ring_va;
unsigned tcs_out_offsets = (output_patch0_offset / 4) | ((perpatch_output_offset / 4) << 16);
unsigned tcs_out_layout = (num_tcs_input_cp << 13) | ring_va;
unsigned tcs_out_offsets = ((perpatch_output_offset / 4) << 16);
unsigned offchip_layout =
(num_patches - 1) | ((num_tcs_output_cp - 1) << 6) |
((pervertex_output_patch_size * num_patches) << 11);