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nir/opt_varyings: Don't promote flat inputs when moving post-dominator.

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Promoting flat inputs should only happen while assigning FS input
slot groups. Otherwise we risk adding extra input slots, which
is undesireable.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29208>
This commit is contained in:
Timur Kristóf 2024-05-21 19:26:12 +02:00 • committed by Marge Bot
parent 9dad0ced52
commit c23c5c0a07
1 changed files with 25 additions and 19 deletions
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44
src/compiler/nir/nir_opt_varyings.c
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@ -3092,7 +3092,7 @@ try_move_postdominator(struct linkage_info *linkage,
* the original load(s).
*/
if (linkage->consumer_stage == MESA_SHADER_FRAGMENT &&
alu_interp > FLAG_INTERP_FLAT) {
alu_interp != FLAG_INTERP_FLAT) {
nir_def *baryc = NULL;
/* Determine the barycentric coordinates. */
@ -3109,17 +3109,22 @@ try_move_postdominator(struct linkage_info *linkage,
case FLAG_INTERP_LINEAR_SAMPLE:
baryc = nir_load_barycentric_sample(b, 32);
break;
default:
baryc = first_load->src[0].ssa;
break;
}
nir_intrinsic_instr *baryc_i =
nir_instr_as_intrinsic(baryc->parent_instr);
if (baryc != first_load->src[0].ssa) {
nir_intrinsic_instr *baryc_i =
nir_instr_as_intrinsic(baryc->parent_instr);
if (alu_interp == FLAG_INTERP_LINEAR_PIXEL ||
alu_interp == FLAG_INTERP_LINEAR_CENTROID ||
alu_interp == FLAG_INTERP_LINEAR_SAMPLE)
nir_intrinsic_set_interp_mode(baryc_i, INTERP_MODE_NOPERSPECTIVE);
else
nir_intrinsic_set_interp_mode(baryc_i, INTERP_MODE_SMOOTH);
if (alu_interp == FLAG_INTERP_LINEAR_PIXEL ||
alu_interp == FLAG_INTERP_LINEAR_CENTROID ||
alu_interp == FLAG_INTERP_LINEAR_SAMPLE)
nir_intrinsic_set_interp_mode(baryc_i, INTERP_MODE_NOPERSPECTIVE);
else
nir_intrinsic_set_interp_mode(baryc_i, INTERP_MODE_SMOOTH);
}
new_input = nir_load_interpolated_input(
b, 1, new_bit_size, baryc, nir_imm_int(b, 0),
@ -3129,8 +3134,13 @@ try_move_postdominator(struct linkage_info *linkage,
new_bit_size,
.io_semantics = nir_intrinsic_io_semantics(first_load));
mask = new_bit_size == 16 ? linkage->interp_fp16_mask
: linkage->interp_fp32_mask;
if (alu_interp == FLAG_INTERP_CONVERGENT) {
mask = new_bit_size == 16 ? linkage->convergent16_mask
: linkage->convergent32_mask;
} else {
mask = new_bit_size == 16 ? linkage->interp_fp16_mask
: linkage->interp_fp32_mask;
}
} else if (linkage->consumer_stage == MESA_SHADER_TESS_EVAL &&
alu_interp > FLAG_INTERP_FLAT) {
nir_def *zero = nir_imm_int(b, 0);
@ -3179,6 +3189,8 @@ try_move_postdominator(struct linkage_info *linkage,
mask = new_bit_size == 16 ? linkage->flat16_mask
: linkage->flat32_mask;
} else {
assert(linkage->consumer_stage != MESA_SHADER_FRAGMENT || alu_interp == FLAG_INTERP_FLAT);
new_input =
nir_load_input(b, 1, new_bit_size, nir_imm_int(b, 0),
.base = nir_intrinsic_base(first_load),
@ -3187,14 +3199,8 @@ try_move_postdominator(struct linkage_info *linkage,
new_bit_size,
.io_semantics = nir_intrinsic_io_semantics(first_load));
if (linkage->consumer_stage == MESA_SHADER_FRAGMENT &&
alu_interp == FLAG_INTERP_CONVERGENT) {
mask = new_bit_size == 16 ? linkage->convergent16_mask
: linkage->convergent32_mask;
} else {
mask = new_bit_size == 16 ? linkage->flat16_mask
: linkage->flat32_mask;
}
mask = new_bit_size == 16 ? linkage->flat16_mask
: linkage->flat32_mask;
}
assert(!BITSET_TEST(linkage->no_varying32_mask, slot_index));