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intel/compiler: Broadcast lower code should check 64-bit int support

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This will affect MTL which will have fp64 support without int64
support.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19284>
This commit is contained in:
Jordan Justen 2022-10-24 12:52:20 -04:00 • committed by Marge Bot
parent 2da7ec0db9
commit c238699afa
1 changed files with 2 additions and 2 deletions
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4
src/intel/compiler/brw_eu_emit.c
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@ -3496,7 +3496,7 @@ brw_broadcast(struct brw_codegen *p,
src = align1 ? stride(suboffset(src, i), 0, 1, 0) :
stride(suboffset(src, 4 * i), 0, 4, 1);
if (type_sz(src.type) > 4 && !devinfo->has_64bit_float) {
if (type_sz(src.type) > 4 && !devinfo->has_64bit_int) {
brw_MOV(p, subscript(dst, BRW_REGISTER_TYPE_D, 0),
subscript(src, BRW_REGISTER_TYPE_D, 0));
brw_set_default_swsb(p, tgl_swsb_null());
@ -3554,7 +3554,7 @@ brw_broadcast(struct brw_codegen *p,
/* Use indirect addressing to fetch the specified component. */
if (type_sz(src.type) > 4 &&
(devinfo->platform == INTEL_PLATFORM_CHV || intel_device_info_is_9lp(devinfo) ||
!devinfo->has_64bit_float)) {
!devinfo->has_64bit_int)) {
/* From the Cherryview PRM Vol 7. "Register Region Restrictions":
*
* "When source or destination datatype is 64b or operation is