From c2342e67701229e36feeee312d2b3ce827cf874a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 6 Jun 2022 04:47:56 -0400 Subject: [PATCH] radeonsi: move GS_STATE bits to the end to make space at the beginning Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/gfx10_shader_ngg.c | 12 ++++++------ src/gallium/drivers/radeonsi/si_shader.h | 16 ++++++++-------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c b/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c index 1e7e0bd05d2..714b3613ce4 100644 --- a/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c +++ b/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c @@ -106,7 +106,7 @@ static LLVMValueRef ngg_get_vertices_per_prim(struct si_shader_context *ctx, uns *num_vertices = 3; /* Extract OUTPRIM field. */ - LLVMValueRef num = si_unpack_param(ctx, ctx->vs_state_bits, 2, 2); + LLVMValueRef num = si_unpack_param(ctx, ctx->vs_state_bits, 29, 2); return LLVMBuildAdd(ctx->ac.builder, num, ctx->ac.i32_1, ""); } } else { @@ -895,7 +895,7 @@ static void cull_primitive(struct si_shader_context *ctx, assert(!(shader->key.ge.opt.ngg_culling & SI_NGG_CULL_FRONT_FACE)); } else { /* Get the small prim filter precision. */ - small_prim_precision = si_unpack_param(ctx, ctx->vs_state_bits, 7, 4); + small_prim_precision = si_unpack_param(ctx, ctx->vs_state_bits, 22, 4); small_prim_precision = LLVMBuildOr(builder, small_prim_precision, LLVMConstInt(ctx->ac.i32, 0x70, 0), ""); small_prim_precision = @@ -1553,7 +1553,7 @@ void gfx10_ngg_build_end(struct si_shader_context *ctx) ac_build_ifcc(&ctx->ac, is_gs_thread, 5400); /* Extract the PROVOKING_VTX_INDEX field. */ - LLVMValueRef provoking_vtx_in_prim = si_unpack_param(ctx, ctx->vs_state_bits, 4, 2); + LLVMValueRef provoking_vtx_in_prim = si_unpack_param(ctx, ctx->vs_state_bits, 27, 2); /* provoking_vtx_index = vtxindex[provoking_vtx_in_prim]; */ LLVMValueRef indices = ac_build_gather_values(&ctx->ac, vtxindex, 3); @@ -1570,7 +1570,7 @@ void gfx10_ngg_build_end(struct si_shader_context *ctx) if (ctx->screen->use_ngg_streamout && !info->base.vs.blit_sgprs_amd) { assert(!unterminated_es_if_block); - tmp = si_unpack_param(ctx, ctx->vs_state_bits, 6, 1); + tmp = si_unpack_param(ctx, ctx->vs_state_bits, 26, 1); tmp = LLVMBuildTrunc(builder, tmp, ctx->ac.i1, ""); ac_build_ifcc(&ctx->ac, tmp, 5029); /* if (STREAMOUT_QUERY_ENABLED) */ tmp = LLVMBuildICmp(builder, LLVMIntEQ, get_wave_id_in_tg(ctx), ctx->ac.i32_0, ""); @@ -1976,7 +1976,7 @@ void gfx10_ngg_gs_build_end(struct si_shader_context *ctx) /* Write shader query data. */ if (ctx->screen->use_ngg_streamout) { - tmp = si_unpack_param(ctx, ctx->vs_state_bits, 6, 1); + tmp = si_unpack_param(ctx, ctx->vs_state_bits, 26, 1); tmp = LLVMBuildTrunc(builder, tmp, ctx->ac.i1, ""); ac_build_ifcc(&ctx->ac, tmp, 5109); /* if (STREAMOUT_QUERY_ENABLED) */ unsigned num_query_comps = ctx->so.num_outputs ? 8 : 4; @@ -2177,7 +2177,7 @@ void gfx10_ngg_gs_build_end(struct si_shader_context *ctx) LLVMValueRef is_odd = LLVMBuildLShr(builder, flags, ctx->ac.i8_1, ""); is_odd = LLVMBuildTrunc(builder, is_odd, ctx->ac.i1, ""); LLVMValueRef flatshade_first = LLVMBuildICmp( - builder, LLVMIntEQ, si_unpack_param(ctx, ctx->vs_state_bits, 4, 2), ctx->ac.i32_0, ""); + builder, LLVMIntEQ, si_unpack_param(ctx, ctx->vs_state_bits, 27, 2), ctx->ac.i32_0, ""); ac_build_triangle_strip_indices_to_triangle(&ctx->ac, is_odd, flatshade_first, prim.index); } diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h index be57b20a472..547c57dbeee 100644 --- a/src/gallium/drivers/radeonsi/si_shader.h +++ b/src/gallium/drivers/radeonsi/si_shader.h @@ -271,15 +271,15 @@ enum /* These fields are only set in current_gs_state in si_context, and they are accessible * in the shader via vs_state_bits in legacy GS, the GS copy shader, and any NGG shader. */ -#define S_GS_STATE_OUTPRIM(x) (((unsigned)(x)&0x3) << 2) -#define C_GS_STATE_OUTPRIM 0xFFFFFFF3 -#define S_GS_STATE_PROVOKING_VTX_INDEX(x) (((unsigned)(x)&0x3) << 4) -#define C_GS_STATE_PROVOKING_VTX_INDEX 0xFFFFFFCF -#define S_GS_STATE_STREAMOUT_QUERY_ENABLED(x) (((unsigned)(x)&0x1) << 6) -#define C_GS_STATE_STREAMOUT_QUERY_ENABLED 0xFFFFFFBF -#define S_GS_STATE_SMALL_PRIM_PRECISION(x) (((unsigned)(x)&0xF) << 7) -#define C_GS_STATE_SMALL_PRIM_PRECISION 0xFFFFF87F /* bit gap */ +#define S_GS_STATE_SMALL_PRIM_PRECISION(x) (((unsigned)(x)&0xF) << 22) +#define C_GS_STATE_SMALL_PRIM_PRECISION 0xFC3FFFFF +#define S_GS_STATE_STREAMOUT_QUERY_ENABLED(x) (((unsigned)(x)&0x1) << 26) +#define C_GS_STATE_STREAMOUT_QUERY_ENABLED 0xFBFFFFFF +#define S_GS_STATE_PROVOKING_VTX_INDEX(x) (((unsigned)(x)&0x3) << 27) +#define C_GS_STATE_PROVOKING_VTX_INDEX 0xE7FFFFFF +#define S_GS_STATE_OUTPRIM(x) (((unsigned)(x)&0x3) << 29) +#define C_GS_STATE_OUTPRIM 0x9FFFFFFF #define S_GS_STATE_PIPELINE_STATS_EMU(x) (((unsigned)(x)&0x1) << 31) #define C_GS_STATE_PIPELINE_STATS_EMU 0x7FFFFFFF