From c1bb5e101ef509cc0cd3e1ec4c9ed233f454fefd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Roberto=20de=20Souza?= Date: Mon, 25 May 2026 11:01:33 -0700 Subject: [PATCH] intel/dev: Use URB mesh/task min/max values in intel_device_info MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Jordan Justen Signed-off-by: José Roberto de Souza Part-of: --- src/intel/common/intel_urb_config.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/intel/common/intel_urb_config.c b/src/intel/common/intel_urb_config.c index 82ce5aa47de..2efe5be8d6d 100644 --- a/src/intel/common/intel_urb_config.c +++ b/src/intel/common/intel_urb_config.c @@ -353,13 +353,15 @@ intel_get_mesh_urb_config(const struct intel_device_info *devinfo, } } + const unsigned min_mesh = MAX2(devinfo->urb.min_entries[MESA_SHADER_MESH], 1); + const unsigned min_task = MAX2(devinfo->urb.min_entries[MESA_SHADER_TASK], 1); /* 3DSTATE_URB_ALLOC_MESH_BODY and 3DSTATE_URB_ALLOC_TASK_BODY says * * MESH Number of URB Entries must be divisible by 8 if the MESH/TASK URB * Entry Allocation Size is less than 9 512-bit URB entries. */ - const unsigned min_mesh_entries = urb_cfg->size[MESA_SHADER_MESH] < 9 ? 8 : 1; - const unsigned min_task_entries = urb_cfg->size[MESA_SHADER_TASK] < 9 ? 8 : 1; + const unsigned min_mesh_entries = urb_cfg->size[MESA_SHADER_MESH] < 9 ? 8 : min_mesh; + const unsigned min_task_entries = urb_cfg->size[MESA_SHADER_TASK] < 9 ? 8 : min_task; const unsigned min_mesh_urb_kb = align(urb_cfg->size[MESA_SHADER_MESH] * min_mesh_entries * 64, 1024) / 1024; const unsigned min_task_urb_kb = align(urb_cfg->size[MESA_SHADER_TASK] * @@ -394,7 +396,7 @@ intel_get_mesh_urb_config(const struct intel_device_info *devinfo, urb_cfg->start[MESA_SHADER_MESH] = next_address_8kb; urb_cfg->entries[MESA_SHADER_MESH] = - MIN2((mesh_urb_kb * 16) / urb_cfg->size[MESA_SHADER_MESH], 1548); + MIN2((mesh_urb_kb * 16) / urb_cfg->size[MESA_SHADER_MESH], devinfo->urb.max_entries[MESA_SHADER_MESH]); urb_cfg->entries[MESA_SHADER_MESH] = urb_cfg->size[MESA_SHADER_MESH] < 9 ? ROUND_DOWN_TO(urb_cfg->entries[MESA_SHADER_MESH], 8) : @@ -407,7 +409,7 @@ intel_get_mesh_urb_config(const struct intel_device_info *devinfo, task_urb_kb = total_urb_avail_mesh_task_kb - mesh_urb_kb; if (urb_cfg->size[MESA_SHADER_TASK] > 0) { urb_cfg->entries[MESA_SHADER_TASK] = - MIN2((task_urb_kb * 16) / urb_cfg->size[MESA_SHADER_TASK], 1548); + MIN2((task_urb_kb * 16) / urb_cfg->size[MESA_SHADER_TASK], devinfo->urb.max_entries[MESA_SHADER_TASK]); urb_cfg->entries[MESA_SHADER_TASK] = urb_cfg->size[MESA_SHADER_TASK] < 9 ? ROUND_DOWN_TO(urb_cfg->entries[MESA_SHADER_TASK], 8) :