fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-04-20 03:30:36 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

freedreno/a6xx: Make tex/samp descriptors a normal BO

Browse source 
This way the descriptor upload is simply memcpy().

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36589>
This commit is contained in:
Rob Clark 2025-08-03 07:13:51 -07:00 • committed by Marge Bot
parent b17c34326d
commit c1aaef71da
1 changed files with 28 additions and 35 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

63
src/gallium/drivers/freedreno/a6xx/fd6_texture.cc
View file

@ -589,6 +589,7 @@ build_texture_state(struct fd_context *ctx, mesa_shader_stage type,
{ {
struct fd_ringbuffer *ring = fd_ringbuffer_new_object(ctx->pipe, 32 * 4); struct fd_ringbuffer *ring = fd_ringbuffer_new_object(ctx->pipe, 32 * 4);
unsigned opcode, tex_samp_reg, tex_const_reg, tex_count_reg; unsigned opcode, tex_samp_reg, tex_const_reg, tex_count_reg;
struct fd_bo *tex_desc = NULL, *samp_desc = NULL;
enum a6xx_state_block sb; enum a6xx_state_block sb;
switch (type) { switch (type) {
@ -639,19 +640,22 @@ build_texture_state(struct fd_context *ctx, mesa_shader_stage type,
} }
if (tex->num_samplers > 0) { if (tex->num_samplers > 0) {
struct fd_ringbuffer *state = samp_desc = fd_bo_new(ctx->dev, tex->num_samplers * 4 * 4,
fd_ringbuffer_new_object(ctx->pipe, tex->num_samplers * 4 * 4); FD_BO_GPUREADONLY | FD_BO_HINT_COMMAND,
"samp desc");
uint32_t *buf = (uint32_t *)fd_bo_map(samp_desc);
for (unsigned i = 0; i < tex->num_samplers; i++) { for (unsigned i = 0; i < tex->num_samplers; i++) {
static const struct fd6_sampler_stateobj dummy_sampler = {}; static const struct fd6_sampler_stateobj dummy_sampler = {};
const struct fd6_sampler_stateobj *sampler = const struct fd6_sampler_stateobj *sampler =
tex->samplers[i] ? fd6_sampler_stateobj(tex->samplers[i]) tex->samplers[i] ? fd6_sampler_stateobj(tex->samplers[i])
: &dummy_sampler; : &dummy_sampler;
OUT_RING(state, sampler->descriptor[0]); memcpy(buf, sampler->descriptor, 4 * 4);
OUT_RING(state, sampler->descriptor[1]); buf += 4;
OUT_RING(state, sampler->descriptor[2]);
OUT_RING(state, sampler->descriptor[3]);
} }
fd_ringbuffer_attach_bo(ring, samp_desc);
/* output sampler state: */ /* output sampler state: */
OUT_PKT7(ring, opcode, 3); OUT_PKT7(ring, opcode, 3);
OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(0) | OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(0) |
@ -659,20 +663,21 @@ build_texture_state(struct fd_context *ctx, mesa_shader_stage type,
CP_LOAD_STATE6_0_STATE_SRC(SS6_INDIRECT) | CP_LOAD_STATE6_0_STATE_SRC(SS6_INDIRECT) |
CP_LOAD_STATE6_0_STATE_BLOCK(sb) | CP_LOAD_STATE6_0_STATE_BLOCK(sb) |
CP_LOAD_STATE6_0_NUM_UNIT(tex->num_samplers)); CP_LOAD_STATE6_0_NUM_UNIT(tex->num_samplers));
OUT_RB(ring, state); /* SRC_ADDR_LO/HI */ OUT_RELOC(ring, samp_desc, 0); /* SRC_ADDR_LO/HI */
OUT_PKT4(ring, tex_samp_reg, 2); OUT_PKT4(ring, tex_samp_reg, 2);
OUT_RB(ring, state); /* SRC_ADDR_LO/HI */ OUT_RELOC(ring, samp_desc, 0); /* SRC_ADDR_LO/HI */
fd_ringbuffer_del(state); fd_bo_del(samp_desc);
} }
unsigned num_textures = tex->num_textures; if (tex->num_textures > 0) {
tex_desc = fd_bo_new(ctx->dev, tex->num_textures * 16 * 4,
FD_BO_GPUREADONLY | FD_BO_HINT_COMMAND,
"tex desc");
uint32_t *buf = (uint32_t *)fd_bo_map(tex_desc);
if (num_textures > 0) { for (unsigned i = 0; i < tex->num_textures; i++) {
struct fd_ringbuffer *state =
fd_ringbuffer_new_object(ctx->pipe, num_textures * 16 * 4);
for (unsigned i = 0; i < num_textures; i++) {
const struct fd6_pipe_sampler_view *view; const struct fd6_pipe_sampler_view *view;
if (tex->textures[i]) { if (tex->textures[i]) {
@ -685,41 +690,29 @@ build_texture_state(struct fd_context *ctx, mesa_shader_stage type,
view = &dummy_view; view = &dummy_view;
} }
OUT_RING(state, view->descriptor[0]); memcpy(buf, view->descriptor, 16 * 4);
OUT_RING(state, view->descriptor[1]); buf += 16;
OUT_RING(state, view->descriptor[2]);
OUT_RING(state, view->descriptor[3]);
OUT_RING(state, view->descriptor[4]);
OUT_RING(state, view->descriptor[5]);
OUT_RING(state, view->descriptor[6]);
OUT_RING(state, view->descriptor[7]);
OUT_RING(state, view->descriptor[8]);
OUT_RING(state, view->descriptor[9]);
OUT_RING(state, view->descriptor[10]);
OUT_RING(state, view->descriptor[11]);
OUT_RING(state, view->descriptor[12]);
OUT_RING(state, view->descriptor[13]);
OUT_RING(state, view->descriptor[14]);
OUT_RING(state, view->descriptor[15]);
} }
fd_ringbuffer_attach_bo(ring, tex_desc);
/* emit texture state: */ /* emit texture state: */
OUT_PKT7(ring, opcode, 3); OUT_PKT7(ring, opcode, 3);
OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(0) | OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(0) |
CP_LOAD_STATE6_0_STATE_TYPE(ST6_CONSTANTS) | CP_LOAD_STATE6_0_STATE_TYPE(ST6_CONSTANTS) |
CP_LOAD_STATE6_0_STATE_SRC(SS6_INDIRECT) | CP_LOAD_STATE6_0_STATE_SRC(SS6_INDIRECT) |
CP_LOAD_STATE6_0_STATE_BLOCK(sb) | CP_LOAD_STATE6_0_STATE_BLOCK(sb) |
CP_LOAD_STATE6_0_NUM_UNIT(num_textures)); CP_LOAD_STATE6_0_NUM_UNIT(tex->num_textures));
OUT_RB(ring, state); /* SRC_ADDR_LO/HI */ OUT_RELOC(ring, tex_desc, 0); /* SRC_ADDR_LO/HI */
OUT_PKT4(ring, tex_const_reg, 2); OUT_PKT4(ring, tex_const_reg, 2);
OUT_RB(ring, state); /* SRC_ADDR_LO/HI */ OUT_RELOC(ring, tex_desc, 0); /* SRC_ADDR_LO/HI */
fd_ringbuffer_del(state); fd_bo_del(tex_desc);
} }
OUT_PKT4(ring, tex_count_reg, 1); OUT_PKT4(ring, tex_count_reg, 1);
OUT_RING(ring, num_textures); OUT_RING(ring, tex->num_textures);
return ring; return ring;
} }