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gallium: replace get_compiler_options with pipe_screen::nir_options

Browse source 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36094>
This commit is contained in:
Marek Olšák 2025-04-17 16:21:03 -04:00 • committed by Marge Bot
parent a30f1fa7f0
commit c1a939ca11
53 changed files with 108 additions and 318 deletions
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2
src/compiler/glsl/main.cpp
View file

@ -100,7 +100,7 @@ main(int argc, char * const* argv)
if (!whole_program)
usage_fail(argv[0]);
standalone_compiler_cleanup(whole_program);
standalone_compiler_cleanup(whole_program, &local_ctx);
return status;
}

4
src/compiler/glsl/standalone.cpp
View file

@ -457,9 +457,11 @@ fail:
}
extern "C" void
standalone_compiler_cleanup(struct gl_shader_program *whole_program)
standalone_compiler_cleanup(struct gl_shader_program *whole_program,
struct gl_context *ctx)
{
standalone_destroy_shader_program(whole_program);
free(ctx->screen);
_mesa_glsl_builtin_functions_decref();
}

3
src/compiler/glsl/standalone.h
View file

@ -45,7 +45,8 @@ struct gl_shader_program * standalone_compile_shader(
unsigned num_files, char* const* files,
struct gl_context *ctx);
void standalone_compiler_cleanup(struct gl_shader_program *prog);
void standalone_compiler_cleanup(struct gl_shader_program *prog,
struct gl_context *ctx);
#ifdef __cplusplus
}

11
src/gallium/auxiliary/driver_ddebug/dd_screen.c
View file

@ -56,15 +56,6 @@ dd_screen_get_device_vendor(struct pipe_screen *_screen)
return screen->get_device_vendor(screen);
}
static const struct nir_shader_compiler_options *
dd_screen_get_compiler_options(struct pipe_screen *_screen,
enum pipe_shader_type shader)
{
struct pipe_screen *screen = dd_screen(_screen)->screen;
return screen->get_compiler_options(screen, shader);
}
static struct disk_cache *
dd_screen_get_disk_shader_cache(struct pipe_screen *_screen)
{
@ -664,7 +655,6 @@ ddebug_screen_create(struct pipe_screen *screen)
SCR_INIT(memobj_destroy);
SCR_INIT(get_driver_query_info);
SCR_INIT(get_driver_query_group_info);
SCR_INIT(get_compiler_options);
SCR_INIT(get_driver_uuid);
SCR_INIT(get_device_uuid);
SCR_INIT(finalize_nir);
@ -679,6 +669,7 @@ ddebug_screen_create(struct pipe_screen *screen)
*(struct pipe_caps *)&dscreen->base.caps = screen->caps;
*(struct pipe_compute_caps *)&dscreen->base.compute_caps = screen->compute_caps;
memcpy((void *)dscreen->base.shader_caps, screen->shader_caps, sizeof(screen->shader_caps));
memcpy((void *)dscreen->base.nir_options, screen->nir_options, sizeof(screen->nir_options));
#undef SCR_INIT

10
src/gallium/auxiliary/driver_noop/noop_pipe.c
View file

@ -571,14 +571,6 @@ static struct disk_cache *noop_get_disk_shader_cache(struct pipe_screen *pscreen
return screen->get_disk_shader_cache(screen);
}
static const struct nir_shader_compiler_options *noop_get_compiler_options(
struct pipe_screen *pscreen, enum pipe_shader_type shader)
{
struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen;
return screen->get_compiler_options(screen, shader);
}
static void noop_finalize_nir(struct pipe_screen *pscreen, struct nir_shader *nir)
{
struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen;
@ -787,7 +779,6 @@ struct pipe_screen *noop_screen_create(struct pipe_screen *oscreen)
screen->fence_finish = noop_fence_finish;
screen->query_memory_info = noop_query_memory_info;
screen->get_disk_shader_cache = noop_get_disk_shader_cache;
screen->get_compiler_options = noop_get_compiler_options;
screen->finalize_nir = noop_finalize_nir;
if (screen->create_fence_win32)
screen->create_fence_win32 = noop_create_fence_win32;
@ -814,6 +805,7 @@ struct pipe_screen *noop_screen_create(struct pipe_screen *oscreen)
*(struct pipe_caps *)&screen->caps = oscreen->caps;
*(struct pipe_compute_caps *)&screen->compute_caps = oscreen->compute_caps;
memcpy((void *)screen->shader_caps, oscreen->shader_caps, sizeof(screen->shader_caps));
memcpy((void *)screen->nir_options, oscreen->nir_options, sizeof(screen->nir_options));
slab_create_parent(&noop_screen->pool_transfers,
sizeof(struct pipe_transfer), 64);

25
src/gallium/auxiliary/driver_trace/tr_screen.c
View file

@ -105,29 +105,6 @@ trace_screen_get_device_vendor(struct pipe_screen *_screen)
}
static const struct nir_shader_compiler_options *
trace_screen_get_compiler_options(struct pipe_screen *_screen,
enum pipe_shader_type shader)
{
struct trace_screen *tr_scr = trace_screen(_screen);
struct pipe_screen *screen = tr_scr->screen;
const struct nir_shader_compiler_options *result;
trace_dump_call_begin("pipe_screen", "get_compiler_options");
trace_dump_arg(ptr, screen);
trace_dump_arg_enum(pipe_shader_type, shader);
result = screen->get_compiler_options(screen, shader);
trace_dump_ret(ptr, result);
trace_dump_call_end();
return result;
}
static struct disk_cache *
trace_screen_get_disk_shader_cache(struct pipe_screen *_screen)
{
@ -1502,7 +1479,6 @@ trace_screen_create(struct pipe_screen *screen)
tr_scr->base.get_name = trace_screen_get_name;
tr_scr->base.get_vendor = trace_screen_get_vendor;
tr_scr->base.get_device_vendor = trace_screen_get_device_vendor;
SCR_INIT(get_compiler_options);
SCR_INIT(get_disk_shader_cache);
SCR_INIT(get_video_param);
tr_scr->base.is_format_supported = trace_screen_is_format_supported;
@ -1574,6 +1550,7 @@ trace_screen_create(struct pipe_screen *screen)
*(struct pipe_caps *)&tr_scr->base.caps = screen->caps;
*(struct pipe_compute_caps *)&tr_scr->base.compute_caps = screen->compute_caps;
memcpy((void *)tr_scr->base.shader_caps, screen->shader_caps, sizeof(screen->shader_caps));
memcpy((void *)tr_scr->base.nir_options, screen->nir_options, sizeof(screen->nir_options));
return &tr_scr->base;

14
src/gallium/auxiliary/nir/nir_to_tgsi.c
View file

@ -4058,7 +4058,7 @@ const void *nir_to_tgsi_options(struct nir_shader *s,
return tgsi_tokens;
}
static const nir_shader_compiler_options nir_to_tgsi_compiler_options = {
const nir_shader_compiler_options nir_to_tgsi_compiler_options = {
.fdot_replicates = true,
.fuse_ffma32 = true,
.fuse_ffma64 = true,
@ -4083,18 +4083,6 @@ static const nir_shader_compiler_options nir_to_tgsi_compiler_options = {
.lower_cs_local_index_to_id = true,
};
/* Returns a default compiler options for drivers with only nir-to-tgsi-based
* NIR support.
*/
const void *
nir_to_tgsi_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_ir ir,
unsigned shader)
{
assert(ir == PIPE_SHADER_IR_NIR);
return &nir_to_tgsi_compiler_options;
}
/** Helper for getting TGSI tokens to store for a pipe_shader_state CSO. */
const void *
pipe_shader_state_to_tgsi_tokens(struct pipe_screen *screen,

7
src/gallium/auxiliary/nir/nir_to_tgsi.h
View file

@ -42,6 +42,8 @@ struct nir_to_tgsi_options {
uint32_t ubo_vec4_max;
};
extern const struct nir_shader_compiler_options nir_to_tgsi_compiler_options;
const void *nir_to_tgsi(struct nir_shader *s,
struct pipe_screen *screen);
@ -49,11 +51,6 @@ const void *nir_to_tgsi_options(struct nir_shader *s,
struct pipe_screen *screen,
const struct nir_to_tgsi_options *ntt_options);
const void *
nir_to_tgsi_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_ir ir,
unsigned shader);
const void *
pipe_shader_state_to_tgsi_tokens(struct pipe_screen *screen,
const struct pipe_shader_state *cso);

9
src/gallium/auxiliary/nir/tgsi_to_nir.c
View file

@ -2245,10 +2245,8 @@ ttn_compile_init(const void *tgsi_tokens,
tgsi_scan_shader(tgsi_tokens, &scan);
c->scan = &scan;
if (!options) {
options =
screen->get_compiler_options(screen, scan.processor);
}
if (!options)
options = screen->nir_options[scan.processor];
c->build = nir_builder_init_simple_shader(tgsi_processor_to_shader_stage(scan.processor),
options, "TTN%d", (int)p_atomic_inc_return(&ttn_sh_counter));
@ -2607,8 +2605,7 @@ load_nir_from_disk_cache(struct disk_cache *cache,
uint8_t key[CACHE_KEY_SIZE],
unsigned processor)
{
const nir_shader_compiler_options *options =
screen->get_compiler_options(screen, processor);
const nir_shader_compiler_options *options = screen->nir_options[processor];
struct blob_reader blob_reader;
size_t size;
nir_shader *s;

3
src/gallium/auxiliary/vl/vl_compositor_cs.c
View file

@ -100,8 +100,7 @@ static nir_def *cs_create_shader(struct vl_compositor *c, struct cs_shader *s)
glsl_sampler_type(sampler_dim, /*is_shadow*/ false, s->array, GLSL_TYPE_FLOAT);
const struct glsl_type *image_type =
glsl_image_type(GLSL_SAMPLER_DIM_2D, /*is_array*/ false, GLSL_TYPE_FLOAT);
const nir_shader_compiler_options *options =
c->pipe->screen->get_compiler_options(c->pipe->screen, PIPE_SHADER_COMPUTE);
const nir_shader_compiler_options *options = c->pipe->screen->nir_options[PIPE_SHADER_COMPUTE];
s->b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "vl:%s", s->name);
nir_builder *b = &s->b;

3
src/gallium/auxiliary/vl/vl_deint_filter_cs.c
View file

@ -32,8 +32,7 @@ create_deint_shader(struct vl_deint_filter *filter, unsigned field)
glsl_sampler_type(GLSL_SAMPLER_DIM_RECT, false, false, GLSL_TYPE_FLOAT);
const struct glsl_type *image_type =
glsl_image_type(GLSL_SAMPLER_DIM_2D, false, GLSL_TYPE_FLOAT);
const nir_shader_compiler_options *options =
filter->pipe->screen->get_compiler_options(filter->pipe->screen, PIPE_SHADER_COMPUTE);
const nir_shader_compiler_options *options = filter->pipe->screen->nir_options[PIPE_SHADER_COMPUTE];
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "vl:deint");
b.shader->info.workgroup_size[0] = 8;

2
src/gallium/drivers/asahi/agx_blit.c
View file

@ -57,7 +57,7 @@ static void *
asahi_blit_compute_shader(struct pipe_context *ctx, struct asahi_blit_key *key)
{
const nir_shader_compiler_options *options =
ctx->screen->get_compiler_options(ctx->screen, PIPE_SHADER_COMPUTE);
ctx->screen->nir_options[PIPE_SHADER_COMPUTE];
nir_builder b_ =
nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "blit_cs");

11
src/gallium/drivers/asahi/agx_pipe.c
View file

@ -2296,13 +2296,6 @@ agx_destroy_screen(struct pipe_screen *pscreen)
ralloc_free(screen);
}
static const struct nir_shader_compiler_options *
agx_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
return &agx_nir_options;
}
static void
agx_resource_set_stencil(struct pipe_resource *prsrc,
struct pipe_resource *stencil)
@ -2435,10 +2428,12 @@ agx_screen_create(int fd, struct renderonly *ro,
screen->fence_reference = agx_fence_reference;
screen->fence_finish = agx_fence_finish;
screen->fence_get_fd = agx_fence_get_fd;
screen->get_compiler_options = agx_get_compiler_options;
screen->get_disk_shader_cache = agx_get_disk_shader_cache;
screen->get_cl_cts_version = agx_get_cl_cts_version;
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
screen->nir_options[i] = &agx_nir_options;
screen->resource_create = u_transfer_helper_resource_create;
screen->resource_destroy = u_transfer_helper_resource_destroy;
screen->transfer_helper = u_transfer_helper_create(

14
src/gallium/drivers/crocus/crocus_screen.c
View file

@ -481,16 +481,6 @@ crocus_query_memory_info(struct pipe_screen *pscreen,
{
}
static const struct nir_shader_compiler_options *
crocus_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type pstage)
{
struct crocus_screen *screen = (struct crocus_screen *) pscreen;
gl_shader_stage stage = stage_from_pipe(pstage);
return screen->compiler->nir_options[stage];
}
static struct disk_cache *
crocus_get_disk_shader_cache(struct pipe_screen *pscreen)
{
@ -635,12 +625,14 @@ crocus_screen_create(int fd, const struct pipe_screen_config *config)
crocus_init_screen_fence_functions(pscreen);
crocus_init_screen_resource_functions(pscreen);
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
pscreen->nir_options[i] = screen->compiler->nir_options[i];
pscreen->destroy = crocus_screen_unref;
pscreen->get_name = crocus_get_name;
pscreen->get_vendor = crocus_get_vendor;
pscreen->get_device_vendor = crocus_get_device_vendor;
pscreen->get_screen_fd = crocus_screen_get_fd;
pscreen->get_compiler_options = crocus_get_compiler_options;
pscreen->get_device_uuid = crocus_get_device_uuid;
pscreen->get_driver_uuid = crocus_get_driver_uuid;
pscreen->get_disk_shader_cache = crocus_get_disk_shader_cache;

7
src/gallium/drivers/d3d12/d3d12_compiler.cpp
View file

@ -49,13 +49,6 @@
#include "dxil_validator.h"
#endif
const struct nir_shader_compiler_options *
d3d12_get_compiler_options(struct pipe_screen *screen,
enum pipe_shader_type shader)
{
return &d3d12_screen(screen)->nir_options;
}
static uint32_t
resource_dimension(enum glsl_sampler_dim dim)
{

4
src/gallium/drivers/d3d12/d3d12_compiler.h
View file

@ -64,10 +64,6 @@ enum d3d12_state_var {
#define D3D12_MAX_POINT_SIZE 255.0f
const struct nir_shader_compiler_options *
d3d12_get_compiler_options(struct pipe_screen *screen,
enum pipe_shader_type shader);
void
d3d12_varying_cache_init(struct d3d12_screen *ctx);

4
src/gallium/drivers/d3d12/d3d12_screen.cpp
View file

@ -1265,9 +1265,11 @@ d3d12_init_screen_base(struct d3d12_screen *screen, struct sw_winsys *winsys, LU
#ifdef HAVE_GALLIUM_D3D12_GRAPHICS
d3d12_varying_cache_init(screen);
mtx_init(&screen->varying_info_mutex, mtx_plain);
screen->base.get_compiler_options = d3d12_get_compiler_options;
#endif // HAVE_GALLIUM_D3D12_GRAPHICS
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
screen->base.nir_options[i] = &screen->nir_options;
slab_create_parent(&screen->transfer_pool, sizeof(struct d3d12_transfer), 16);
screen->base.get_vendor = d3d12_get_vendor;

8
src/gallium/drivers/etnaviv/etnaviv_screen.c
View file

@ -950,13 +950,6 @@ etna_screen_bo_from_handle(struct pipe_screen *pscreen,
return bo;
}
static const struct nir_shader_compiler_options *
etna_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
return etna_compiler_get_options(etna_screen(pscreen)->compiler);
}
static struct disk_cache *
etna_get_disk_shader_cache(struct pipe_screen *pscreen)
{
@ -1036,7 +1029,6 @@ etna_screen_create(struct etna_device *dev, struct etna_gpu *gpu,
pscreen->destroy = etna_screen_destroy;
pscreen->get_screen_fd = etna_screen_get_fd;
pscreen->get_compiler_options = etna_get_compiler_options;
pscreen->get_disk_shader_cache = etna_get_disk_shader_cache;
pscreen->get_name = etna_screen_get_name;

3
src/gallium/drivers/etnaviv/etnaviv_shader.c
View file

@ -644,6 +644,9 @@ etna_shader_screen_init(struct pipe_screen *pscreen)
if (!screen->compiler)
return false;
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
pscreen->nir_options[i] = etna_compiler_get_options(screen->compiler);
pscreen->set_max_shader_compiler_threads = etna_set_max_shader_compiler_threads;
pscreen->is_parallel_shader_compilation_finished = etna_is_parallel_shader_compilation_finished;

3
src/gallium/drivers/freedreno/freedreno_blitter.c
View file

@ -158,8 +158,7 @@ build_f16_copy_fs_shader(struct pipe_screen *pscreen, enum pipe_texture_target t
[PIPE_TEXTURE_CUBE_ARRAY] = GLSL_SAMPLER_DIM_CUBE,
};
const nir_shader_compiler_options *options =
pscreen->get_compiler_options(pscreen, PIPE_SHADER_FRAGMENT);
const nir_shader_compiler_options *options = pscreen->nir_options[PIPE_SHADER_FRAGMENT];
nir_builder _b =
nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT, options,
"f16 copy %s fs",

4
src/gallium/drivers/freedreno/freedreno_screen.c
View file

@ -1054,9 +1054,11 @@ fd_screen_create(int fd,
pscreen->destroy = fd_screen_destroy;
pscreen->get_screen_fd = fd_screen_get_fd;
pscreen->query_memory_info = fd_query_memory_info;
pscreen->get_compiler_options = fd_get_compiler_options;
pscreen->get_disk_shader_cache = fd_get_disk_shader_cache;
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
pscreen->nir_options[i] = fd_get_compiler_options(pscreen, i);
fd_resource_screen_init(pscreen);
fd_query_screen_init(pscreen);
fd_gmem_screen_init(pscreen);

14
src/gallium/drivers/i915/i915_screen.c
View file

@ -175,16 +175,6 @@ static const struct nir_shader_compiler_options gallivm_nir_options = {
.no_integers = true,
};
static const struct nir_shader_compiler_options *
i915_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
if (shader == PIPE_SHADER_FRAGMENT)
return &i915_compiler_options;
else
return &gallivm_nir_options;
}
static void
i915_optimize_nir(struct nir_shader *s)
{
@ -559,7 +549,6 @@ i915_screen_create(struct i915_winsys *iws)
is->base.get_vendor = i915_get_vendor;
is->base.get_device_vendor = i915_get_device_vendor;
is->base.get_screen_fd = i915_screen_get_fd;
is->base.get_compiler_options = i915_get_compiler_options;
is->base.finalize_nir = i915_finalize_nir;
is->base.is_format_supported = i915_is_format_supported;
@ -568,6 +557,9 @@ i915_screen_create(struct i915_winsys *iws)
is->base.fence_reference = i915_fence_reference;
is->base.fence_finish = i915_fence_finish;
is->base.nir_options[PIPE_SHADER_VERTEX] = &gallivm_nir_options;
is->base.nir_options[PIPE_SHADER_FRAGMENT] = &i915_compiler_options;
i915_init_screen_resource_functions(is);
i915_init_shader_caps(is);

4
src/gallium/drivers/iris/iris_screen.c
View file

@ -772,7 +772,6 @@ iris_screen_create(int fd, const struct pipe_screen_config *config)
pscreen->get_device_vendor = iris_get_device_vendor;
pscreen->get_cl_cts_version = iris_get_cl_cts_version;
pscreen->get_screen_fd = iris_screen_get_fd;
pscreen->get_compiler_options = iris_get_compiler_options;
pscreen->get_device_uuid = iris_get_device_uuid;
pscreen->get_driver_uuid = iris_get_driver_uuid;
pscreen->get_disk_shader_cache = iris_get_disk_shader_cache;
@ -785,6 +784,9 @@ iris_screen_create(int fd, const struct pipe_screen_config *config)
pscreen->set_damage_region = iris_set_damage_region;
iris_init_screen_program_functions(pscreen);
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
pscreen->nir_options[i] = iris_get_compiler_options(pscreen, i);
iris_init_shader_caps(screen);
iris_init_compute_caps(screen);
iris_init_screen_caps(screen);

11
src/gallium/drivers/lima/lima_screen.c
View file

@ -352,13 +352,6 @@ lima_screen_is_format_supported(struct pipe_screen *pscreen,
return true;
}
static const struct nir_shader_compiler_options *
lima_screen_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
return lima_program_get_compiler_options(shader);
}
static bool
lima_screen_set_plb_max_blk(struct lima_screen *screen)
{
@ -653,6 +646,9 @@ lima_screen_create(int fd, const struct pipe_screen_config *config,
pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
pp_frame_rsw[13] = 0x00000100;
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
screen->base.nir_options[i] = lima_program_get_compiler_options(i);
screen->base.destroy = lima_screen_destroy;
screen->base.get_screen_fd = lima_screen_get_fd;
screen->base.get_name = lima_screen_get_name;
@ -660,7 +656,6 @@ lima_screen_create(int fd, const struct pipe_screen_config *config,
screen->base.get_device_vendor = lima_screen_get_device_vendor;
screen->base.context_create = lima_context_create;
screen->base.is_format_supported = lima_screen_is_format_supported;
screen->base.get_compiler_options = lima_screen_get_compiler_options;
screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
screen->base.is_dmabuf_modifier_supported = lima_screen_is_dmabuf_modifier_supported;
screen->base.get_disk_shader_cache = lima_get_disk_shader_cache;

12
src/gallium/drivers/llvmpipe/lp_screen.c
View file

@ -481,14 +481,6 @@ llvmpipe_finalize_nir(struct pipe_screen *screen,
}
static inline const struct nir_shader_compiler_options *
llvmpipe_get_compiler_options(struct pipe_screen *screen,
enum pipe_shader_type shader)
{
return &gallivm_nir_options;
}
bool
lp_storage_render_image_format_supported(enum pipe_format format)
{
@ -966,7 +958,6 @@ llvmpipe_create_screen(struct sw_winsys *winsys)
screen->base.get_vendor = llvmpipe_get_vendor;
screen->base.get_device_vendor = llvmpipe_get_vendor; // TODO should be the CPU vendor
screen->base.get_screen_fd = llvmpipe_screen_get_fd;
screen->base.get_compiler_options = llvmpipe_get_compiler_options;
screen->base.is_format_supported = llvmpipe_is_format_supported;
screen->base.context_create = llvmpipe_create_context;
@ -992,6 +983,9 @@ llvmpipe_create_screen(struct sw_winsys *winsys)
screen->num_threads);
screen->num_threads = MIN2(screen->num_threads, LP_MAX_THREADS);
for (unsigned i = 0; i < PIPE_SHADER_MESH_TYPES; i++)
screen->base.nir_options[i] = &gallivm_nir_options;
#if defined(HAVE_LIBDRM) && defined(HAVE_LINUX_UDMABUF_H)
screen->udmabuf_fd = open("/dev/udmabuf", O_RDWR);
llvmpipe_init_screen_fence_funcs(&screen->base);

19
src/gallium/drivers/nouveau/nv30/nv30_screen.c
View file

@ -358,21 +358,6 @@ static const nir_shader_compiler_options nv30_base_compiler_options = {
.no_integers = true,
};
static const struct nir_shader_compiler_options *
nv30_screen_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
struct nv30_screen *screen = nv30_screen(pscreen);
/* The FS compiler options are different between nv30 and nv40, and are set
* up at screen creation time.
*/
if (shader == PIPE_SHADER_FRAGMENT)
return &screen->fs_compiler_options;
return &nv30_base_compiler_options;
}
static void
nv30_screen_fence_emit(struct pipe_context *pcontext, uint32_t *sequence,
struct nouveau_bo *wait)
@ -504,7 +489,9 @@ nv30_screen_create(struct nouveau_device *dev)
pscreen->context_create = nv30_context_create;
pscreen->is_format_supported = nv30_screen_is_format_supported;
pscreen->get_compiler_options = nv30_screen_get_compiler_options;
pscreen->nir_options[MESA_SHADER_VERTEX] = &nv30_base_compiler_options;
pscreen->nir_options[MESA_SHADER_FRAGMENT] = &screen->fs_compiler_options;
nv30_resource_screen_init(pscreen);
nouveau_screen_init_vdec(&screen->base);

11
src/gallium/drivers/nouveau/nv50/nv50_screen.c
View file

@ -697,13 +697,6 @@ int nv50_tls_realloc(struct nv50_screen *screen, unsigned tls_space)
return 1;
}
static const struct nir_shader_compiler_options *
nv50_screen_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
return nv50_ir_nir_shader_compiler_options(NVISA_G80_CHIPSET, shader);
}
struct nouveau_screen *
nv50_screen_create(struct nouveau_device *dev)
{
@ -745,8 +738,8 @@ nv50_screen_create(struct nouveau_device *dev)
pscreen->get_driver_query_info = nv50_screen_get_driver_query_info;
pscreen->get_driver_query_group_info = nv50_screen_get_driver_query_group_info;
/* nir stuff */
pscreen->get_compiler_options = nv50_screen_get_compiler_options;
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
pscreen->nir_options[i] = nv50_ir_nir_shader_compiler_options(NVISA_G80_CHIPSET, i);
nv50_screen_init_resource_functions(pscreen);

13
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View file

@ -756,14 +756,6 @@ nvc0_screen_bind_cb_3d(struct nvc0_screen *screen, struct nouveau_pushbuf *push,
IMMED_NVC0(push, NVC0_3D(CB_BIND(stage)), (index << 4) | (size >= 0));
}
static const struct nir_shader_compiler_options *
nvc0_screen_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
struct nvc0_screen *screen = nvc0_screen(pscreen);
return nv50_ir_nir_shader_compiler_options(screen->base.device->chipset, shader);
}
#define FAIL_SCREEN_INIT(str, err) \
do { \
NOUVEAU_ERR(str, err); \
@ -835,13 +827,14 @@ nvc0_screen_create(struct nouveau_device *dev)
screen->base.vidmem_bindings = 0;
}
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
pscreen->nir_options[i] = nv50_ir_nir_shader_compiler_options(screen->base.device->chipset, i);
pscreen->context_create = nvc0_create;
pscreen->is_format_supported = nvc0_screen_is_format_supported;
pscreen->get_sample_pixel_grid = nvc0_screen_get_sample_pixel_grid;
pscreen->get_driver_query_info = nvc0_screen_get_driver_query_info;
pscreen->get_driver_query_group_info = nvc0_screen_get_driver_query_group_info;
/* nir stuff */
pscreen->get_compiler_options = nvc0_screen_get_compiler_options;
nvc0_screen_init_resource_functions(pscreen);

11
src/gallium/drivers/panfrost/pan_screen.c
View file

@ -890,13 +890,6 @@ panfrost_destroy_screen(struct pipe_screen *pscreen)
ralloc_free(pscreen);
}
static const struct nir_shader_compiler_options *
panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
return pan_shader_get_compiler_options(pan_screen(pscreen)->dev.arch);
}
static struct disk_cache *
panfrost_get_disk_shader_cache(struct pipe_screen *pscreen)
{
@ -1057,7 +1050,6 @@ panfrost_create_screen(int fd, const struct pipe_screen_config *config,
screen->base.is_dmabuf_modifier_supported =
panfrost_is_dmabuf_modifier_supported;
screen->base.context_create = panfrost_create_context;
screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
screen->base.get_disk_shader_cache = panfrost_get_disk_shader_cache;
screen->base.fence_reference = panfrost_fence_reference;
screen->base.fence_finish = panfrost_fence_finish;
@ -1083,6 +1075,9 @@ panfrost_create_screen(int fd, const struct pipe_screen_config *config,
return NULL;
}
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
screen->base.nir_options[i] = pan_shader_get_compiler_options(pan_screen(&screen->base)->dev.arch);
switch (dev->arch) {
case 4:
panfrost_cmdstream_screen_init_v4(screen);

33
src/gallium/drivers/r300/r300_screen.c
View file

@ -212,30 +212,6 @@ static const nir_shader_compiler_options gallivm_compiler_options = {
.support_indirect_outputs = (uint8_t)BITFIELD_MASK(PIPE_SHADER_TYPES),
};
static const struct nir_shader_compiler_options *
r300_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
struct r300_screen* r300screen = r300_screen(pscreen);
if (shader == PIPE_SHADER_VERTEX && !r300screen->caps.has_tcl) {
return &gallivm_compiler_options;
} else if (r300screen->caps.is_r500) {
if (shader == PIPE_SHADER_VERTEX)
return &r500_vs_compiler_options;
else
return &r500_fs_compiler_options;
} else {
if (shader == PIPE_SHADER_VERTEX) {
if (r300screen->caps.is_r400)
return &r400_vs_compiler_options;
return &r300_vs_compiler_options;
} else {
return &r300_fs_compiler_options;
}
}
}
/**
* Whether the format matches:
@ -706,7 +682,6 @@ struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
r300screen->screen.destroy = r300_destroy_screen;
r300screen->screen.get_name = r300_get_name;
r300screen->screen.get_vendor = r300_get_vendor;
r300screen->screen.get_compiler_options = r300_get_compiler_options;
r300screen->screen.get_device_vendor = r300_get_device_vendor;
r300screen->screen.get_disk_shader_cache = r300_get_disk_shader_cache;
r300screen->screen.get_screen_fd = r300_screen_get_fd;
@ -717,6 +692,14 @@ struct pipe_screen* r300_screen_create(struct radeon_winsys *rws,
r300screen->screen.fence_reference = r300_fence_reference;
r300screen->screen.fence_finish = r300_fence_finish;
r300screen->screen.nir_options[MESA_SHADER_VERTEX] =
!r300screen->caps.has_tcl ? &gallivm_compiler_options :
r300screen->caps.is_r500 ? &r500_vs_compiler_options :
r300screen->caps.is_r400 ? &r400_vs_compiler_options :
&r300_vs_compiler_options;
r300screen->screen.nir_options[MESA_SHADER_FRAGMENT] =
r300screen->caps.is_r500 ? &r500_fs_compiler_options : &r300_fs_compiler_options;
r300_init_screen_resource_functions(r300screen);
r300_init_shader_caps(r300screen);

12
src/gallium/drivers/r600/r600_pipe_common.c
View file

@ -933,14 +933,6 @@ struct pipe_resource *r600_resource_create_common(struct pipe_screen *screen,
}
}
static const struct nir_shader_compiler_options *
r600_get_compiler_options(struct pipe_screen *screen,
enum pipe_shader_type shader)
{
struct r600_common_screen *rscreen = (struct r600_common_screen *)screen;
return &rscreen->nir_options;
}
extern bool r600_lower_to_scalar_instr_filter(const nir_instr *instr, const void *);
static void r600_resource_destroy(struct pipe_screen *screen,
@ -1039,7 +1031,6 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
rscreen->b.get_disk_shader_cache = r600_get_disk_shader_cache;
rscreen->b.get_screen_fd = r600_get_screen_fd;
rscreen->b.get_timestamp = r600_get_timestamp;
rscreen->b.get_compiler_options = r600_get_compiler_options;
rscreen->b.fence_finish = r600_fence_finish;
rscreen->b.fence_reference = r600_fence_reference;
rscreen->b.resource_destroy = r600_resource_destroy;
@ -1056,6 +1047,9 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
rscreen->b.is_video_format_supported = vl_video_buffer_is_format_supported;
}
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
rscreen->b.nir_options[i] = &rscreen->nir_options;
r600_init_screen_texture_functions(rscreen);
r600_init_screen_query_functions(rscreen);

3
src/gallium/drivers/r600/r600_shader.c
View file

@ -138,8 +138,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
struct r600_pipe_shader_selector *sel = shader->selector;
int r;
const nir_shader_compiler_options *nir_options =
ctx->screen->get_compiler_options(ctx->screen,
shader->shader.processor_type);
ctx->screen->nir_options[shader->shader.processor_type];
if (!sel->nir && !(sel->ir_type == PIPE_SHADER_IR_TGSI)) {
assert(sel->nir_blob);
struct blob_reader blob_reader;

3
src/gallium/drivers/radeonsi/si_blit.c
View file

@ -1337,8 +1337,7 @@ void si_gfx_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
fs = _mesa_hash_table_u64_search(sctx->ps_resolve_shaders, key.key);
if (!fs) {
struct ac_ps_resolve_options options = {
.nir_options = sctx->b.screen->get_compiler_options(sctx->b.screen,
PIPE_SHADER_FRAGMENT),
.nir_options = sctx->b.screen->nir_options[PIPE_SHADER_FRAGMENT],
.info = &sctx->screen->info,
.use_aco = sctx->screen->use_aco,
.no_fmask = sctx->screen->debug_flags & DBG(NO_FMASK),

12
src/gallium/drivers/radeonsi/si_get.c
View file

@ -56,14 +56,6 @@ si_is_compute_copy_faster(struct pipe_screen *pscreen,
return false;
}
static const struct nir_shader_compiler_options *si_get_compiler_options(
struct pipe_screen *screen, enum pipe_shader_type shader)
{
struct si_screen *sscreen = (struct si_screen *)screen;
return sscreen->nir_options;
}
static void si_get_driver_uuid(struct pipe_screen *pscreen, char *uuid)
{
ac_compute_driver_uuid(uuid, PIPE_UUID_SIZE);
@ -836,7 +828,6 @@ void si_init_screen_get_functions(struct si_screen *sscreen)
sscreen->b.is_compute_copy_faster = si_is_compute_copy_faster;
sscreen->b.driver_thread_add_job = si_driver_thread_add_job;
sscreen->b.get_timestamp = si_get_timestamp;
sscreen->b.get_compiler_options = si_get_compiler_options;
sscreen->b.get_device_uuid = si_get_device_uuid;
sscreen->b.get_driver_uuid = si_get_driver_uuid;
sscreen->b.query_memory_info = si_query_memory_info;
@ -929,6 +920,9 @@ void si_init_screen_get_functions(struct si_screen *sscreen)
BITFIELD_BIT(MESA_SHADER_TESS_EVAL);
options->support_indirect_outputs = BITFIELD_BIT(MESA_SHADER_TESS_CTRL);
options->varying_expression_max_cost = si_varying_expression_max_cost;
for (unsigned i = 0; i < ARRAY_SIZE(sscreen->b.nir_options); i++)
sscreen->b.nir_options[i] = options;
}
void si_init_shader_caps(struct si_screen *sscreen)

2
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -1192,7 +1192,7 @@ static void si_lower_ngg(struct si_shader *shader, nir_shader *nir,
struct nir_shader *si_deserialize_shader(struct si_shader_selector *sel)
{
struct pipe_screen *screen = &sel->screen->b;
const void *options = screen->get_compiler_options(screen, sel->stage);
const void *options = screen->nir_options[sel->stage];
struct blob_reader blob_reader;
blob_reader_init(&blob_reader, sel->nir_binary, sel->nir_size);

11
src/gallium/drivers/softpipe/sp_screen.c
View file

@ -98,13 +98,6 @@ static const nir_shader_compiler_options sp_compiler_options = {
.support_indirect_outputs = (uint8_t)BITFIELD_MASK(PIPE_SHADER_TYPES),
};
static const struct nir_shader_compiler_options *
softpipe_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
return &sp_compiler_options;
}
/**
* Query format support for creating a texture, drawing surface, etc.
* \param format the format to test
@ -463,9 +456,11 @@ softpipe_create_screen(struct sw_winsys *winsys)
screen->base.is_format_supported = softpipe_is_format_supported;
screen->base.context_create = softpipe_create_context;
screen->base.flush_frontbuffer = softpipe_flush_frontbuffer;
screen->base.get_compiler_options = softpipe_get_compiler_options;
screen->use_llvm = sp_debug & SP_DBG_USE_LLVM;
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
screen->base.nir_options[i] = &sp_compiler_options;
softpipe_init_screen_texture_funcs(&screen->base);
softpipe_init_screen_fence_funcs(&screen->base);

4
src/gallium/drivers/svga/svga_screen.c
View file

@ -789,7 +789,6 @@ svga_screen_create(struct svga_winsys_screen *sws)
screen->get_vendor = svga_get_vendor;
screen->get_device_vendor = svga_get_vendor; // TODO actual device vendor
screen->get_screen_fd = svga_screen_get_fd;
screen->get_compiler_options = svga_get_compiler_options;
screen->get_timestamp = NULL;
screen->is_format_supported = svga_is_format_supported;
screen->context_create = svga_context_create;
@ -837,6 +836,9 @@ svga_screen_create(struct svga_winsys_screen *sws)
svgascreen->debug.sampler_state_mapping = false;
}
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
screen->nir_options[i] = svga_get_compiler_options(screen, i);
debug_printf("%s enabled\n",
sws->have_gl43 ? "SM5+" :
sws->have_sm5 ? "SM5" :

15
src/gallium/drivers/tegra/tegra_screen.c
View file

@ -407,19 +407,6 @@ tegra_screen_query_memory_info(struct pipe_screen *pscreen,
screen->gpu->query_memory_info(screen->gpu, info);
}
static const struct nir_shader_compiler_options *
tegra_screen_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
struct tegra_screen *screen = to_tegra_screen(pscreen);
const struct nir_shader_compiler_options *options = NULL;
if (screen->gpu->get_compiler_options)
options = screen->gpu->get_compiler_options(screen->gpu, shader);
return options;
}
static struct disk_cache *
tegra_screen_get_disk_shader_cache(struct pipe_screen *pscreen)
{
@ -593,7 +580,6 @@ tegra_screen_create(int fd)
screen->base.get_driver_query_group_info = tegra_screen_get_driver_query_group_info;
screen->base.query_memory_info = tegra_screen_query_memory_info;
screen->base.get_compiler_options = tegra_screen_get_compiler_options;
screen->base.get_disk_shader_cache = tegra_screen_get_disk_shader_cache;
screen->base.resource_create_with_modifiers = tegra_screen_resource_create_with_modifiers;
@ -605,6 +591,7 @@ tegra_screen_create(int fd)
memcpy((void *)&screen->base.caps, &screen->gpu->caps, sizeof(screen->base.caps));
memcpy((void *)screen->base.shader_caps, screen->gpu->shader_caps, sizeof(screen->base.shader_caps));
memcpy((void *)&screen->base.compute_caps, &screen->gpu->compute_caps, sizeof(screen->base.compute_caps));
memcpy((void *)&screen->base.nir_options, &screen->gpu->nir_options, sizeof(screen->base.nir_options));
return &screen->base;
}

12
src/gallium/drivers/v3d/v3d_blit.c
View file

@ -614,8 +614,7 @@ v3d_get_sand8_vs(struct pipe_context *pctx)
return v3d->sand8_blit_vs;
const struct nir_shader_compiler_options *options =
pscreen->get_compiler_options(pscreen,
PIPE_SHADER_VERTEX);
pscreen->nir_options[PIPE_SHADER_VERTEX];
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_VERTEX,
options,
@ -662,8 +661,7 @@ v3d_get_sand8_fs(struct pipe_context *pctx, int cpp)
return *cached_shader;
const struct nir_shader_compiler_options *options =
pscreen->get_compiler_options(pscreen,
PIPE_SHADER_FRAGMENT);
pscreen->nir_options[PIPE_SHADER_FRAGMENT];
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT,
options, "%s", name);
@ -893,8 +891,7 @@ v3d_get_sand30_vs(struct pipe_context *pctx)
return v3d->sand30_blit_vs;
const struct nir_shader_compiler_options *options =
pscreen->get_compiler_options(pscreen,
PIPE_SHADER_VERTEX);
pscreen->nir_options[PIPE_SHADER_VERTEX];
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_VERTEX,
options,
@ -969,8 +966,7 @@ v3d_get_sand30_fs(struct pipe_context *pctx)
return v3d->sand30_blit_fs;
const struct nir_shader_compiler_options *options =
pscreen->get_compiler_options(pscreen,
PIPE_SHADER_FRAGMENT);
pscreen->nir_options[PIPE_SHADER_FRAGMENT];
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT,
options,

4
src/gallium/drivers/v3d/v3d_screen.c
View file

@ -827,12 +827,14 @@ v3d_screen_create(int fd, const struct pipe_screen_config *config,
pscreen->get_name = v3d_screen_get_name;
pscreen->get_vendor = v3d_screen_get_vendor;
pscreen->get_device_vendor = v3d_screen_get_vendor;
pscreen->get_compiler_options = v3d_screen_get_compiler_options;
pscreen->get_disk_shader_cache = v3d_screen_get_disk_shader_cache;
pscreen->query_dmabuf_modifiers = v3d_screen_query_dmabuf_modifiers;
pscreen->is_dmabuf_modifier_supported =
v3d_screen_is_dmabuf_modifier_supported;
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
pscreen->nir_options[i] = v3d_screen_get_compiler_options(pscreen, i);
if (screen->has_perfmon) {
pscreen->get_driver_query_group_info = v3d_get_driver_query_group_info;
pscreen->get_driver_query_info = v3d_get_driver_query_info;

6
src/gallium/drivers/vc4/vc4_blit.c
View file

@ -224,8 +224,7 @@ static void *vc4_get_yuv_vs(struct pipe_context *pctx)
return vc4->yuv_linear_blit_vs;
const struct nir_shader_compiler_options *options =
pscreen->get_compiler_options(pscreen,
PIPE_SHADER_VERTEX);
pscreen->nir_options[PIPE_SHADER_VERTEX];
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_VERTEX, options,
"linear_blit_vs");
@ -264,8 +263,7 @@ static void *vc4_get_yuv_fs(struct pipe_context *pctx, int cpp)
return *cached_shader;
const struct nir_shader_compiler_options *options =
pscreen->get_compiler_options(pscreen,
PIPE_SHADER_FRAGMENT);
pscreen->nir_options[PIPE_SHADER_FRAGMENT];
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT,
options, "%s", name);

4
src/gallium/drivers/vc4/vc4_screen.c
View file

@ -512,10 +512,12 @@ vc4_screen_create(int fd, const struct pipe_screen_config *config,
vc4_resource_screen_init(pscreen);
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
pscreen->nir_options[i] = vc4_screen_get_compiler_options(pscreen, i);
pscreen->get_name = vc4_screen_get_name;
pscreen->get_vendor = vc4_screen_get_vendor;
pscreen->get_device_vendor = vc4_screen_get_vendor;
pscreen->get_compiler_options = vc4_screen_get_compiler_options;
pscreen->query_dmabuf_modifiers = vc4_screen_query_dmabuf_modifiers;
pscreen->is_dmabuf_modifier_supported = vc4_screen_is_dmabuf_modifier_supported;

16
src/gallium/drivers/virgl/virgl_screen.c
View file

@ -974,15 +974,6 @@ fixup_renderer(union virgl_caps *caps)
memcpy(caps->v2.renderer, renderer, renderer_len + 1);
}
static const struct nir_shader_compiler_options *
virgl_get_compiler_options(struct pipe_screen *pscreen,
enum pipe_shader_type shader)
{
struct virgl_screen *vscreen = virgl_screen(pscreen);
return &vscreen->compiler_options;
}
static int
virgl_screen_get_fd(struct pipe_screen *pscreen)
{
@ -1031,12 +1022,14 @@ virgl_create_screen(struct virgl_winsys *vws, const struct pipe_screen_config *c
screen->tweak_l8_srgb_readback |= !!(virgl_debug & VIRGL_DEBUG_L8_SRGB_ENABLE_READBACK);
screen->shader_sync |= !!(virgl_debug & VIRGL_DEBUG_SHADER_SYNC);
for (unsigned i = 0; i <= MESA_SHADER_COMPUTE; i++)
screen->base.nir_options[i] = &screen->compiler_options;
screen->vws = vws;
screen->base.get_name = virgl_get_name;
screen->base.get_vendor = virgl_get_vendor;
screen->base.get_screen_fd = virgl_screen_get_fd;
screen->base.get_video_param = virgl_get_video_param;
screen->base.get_compiler_options = virgl_get_compiler_options;
screen->base.is_format_supported = virgl_is_format_supported;
screen->base.is_video_format_supported = virgl_is_video_format_supported;
screen->base.destroy = virgl_destroy_screen;
@ -1069,8 +1062,7 @@ virgl_create_screen(struct virgl_winsys *vws, const struct pipe_screen_config *c
virgl_init_screen_caps(screen);
/* Set up the NIR shader compiler options now that we've figured out the caps. */
screen->compiler_options = *(nir_shader_compiler_options *)
nir_to_tgsi_get_compiler_options(&screen->base, PIPE_SHADER_IR_NIR, PIPE_SHADER_FRAGMENT);
screen->compiler_options = nir_to_tgsi_compiler_options;
if (screen->base.caps.doubles) {
/* virglrenderer is missing DFLR support, so avoid turning 64-bit
* ffract+fsub back into ffloor.

7
src/gallium/drivers/zink/zink_compiler.c
View file

@ -1363,13 +1363,6 @@ zink_screen_init_compiler(struct zink_screen *screen)
screen->nir_options.support_indirect_outputs = (uint8_t)BITFIELD_MASK(PIPE_SHADER_TYPES);
}
const struct nir_shader_compiler_options *
zink_get_compiler_options(struct pipe_screen *pscreen,
gl_shader_stage shader)
{
return &zink_screen(pscreen)->nir_options;
}
struct nir_shader *
zink_tgsi_to_nir(struct pipe_screen *screen, const struct tgsi_token *tokens)
{

4
src/gallium/drivers/zink/zink_compiler.h
View file

@ -49,10 +49,6 @@ clamp_stage(const shader_info *info)
return info->stage == MESA_SHADER_KERNEL ? MESA_SHADER_COMPUTE : info->stage;
}
const struct nir_shader_compiler_options *
zink_get_compiler_options(struct pipe_screen *screen,
gl_shader_stage shader);
struct nir_shader *
zink_tgsi_to_nir(struct pipe_screen *screen, const struct tgsi_token *tokens);

4
src/gallium/drivers/zink/zink_screen.c
View file

@ -3486,6 +3486,9 @@ zink_internal_create_screen(const struct pipe_screen_config *config, int64_t dev
check_base_requirements(screen);
util_live_shader_cache_init(&screen->shaders, zink_create_gfx_shader_state, zink_delete_shader_state);
for (unsigned i = 0; i < ARRAY_SIZE(screen->base.nir_options); i++)
screen->base.nir_options[i] = &screen->nir_options;
screen->base.get_name = zink_get_name;
if (screen->instance_info->have_KHR_external_memory_capabilities) {
screen->base.get_device_uuid = zink_get_device_uuid;
@ -3501,7 +3504,6 @@ zink_internal_create_screen(const struct pipe_screen_config *config, int64_t dev
screen->base.get_device_vendor = zink_get_device_vendor;
screen->base.get_timestamp = zink_get_timestamp;
screen->base.query_memory_info = zink_query_memory_info;
screen->base.get_compiler_options = zink_get_compiler_options;
screen->base.get_sample_pixel_grid = zink_get_sample_pixel_grid;
screen->base.is_compute_copy_faster = zink_is_compute_copy_faster;
screen->base.is_format_supported = zink_is_format_supported;

2
src/gallium/frontends/lavapipe/lvp_device.c
View file

@ -1324,7 +1324,7 @@ lvp_physical_device_init(struct lvp_physical_device *device,
if (!device->pscreen)
return vk_error(instance, VK_ERROR_OUT_OF_HOST_MEMORY);
for (unsigned i = 0; i < ARRAY_SIZE(device->drv_options); i++)
device->drv_options[i] = device->pscreen->get_compiler_options(device->pscreen, i);
device->drv_options[i] = device->pscreen->nir_options[MIN2(i, MESA_SHADER_COMPUTE)];
device->sync_timeline_type = vk_sync_timeline_get_type(&lvp_pipe_sync_type);
device->sync_types[0] = &lvp_pipe_sync_type;

2
src/gallium/frontends/lavapipe/lvp_pipeline.c
View file

@ -1186,7 +1186,7 @@ create_shader_object(struct lvp_device *device, const VkShaderCreateInfoEXT *pCr
return VK_NULL_HANDLE;
blob_reader_init(&blob, data + SHA1_DIGEST_LENGTH + VK_UUID_SIZE, size);
nir = nir_deserialize(NULL, device->pscreen->get_compiler_options(device->pscreen, stage), &blob);
nir = nir_deserialize(NULL, device->pscreen->nir_options[stage], &blob);
if (!nir)
goto fail;
}

2
src/gallium/frontends/lavapipe/lvp_ray_tracing_pipeline.c
View file

@ -1044,7 +1044,7 @@ lvp_compile_ray_tracing_pipeline(struct lvp_pipeline *pipeline,
{
nir_builder _b = nir_builder_init_simple_shader(
MESA_SHADER_COMPUTE,
pipeline->device->pscreen->get_compiler_options(pipeline->device->pscreen, MESA_SHADER_COMPUTE),
pipeline->device->pscreen->nir_options[MESA_SHADER_COMPUTE],
"ray tracing pipeline");
nir_builder *b = &_b;

3
src/gallium/frontends/rusticl/mesa/pipe/screen.rs
View file

@ -414,7 +414,7 @@ impl PipeScreen {
&self,
shader: pipe_shader_type,
) -> *const nir_shader_compiler_options {
unsafe { self.screen().get_compiler_options.unwrap()(self.screen.as_ptr(), shader) }
self.screen().nir_options[shader as usize]
}
pub fn shader_cache(&self) -> Option<DiskCacheBorrowed> {
@ -479,7 +479,6 @@ fn has_required_cbs(screen: *mut pipe_screen) -> bool {
& has_required_feature!(screen, destroy)
& has_required_feature!(screen, fence_finish)
& has_required_feature!(screen, fence_reference)
& has_required_feature!(screen, get_compiler_options)
& has_required_feature!(screen, get_name)
& has_required_feature!(screen, is_format_supported)
& has_required_feature!(screen, resource_create)

7
src/gallium/include/pipe/p_screen.h
View file

@ -95,6 +95,7 @@ struct pipe_screen {
const struct pipe_caps caps;
const struct pipe_shader_caps shader_caps[PIPE_SHADER_MESH_TYPES];
const struct pipe_compute_caps compute_caps;
const struct nir_shader_compiler_options *nir_options[PIPE_SHADER_MESH_TYPES];
/**
* Get the fd associated with the screen
@ -467,12 +468,6 @@ struct pipe_screen {
void (*query_memory_info)(struct pipe_screen *screen,
struct pipe_memory_info *info);
/**
* Get nir compiler options struct.
*/
const struct nir_shader_compiler_options *(*get_compiler_options)(
struct pipe_screen *screen, enum pipe_shader_type shader);
/**
* Returns a pointer to a driver-specific on-disk shader cache. If the
* driver failed to create the cache or does not support an on-disk shader

1
src/gallium/tools/trace/dump_state.py
View file

@ -759,7 +759,6 @@ class Interpreter(parser.SimpleTraceDumper):
('pipe_screen', 'get_vendor'),
('pipe_screen', 'get_device_uuid'),
('pipe_screen', 'get_driver_uuid'),
('pipe_screen', 'get_compiler_options'),
('pipe_screen', 'get_param'),
('pipe_screen', 'get_paramf'),
('pipe_screen', 'get_shader_param'),

11
src/mesa/state_tracker/st_extensions.c
View file

@ -204,14 +204,9 @@ void st_init_limits(struct pipe_screen *screen,
struct gl_shader_compiler_options *options =
&c->ShaderCompilerOptions[stage];
struct gl_program_constants *pc = &c->Program[stage];
if (screen->get_compiler_options)
options->NirOptions = screen->get_compiler_options(screen, sh);
if (!options->NirOptions) {
options->NirOptions =
nir_to_tgsi_get_compiler_options(screen, PIPE_SHADER_IR_NIR, sh);
}
options->NirOptions =
screen->nir_options[stage] ? screen->nir_options[stage] :
&nir_to_tgsi_compiler_options;
if (sh == PIPE_SHADER_COMPUTE) {
if (!screen->caps.compute)