From c0e5e8f932af629640146fca762f2187b51194a1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 13 Dec 2024 19:25:59 -0500 Subject: [PATCH] amd: update addrlib Acked-by: Samuel Pitoiset Part-of: --- src/amd/addrlib/inc/addrinterface.h | 213 +- src/amd/addrlib/inc/addrtypes.h | 2 +- src/amd/addrlib/meson.build | 8 + src/amd/addrlib/src/addrinterface.cpp | 167 +- src/amd/addrlib/src/amdgpu_asic_addr.h | 7 +- src/amd/addrlib/src/chip/r800/si_gb_reg.h | 2 +- src/amd/addrlib/src/core/addrcommon.h | 202 +- src/amd/addrlib/src/core/addrelemlib.cpp | 2 +- src/amd/addrlib/src/core/addrlib.cpp | 103 +- src/amd/addrlib/src/core/addrlib.h | 81 +- src/amd/addrlib/src/core/addrlib1.cpp | 2 +- src/amd/addrlib/src/core/addrlib1.h | 7 +- src/amd/addrlib/src/core/addrlib2.cpp | 234 +- src/amd/addrlib/src/core/addrlib2.h | 133 +- src/amd/addrlib/src/core/addrlib3.cpp | 296 +- src/amd/addrlib/src/core/addrlib3.h | 118 +- src/amd/addrlib/src/core/addrobject.cpp | 2 +- src/amd/addrlib/src/core/addrobject.h | 2 +- src/amd/addrlib/src/core/addrswizzler.cpp | 441 ++ src/amd/addrlib/src/core/addrswizzler.h | 119 + .../addrlib/src/gfx10/gfx10SwizzlePattern.h | 3 +- src/amd/addrlib/src/gfx10/gfx10addrlib.cpp | 874 ++-- src/amd/addrlib/src/gfx10/gfx10addrlib.h | 33 +- .../addrlib/src/gfx11/gfx11SwizzlePattern.h | 3780 ++++++++--------- src/amd/addrlib/src/gfx11/gfx11addrlib.cpp | 351 +- src/amd/addrlib/src/gfx11/gfx11addrlib.h | 22 +- .../addrlib/src/gfx12/gfx12SwizzlePattern.h | 2 +- src/amd/addrlib/src/gfx12/gfx12addrlib.cpp | 284 +- src/amd/addrlib/src/gfx12/gfx12addrlib.h | 12 +- src/amd/addrlib/src/gfx9/gfx9addrlib.cpp | 6 +- src/amd/addrlib/src/gfx9/gfx9addrlib.h | 2 +- src/amd/addrlib/src/r800/ciaddrlib.cpp | 2 +- src/amd/addrlib/src/r800/egbaddrlib.cpp | 2 +- src/amd/addrlib/src/r800/siaddrlib.cpp | 2 +- src/amd/addrlib/src/r800/siaddrlib.h | 5 +- src/amd/common/ac_surface.c | 12 +- src/amd/common/ac_surface_modifier_test.c | 2 - 37 files changed, 4957 insertions(+), 2578 deletions(-) create mode 100644 src/amd/addrlib/src/core/addrswizzler.cpp create mode 100644 src/amd/addrlib/src/core/addrswizzler.h diff --git a/src/amd/addrlib/inc/addrinterface.h b/src/amd/addrlib/inc/addrinterface.h index 77654d044f9..65b99923dfb 100644 --- a/src/amd/addrlib/inc/addrinterface.h +++ b/src/amd/addrlib/inc/addrinterface.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -23,8 +23,8 @@ extern "C" { #endif -#define ADDRLIB_VERSION_MAJOR 9 -#define ADDRLIB_VERSION_MINOR 11 +#define ADDRLIB_VERSION_MAJOR 10 +#define ADDRLIB_VERSION_MINOR 1 #define ADDRLIB_MAKE_VERSION(major, minor) ((major << 16) | minor) #define ADDRLIB_VERSION ADDRLIB_MAKE_VERSION(ADDRLIB_VERSION_MAJOR, ADDRLIB_VERSION_MINOR) @@ -34,6 +34,25 @@ typedef VOID* ADDR_HANDLE; /// Client handle used in callbacks typedef VOID* ADDR_CLIENT_HANDLE; +typedef struct _ADDR_COORD2D +{ + UINT_32 x; + UINT_32 y; +} ADDR_COORD2D; + +typedef struct _ADDR_COORD3D +{ + UINT_32 x; + UINT_32 y; + UINT_32 z; // also slices for 2D images +} ADDR_COORD3D; + +typedef struct _ADDR_EXTENT2D +{ + UINT_32 width; + UINT_32 height; +} ADDR_EXTENT2D; + typedef struct _ADDR_EXTENT3D { UINT_32 width; @@ -1525,6 +1544,16 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr( */ UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib); +/** +**************************************************************************************************** +* AddrGetInterfaceVersion +* +* @brief +* Get AddrLib interface version number (eg. Addr2 = 2) +**************************************************************************************************** +*/ +UINT_32 ADDR_API AddrGetInterfaceVersion(ADDR_HANDLE hLib); + /** **************************************************************************************************** * AddrUseTileIndex @@ -2637,6 +2666,89 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord( const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut); +/** +**************************************************************************************************** +* ADDR2_COPY_MEMSURFACE_REGION +* +* @brief +* Input structure for Addr2CopyMemToSurface and Addr2CopySurfaceToMem +**************************************************************************************************** +*/ +typedef struct _ADDR2_COPY_MEMSURFACE_REGION +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< Starting X coordinate, in elements + UINT_32 y; ///< Starting Y coordinate, in elements + UINT_32 slice; ///< Starting slice index or Z coordinate, in elements + UINT_32 mipId; ///< The mip ID in mip chain + ADDR_EXTENT3D copyDims; ///< Size of the region to copy, in elements + + void* pMem; ///< Pointer to memory to copy + UINT_64 memRowPitch; ///< Pitch between rows in bytes + UINT_64 memSlicePitch; ///< Pitch between array/depth slices in bytes +} ADDR2_COPY_MEMSURFACE_REGION; + +/** +**************************************************************************************************** +* ADDR2_COPY_MEMSURFACE_INPUT +* +* @brief +* Input structure for Addr2CopyMemToSurface and Addr2CopySurfaceToMem +**************************************************************************************************** +*/ +typedef struct _ADDR2_COPY_MEMSURFACE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + AddrSwizzleMode swizzleMode; ///< Swizzle mode + AddrFormat format; ///< Format + ADDR2_SURFACE_FLAGS flags; ///< Surface flags + AddrResourceType resourceType; ///< Surface type + UINT_32 bpp; ///< Bits per pixel + ADDR_EXTENT3D unAlignedDims; ///< Surface original dimensions (of mip0), in pixels + UINT_32 numMipLevels; ///< Total mipmap levels + UINT_32 numSamples; ///< Number of samples + UINT_32 pitchInElement; ///< Pitch in elements (blocks for compressed formats) + UINT_32 pbXor; ///< Xor value + + void* pMappedSurface; ///< Pointer to the image surface, mapped to CPU memory + BOOL_32 singleSubres; ///< Pointer is to the base of the subresource, not to the + /// base of the surface image data. Requires: + /// - copyDims.depth == 1 + /// - all copy regions target the same mip + /// - all copy regions target the same slice/depth +} ADDR2_COPY_MEMSURFACE_INPUT; + +/** +**************************************************************************************************** +* Addr2CopyMemToSurface +* +* @brief +* Copy an image region from memory to an uncompressed CPU-mapped surface +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2CopyMemToSurface( + ADDR_HANDLE hLib, + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount +); + +/** +**************************************************************************************************** +* Addr2CopySurfaceToMem +* +* @brief +* Copy an image region from an uncompressed CPU-mapped surface to memory +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2CopySurfaceToMem( + ADDR_HANDLE hLib, + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount +); /** @@ -3724,7 +3836,7 @@ typedef struct _ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT AddrResourceType resourceType; ///< Surface type AddrFormat format; ///< Surface format UINT_32 width; ///< Width of mip0 in texels (not in compressed block) - UINT_32 height; ///< Height of mip0 in texels (not in compressed block) + UINT_32 height; ///< Height of mip0 in texels (not in compressed block) UINT_32 numSlices; ///< Number surface slice/depth of mip0 UINT_32 numMipLevels; ///< Total mipmap levels. UINT_32 pipeBankXor; ///< Combined swizzle used to do bank/pipe rotation @@ -3977,6 +4089,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2GetPossibleSwizzleModes( * * @brief * Return whether the swizzle mode is supported by display engine + pResult: whether it is displayAble or not for the given displaySwizzleMode **************************************************************************************************** */ ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode( @@ -4056,23 +4169,22 @@ typedef union _ADDR3_SURFACE_FLAGS { struct { - UINT_32 color : 1; ///< This resource is a color buffer, can be used with RTV UINT_32 depth : 1; ///< This resource is a depth buffer, can be used with DSV UINT_32 stencil : 1; ///< This resource is a stencil buffer, can be used with DSV - UINT_32 texture : 1; ///< This resource can be used with SRV - UINT_32 unordered : 1; ///< This resource can be used with UAV UINT_32 hiZHiS : 1; UINT_32 blockCompressed : 1; UINT_32 nv12 : 1; UINT_32 p010 : 1; UINT_32 view3dAs2dArray : 1; UINT_32 isVrsImage : 1; ///< This resource is a VRS source image + UINT_32 standardPrt : 1; ///< This resource is a PRT resource with the specific block + /// dimensions that some APIs want UINT_32 reserved1 : 2; UINT_32 denseSliceExact : 1; ///< Pad dimensions such that /// Pow2Align(pitch*height, surfAlign)==pitch*height UINT_32 qbStereo : 1; ///< Quad buffer stereo surface UINT_32 display : 1; ///< This resource is displayable, can be used with DRV - UINT_32 reserved : 16; ///< Reserved bits + UINT_32 reserved : 18; ///< Reserved bits }; UINT_32 value; @@ -4323,6 +4435,91 @@ ADDR_E_RETURNCODE ADDR_API Addr3ComputeSurfaceAddrFromCoord( const ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut); + +/** +**************************************************************************************************** +* ADDR3_COPY_MEMSURFACE_REGION +* +* @brief +* Input structure for Addr3CopyMemToSurface and Addr3CopySurfaceToMem +**************************************************************************************************** +*/ +typedef struct _ADDR3_COPY_MEMSURFACE_REGION +{ + UINT_32 size; ///< Size of this structure in bytes + + UINT_32 x; ///< Starting X coordinate, in elements + UINT_32 y; ///< Starting Y coordinate, in elements + UINT_32 slice; ///< Starting slice index or Z coordinate, in elements + UINT_32 mipId; ///< The mip ID in mip chain + ADDR_EXTENT3D copyDims; ///< Size of the region to copy, in elements + + void* pMem; ///< Pointer to memory to copy + UINT_64 memRowPitch; ///< Pitch between rows in bytes + UINT_64 memSlicePitch; ///< Pitch between array/depth slices in bytes +} ADDR3_COPY_MEMSURFACE_REGION; + +/** +**************************************************************************************************** +* ADDR3_COPY_MEMSURFACE_INPUT +* +* @brief +* Input structure for Addr3CopyMemToSurface and Addr3CopySurfaceToMem +**************************************************************************************************** +*/ +typedef struct _ADDR3_COPY_MEMSURFACE_INPUT +{ + UINT_32 size; ///< Size of this structure in bytes + + Addr3SwizzleMode swizzleMode; ///< Swizzle mode for Gfx12 + ADDR3_SURFACE_FLAGS flags; ///< Surface flags + AddrFormat format; ///< Format + AddrResourceType resourceType; ///< Surface type + UINT_32 bpp; ///< Bits per pixel + ADDR_EXTENT3D unAlignedDims; ///< Surface original dimensions (of mip0), in pixels + UINT_32 numMipLevels; ///< Total mipmap levels + UINT_32 numSamples; ///< Number of samples + UINT_32 pitchInElement; ///< Pitch in elements (blocks for compressed formats) + UINT_32 pbXor; ///< Xor value + + void* pMappedSurface; ///< Pointer to the image surface, mapped to CPU memory + BOOL_32 singleSubres; ///< Pointer is to the base of the subresource, not to the + /// base of the surface image data. Requires: + /// - copyDims.depth == 1 + /// - all copy regions target the same mip + /// - all copy regions target the same slice/depth +} ADDR3_COPY_MEMSURFACE_INPUT; + +/** +**************************************************************************************************** +* Addr3CopyMemToSurface +* +* @brief +* Copy an image region from memory to an uncompressed CPU-mapped surface +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr3CopyMemToSurface( + ADDR_HANDLE hLib, + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount +); + +/** +**************************************************************************************************** +* Addr3CopySurfaceToMem +* +* @brief +* Copy an image region from an uncompressed CPU-mapped surface to memory +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr3CopySurfaceToMem( + ADDR_HANDLE hLib, + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount +); + /** **************************************************************************************************** * ADDR3_COMPUTE_PIPEBANKXOR_INPUT diff --git a/src/amd/addrlib/inc/addrtypes.h b/src/amd/addrlib/inc/addrtypes.h index dcbb7a5a0bc..66f7ed4a4af 100644 --- a/src/amd/addrlib/inc/addrtypes.h +++ b/src/amd/addrlib/inc/addrtypes.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/meson.build b/src/amd/addrlib/meson.build index de15a0e2459..7a5266f8f38 100644 --- a/src/amd/addrlib/meson.build +++ b/src/amd/addrlib/meson.build @@ -18,6 +18,8 @@ files_addrlib = files( 'src/core/addrlib3.h', 'src/core/addrobject.cpp', 'src/core/addrobject.h', + 'src/core/addrswizzler.cpp', + 'src/core/addrswizzler.h', 'src/core/coord.cpp', 'src/core/coord.h', 'src/gfx9/gfx9addrlib.cpp', @@ -54,6 +56,12 @@ else cpp_args_addrlib += '-DBIGENDIAN_CPU' endif +if with_mesa_ndebug + cpp_args_addrlib += '-DDEBUG=0' +else + cpp_args_addrlib += '-DDEBUG=1' +endif + cpp_args_addrlib += cpp.get_supported_arguments( ['-Wno-unused-variable', '-Wno-unused-local-typedefs', '-Wno-unused-but-set-variable', '-Wno-maybe-uninitialized', diff --git a/src/amd/addrlib/src/addrinterface.cpp b/src/amd/addrlib/src/addrinterface.cpp index 0ab0917e415..52a1f91ef6d 100644 --- a/src/amd/addrlib/src/addrinterface.cpp +++ b/src/amd/addrlib/src/addrinterface.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -573,6 +573,32 @@ UINT_32 ADDR_API AddrGetVersion(ADDR_HANDLE hLib) return version; } +/** +**************************************************************************************************** +* AddrGetInterfaceVersion +* +* @brief +* Get AddrLib interface version number. Client may use this to know what AddrN functions to +* use. +**************************************************************************************************** +*/ +UINT_32 ADDR_API AddrGetInterfaceVersion(ADDR_HANDLE hLib) +{ + UINT_32 version = 0; + + Addr::Lib* pLib = Lib::GetLib(hLib); + + ADDR_ASSERT(pLib != NULL); + + if (pLib) + { + version = pLib->GetInterfaceVersion(); + } + + ADDR_RESET_DEBUG_PRINTERS(); + return version; +} + /** **************************************************************************************************** * AddrUseTileIndex @@ -1219,6 +1245,72 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord( return returnCode; } +/** +**************************************************************************************************** +* Addr2CopyMemToSurface +* +* @brief +* Copy an image region from memory to an uncompressed CPU-mapped surface +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2CopyMemToSurface( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, ///< [in] description of image and mapping + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, ///< [in] list of copy regions + UINT_32 regionCount) ///< [in] count of copy regions in list +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->CopyMemToSurface(pIn, pRegions, regionCount); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr2CopySurfaceToMem +* +* @brief +* Copy an image region from an uncompressed CPU-mapped surface to memory +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr2CopySurfaceToMem( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, ///< [in] description of image and mapping + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, ///< [in] list of copy regions + UINT_32 regionCount) ///< [in] count of copy regions in list +{ + V2::Lib* pLib = V2::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->CopySurfaceToMem(pIn, pRegions, regionCount); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + /** **************************************************************************************************** @@ -1822,7 +1914,12 @@ ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode( in.swizzleMode = swizzleMode; in.bpp = bpp; - *pResult = pLib->IsValidDisplaySwizzleMode(&in); + BOOL_32 result = pLib->IsValidDisplaySwizzleMode(&in); + if (pResult != NULL) + { + *pResult = result; + } + returnCode = ADDR_OK; } else @@ -2105,6 +2202,72 @@ ADDR_E_RETURNCODE ADDR_API Addr3ComputeSurfaceAddrFromCoord( return returnCode; } +/** +**************************************************************************************************** +* Addr3CopyMemToSurface +* +* @brief +* Copy an image region from memory to an uncompressed CPU-mapped surface +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr3CopyMemToSurface( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, ///< [in] description of image and mapping + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, ///< [in] list of copy regions + UINT_32 regionCount) ///< [in] count of copy regions in list +{ + V3::Lib* pLib = V3::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->CopyMemToSurface(pIn, pRegions, regionCount); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + +/** +**************************************************************************************************** +* Addr3CopySurfaceToMem +* +* @brief +* Copy an image region from an uncompressed CPU-mapped surface to memory +* +* @return +* ADDR_OK if successful, otherwise an error code of ADDR_E_RETURNCODE +**************************************************************************************************** +*/ +ADDR_E_RETURNCODE ADDR_API Addr3CopySurfaceToMem( + ADDR_HANDLE hLib, ///< address lib handle + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, ///< [in] description of image and mapping + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, ///< [in] list of copy regions + UINT_32 regionCount) ///< [in] count of copy regions in list +{ + V3::Lib* pLib = V3::Lib::GetLib(hLib); + + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pLib != NULL) + { + returnCode = pLib->CopySurfaceToMem(pIn, pRegions, regionCount); + } + else + { + returnCode = ADDR_ERROR; + } + + return returnCode; +} + /** **************************************************************************************************** * Addr3ComputePipeBankXor diff --git a/src/amd/addrlib/src/amdgpu_asic_addr.h b/src/amd/addrlib/src/amdgpu_asic_addr.h index 4fd0acd9954..a047a8340a5 100644 --- a/src/amd/addrlib/src/amdgpu_asic_addr.h +++ b/src/amd/addrlib/src/amdgpu_asic_addr.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2017-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2017-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -81,7 +81,7 @@ #define AMDGPU_VEGA10_RANGE 0x01, 0x14 //# 1 <= x < 20 #define AMDGPU_VEGA12_RANGE 0x14, 0x28 //# 20 <= x < 40 -#define AMDGPU_VEGA20_RANGE 0x28, 0x32 //# 40 <= x < max +#define AMDGPU_VEGA20_RANGE 0x28, 0xFF //# 40 <= x < max #define AMDGPU_RAVEN_RANGE 0x01, 0x81 //# 1 <= x < 129 #define AMDGPU_RAVEN2_RANGE 0x81, 0x90 //# 129 <= x < 144 @@ -183,8 +183,7 @@ #define ASICREV_IS_GFX1151(r) ASICREV_IS(r, GFX1151) #define ASICREV_IS_GFX1152(r) ASICREV_IS(r, GFX1152) #define ASICREV_IS_GFX1153(r) ASICREV_IS(r, GFX1153) - -#define ASICREV_IS_PHOENIX1(r) ASICREV_IS(r, PHOENIX1) +#define ASICREV_IS_PHOENIX(r) ASICREV_IS(r, PHOENIX) #define ASICREV_IS_PHOENIX2(r) ASICREV_IS(r, PHOENIX2) #define ASICREV_IS_HAWK_POINT1(r) ASICREV_IS(r, HAWK_POINT1) #define ASICREV_IS_HAWK_POINT2(r) ASICREV_IS(r, HAWK_POINT2) diff --git a/src/amd/addrlib/src/chip/r800/si_gb_reg.h b/src/amd/addrlib/src/chip/r800/si_gb_reg.h index c5bb578f98a..787478c8cb8 100644 --- a/src/amd/addrlib/src/chip/r800/si_gb_reg.h +++ b/src/amd/addrlib/src/chip/r800/si_gb_reg.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/src/core/addrcommon.h b/src/amd/addrlib/src/core/addrcommon.h index 38e16b05741..40d75105d98 100644 --- a/src/amd/addrlib/src/core/addrcommon.h +++ b/src/amd/addrlib/src/core/addrcommon.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -17,6 +17,7 @@ #define __ADDR_COMMON_H__ #include "addrinterface.h" +#include #if !defined(__APPLE__) || defined(HAVE_TSERVER) @@ -26,7 +27,6 @@ #if defined(__GNUC__) #include - #include #endif #if defined(_WIN32) @@ -36,17 +36,9 @@ //////////////////////////////////////////////////////////////////////////////////////////////////// // Platform specific debug break defines //////////////////////////////////////////////////////////////////////////////////////////////////// -#if !defined(DEBUG) - #ifdef NDEBUG - #define DEBUG 0 - #else - #define DEBUG 1 - #endif -#endif - #if DEBUG #if defined(__GNUC__) - #define ADDR_DBG_BREAK() { assert(false); } + #define ADDR_DBG_BREAK() { raise(SIGTRAP); } #elif defined(__APPLE__) #define ADDR_DBG_BREAK() { IOPanic("");} #else @@ -191,21 +183,21 @@ do { if (!(cond)) \ //////////////////////////////////////////////////////////////////////////////////////////////////// -#if defined(static_assert) +#if 1 #define ADDR_C_ASSERT(__e) static_assert(__e, "") #else - /* This version of STATIC_ASSERT() relies on VLAs. If COND is - * false/zero, the array size will be -1 and we'll get a compile - * error - */ -# define ADDR_C_ASSERT(__e) do { \ - (void) sizeof(char [1 - 2*!(__e)]); \ - } while (0) +#define ADDR_C_ASSERT(__e) typedef char __ADDR_C_ASSERT__[(__e) ? 1 : -1] #endif namespace Addr { +//////////////////////////////////////////////////////////////////////////////////////////////////// +// Common constants +//////////////////////////////////////////////////////////////////////////////////////////////////// +static const UINT_32 MaxElementBytesLog2 = 5; ///< Max number of bpp (8bpp/16bpp/32bpp/64bpp/128bpp) + + namespace V1 { //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -382,6 +374,36 @@ static inline UINT_32 BitScanForward( return out; } +/** +**************************************************************************************************** +* BitScanReverse +* +* @brief +* Returns the reverse-position of the most-significant '1' bit. Must not be 0. +**************************************************************************************************** +*/ +static inline UINT_32 BitScanReverse( + UINT_32 mask) ///< [in] Bitmask to scan +{ + ADDR_ASSERT(mask > 0); + unsigned long out = 0; +#if (defined(_WIN32) || defined(_WIN64)) + ::_BitScanReverse(&out, mask); + out ^= 31; +#elif defined(__GNUC__) + out = __builtin_clz(mask); +#else + out = 32; + while (mask != 0) + { + mask >>= 1; + out++; + } + out = sizeof(mask) * 8 - out; +#endif + return out; +} + /** **************************************************************************************************** * IsPow2 @@ -414,10 +436,10 @@ static inline UINT_64 IsPow2( /** **************************************************************************************************** -* ByteAlign +* PowTwoAlign * * @brief -* Align UINT_32 "x" to "align" alignment, "align" should be power of 2 +* Align UINT_32 "x" up to "align" alignment, "align" should be power of 2 **************************************************************************************************** */ static inline UINT_32 PowTwoAlign( @@ -433,10 +455,10 @@ static inline UINT_32 PowTwoAlign( /** **************************************************************************************************** -* ByteAlign +* PowTwoAlign * * @brief -* Align UINT_64 "x" to "align" alignment, "align" should be power of 2 +* Align UINT_64 "x" up to "align" alignment, "align" should be power of 2 **************************************************************************************************** */ static inline UINT_64 PowTwoAlign( @@ -450,6 +472,44 @@ static inline UINT_64 PowTwoAlign( return (x + (align - 1)) & (~(align - 1)); } +/** +**************************************************************************************************** +* PowTwoAlignDown +* +* @brief +* Align UINT_32 "x" down to "align" alignment, "align" should be power of 2 +**************************************************************************************************** +*/ +static inline UINT_32 PowTwoAlignDown( + UINT_32 x, + UINT_32 align) +{ + // + // Assert that x is a power of two. + // + ADDR_ASSERT(IsPow2(align)); + return (x & ~(align - 1)); +} + +/** +**************************************************************************************************** +* PowTwoAlignDown +* +* @brief +* Align UINT_64 "x" down to "align" alignment, "align" should be power of 2 +**************************************************************************************************** +*/ +static inline UINT_64 PowTwoAlignDown( + UINT_64 x, + UINT_64 align) +{ + // + // Assert that x is a power of two. + // + ADDR_ASSERT(IsPow2(align)); + return (x & ~(align - 1)); +} + /** **************************************************************************************************** * Min @@ -571,44 +631,18 @@ static inline UINT_32 NextPow2( return newDim; } -/** -**************************************************************************************************** -* Log2NonPow2 -* -* @brief -* Compute log of base 2 no matter the target is power of 2 or not -**************************************************************************************************** -*/ -static inline UINT_32 Log2NonPow2( - UINT_32 x) ///< [in] the value should calculate log based 2 -{ - UINT_32 y; - - y = 0; - while (x > 1) - { - x >>= 1; - y++; - } - - return y; -} - /** **************************************************************************************************** * Log2 * * @brief -* Compute log of base 2 +* Compute log of base 2 no matter the target is power of 2 or not. Returns 0 if 0. **************************************************************************************************** */ static inline UINT_32 Log2( UINT_32 x) ///< [in] the value should calculate log based 2 { - // Assert that x is a power of two. - ADDR_ASSERT(IsPow2(x)); - - return Log2NonPow2(x); + return (x != 0) ? (31 ^ BitScanReverse(x)) : 0; } /** @@ -1081,6 +1115,72 @@ static inline UINT_32 ShiftRight( return Max(a >> b, 1u); } +/** +**************************************************************************************************** +* VoidPtrDec +* +* @brief +* Subtracts a value to the given pointer directly. +**************************************************************************************************** +*/ +static inline void* VoidPtrDec( + void* pIn, + size_t offset) +{ + return (void*)(((char*)(pIn)) - offset); +} + +static inline const void* VoidPtrDec( + const void* pIn, + size_t offset) +{ + return (const void*)(((const char*)(pIn)) - offset); +} + +/** +**************************************************************************************************** +* VoidPtrInc +* +* @brief +* Adds a value to the given pointer directly. +**************************************************************************************************** +*/ +static inline void* VoidPtrInc( + void* pIn, + size_t offset) +{ + return (void*)(((char*)(pIn)) + offset); +} + +static inline const void* VoidPtrInc( + const void* pIn, + size_t offset) +{ + return (const void*)(((const char*)(pIn)) + offset); +} + +/** +**************************************************************************************************** +* VoidPtrXor +* +* @brief +* Xors a value to the given pointer directly. +**************************************************************************************************** +*/ +static inline void* VoidPtrXor( + void* pIn, + size_t offset) +{ + return (void*)(((uintptr_t)(pIn)) ^ offset); +} + +static inline const void* VoidPtrXor( + const void* pIn, + size_t offset) +{ + return (const void*)(((uintptr_t)(pIn)) ^ offset); +} + } // Addr #endif // __ADDR_COMMON_H__ diff --git a/src/amd/addrlib/src/core/addrelemlib.cpp b/src/amd/addrlib/src/core/addrelemlib.cpp index e42d2624adc..21eef445789 100644 --- a/src/amd/addrlib/src/core/addrelemlib.cpp +++ b/src/amd/addrlib/src/core/addrelemlib.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/src/core/addrlib.cpp b/src/amd/addrlib/src/core/addrlib.cpp index 0e147d22cf7..2074b98fdcb 100644 --- a/src/amd/addrlib/src/core/addrlib.cpp +++ b/src/amd/addrlib/src/core/addrlib.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -668,4 +668,105 @@ UINT_32 Lib::GetBpe(AddrFormat format) const return GetElemLib()->GetBitsPerPixel(format); } +/** +************************************************************************************************************************ +* Lib::ComputeOffsetFromSwizzlePattern +* +* @brief +* Compute offset from swizzle pattern +* +* @return +* Offset +************************************************************************************************************************ +*/ +UINT_32 Lib::ComputeOffsetFromSwizzlePattern( + const UINT_64* pPattern, ///< Swizzle pattern + UINT_32 numBits, ///< Number of bits in pattern + UINT_32 x, ///< x coord in pixel + UINT_32 y, ///< y coord in pixel + UINT_32 z, ///< z coord in slice + UINT_32 s ///< sample id + ) +{ + UINT_32 offset = 0; + const ADDR_BIT_SETTING* pSwizzlePattern = reinterpret_cast(pPattern); + + for (UINT_32 i = 0; i < numBits; i++) + { + UINT_32 v = 0; + + if (pSwizzlePattern[i].x != 0) + { + UINT_16 mask = pSwizzlePattern[i].x; + UINT_32 xBits = x; + + while (mask != 0) + { + if (mask & 1) + { + v ^= xBits & 1; + } + + xBits >>= 1; + mask >>= 1; + } + } + + if (pSwizzlePattern[i].y != 0) + { + UINT_16 mask = pSwizzlePattern[i].y; + UINT_32 yBits = y; + + while (mask != 0) + { + if (mask & 1) + { + v ^= yBits & 1; + } + + yBits >>= 1; + mask >>= 1; + } + } + + if (pSwizzlePattern[i].z != 0) + { + UINT_16 mask = pSwizzlePattern[i].z; + UINT_32 zBits = z; + + while (mask != 0) + { + if (mask & 1) + { + v ^= zBits & 1; + } + + zBits >>= 1; + mask >>= 1; + } + } + + if (pSwizzlePattern[i].s != 0) + { + UINT_16 mask = pSwizzlePattern[i].s; + UINT_32 sBits = s; + + while (mask != 0) + { + if (mask & 1) + { + v ^= sBits & 1; + } + + sBits >>= 1; + mask >>= 1; + } + } + + offset |= (v << i); + } + + return offset; +} + } // Addr diff --git a/src/amd/addrlib/src/core/addrlib.h b/src/amd/addrlib/src/core/addrlib.h index 63c35f8a96a..64881a7f434 100644 --- a/src/amd/addrlib/src/core/addrlib.h +++ b/src/amd/addrlib/src/core/addrlib.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -214,6 +214,73 @@ enum ShaderEngineTileSizeConfig ADDR_CONFIG_SE_TILE_32 = 0x00000001, }; +/** +************************************************************************************************************************ +* @brief Bit setting for swizzle pattern +************************************************************************************************************************ +*/ +union ADDR_BIT_SETTING +{ + struct + { + UINT_16 x; + UINT_16 y; + UINT_16 z; + UINT_16 s; + }; + UINT_64 value; +}; + +/** +************************************************************************************************************************ +* InitBit +* +* @brief +* Initialize bit setting value via a return value +************************************************************************************************************************ +*/ +#define InitBit(c, index) (1ull << ((c << 4) + index)) + +const UINT_64 X0 = InitBit(0, 0); +const UINT_64 X1 = InitBit(0, 1); +const UINT_64 X2 = InitBit(0, 2); +const UINT_64 X3 = InitBit(0, 3); +const UINT_64 X4 = InitBit(0, 4); +const UINT_64 X5 = InitBit(0, 5); +const UINT_64 X6 = InitBit(0, 6); +const UINT_64 X7 = InitBit(0, 7); +const UINT_64 X8 = InitBit(0, 8); +const UINT_64 X9 = InitBit(0, 9); +const UINT_64 X10 = InitBit(0, 10); +const UINT_64 X11 = InitBit(0, 11); + +const UINT_64 Y0 = InitBit(1, 0); +const UINT_64 Y1 = InitBit(1, 1); +const UINT_64 Y2 = InitBit(1, 2); +const UINT_64 Y3 = InitBit(1, 3); +const UINT_64 Y4 = InitBit(1, 4); +const UINT_64 Y5 = InitBit(1, 5); +const UINT_64 Y6 = InitBit(1, 6); +const UINT_64 Y7 = InitBit(1, 7); +const UINT_64 Y8 = InitBit(1, 8); +const UINT_64 Y9 = InitBit(1, 9); +const UINT_64 Y10 = InitBit(1, 10); +const UINT_64 Y11 = InitBit(1, 11); + +const UINT_64 Z0 = InitBit(2, 0); +const UINT_64 Z1 = InitBit(2, 1); +const UINT_64 Z2 = InitBit(2, 2); +const UINT_64 Z3 = InitBit(2, 3); +const UINT_64 Z4 = InitBit(2, 4); +const UINT_64 Z5 = InitBit(2, 5); +const UINT_64 Z6 = InitBit(2, 6); +const UINT_64 Z7 = InitBit(2, 7); +const UINT_64 Z8 = InitBit(2, 8); + +const UINT_64 S0 = InitBit(3, 0); +const UINT_64 S1 = InitBit(3, 1); +const UINT_64 S2 = InitBit(3, 2); + /** **************************************************************************************************** * @brief This class contains asic independent address lib functionalities @@ -234,6 +301,9 @@ public: } static Lib* GetLib(ADDR_HANDLE hLib); + + /// Returns which version of addrlib functions should be used. + virtual UINT_32 GetInterfaceVersion() const = 0; /// Returns AddrLib version (from compiled binary instead include file) UINT_32 GetVersion() @@ -263,6 +333,15 @@ public: UINT_32 GetBpe(AddrFormat format) const; + + static UINT_32 ComputeOffsetFromSwizzlePattern( + const UINT_64* pPattern, + UINT_32 numBits, + UINT_32 x, + UINT_32 y, + UINT_32 z, + UINT_32 s); + protected: Lib(); // Constructor is protected Lib(const Client* pClient); diff --git a/src/amd/addrlib/src/core/addrlib1.cpp b/src/amd/addrlib/src/core/addrlib1.cpp index dbddc20a2c1..fc459f5684e 100644 --- a/src/amd/addrlib/src/core/addrlib1.cpp +++ b/src/amd/addrlib/src/core/addrlib1.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/src/core/addrlib1.h b/src/amd/addrlib/src/core/addrlib1.h index f4477676030..4c2cae13ddc 100644 --- a/src/amd/addrlib/src/core/addrlib1.h +++ b/src/amd/addrlib/src/core/addrlib1.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -70,6 +70,11 @@ public: static Lib* GetLib( ADDR_HANDLE hLib); + virtual UINT_32 GetInterfaceVersion() const + { + return 1; + } + /// Returns tileIndex support BOOL_32 UseTileIndex(INT_32 index) const { diff --git a/src/amd/addrlib/src/core/addrlib2.cpp b/src/amd/addrlib/src/core/addrlib2.cpp index 19527050d95..b3920f34959 100644 --- a/src/amd/addrlib/src/core/addrlib2.cpp +++ b/src/amd/addrlib/src/core/addrlib2.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -382,6 +382,238 @@ ADDR_E_RETURNCODE Lib::ComputeSurfaceAddrFromCoord( return returnCode; } +/** +************************************************************************************************************************ +* Lib::CopyLinearSurface +* +* @brief +* Implements uncompressed linear copies between memory and images. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::CopyLinearSurface( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount, + bool surfaceIsDst) const +{ + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR2_MIP_INFO mipInfo[MaxMipLevels] = {{0}}; + ADDR_ASSERT(pIn->numMipLevels <= MaxMipLevels); + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numSamples > 1) + { + returnCode = ADDR_INVALIDPARAMS; + } + + localIn.size = sizeof(localIn); + localIn.flags = pIn->flags; + localIn.swizzleMode = pIn->swizzleMode; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unAlignedDims.width, 1u); + localIn.height = Max(pIn->unAlignedDims.height, 1u); + localIn.numSlices = Max(pIn->unAlignedDims.depth, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + + if (localIn.numMipLevels <= 1) + { + localIn.pitchInElement = pIn->pitchInElement; + } + + localOut.size = sizeof(localOut); + localOut.pMipInfo = mipInfo; + + if (returnCode == ADDR_OK) + { + returnCode = ComputeSurfaceInfo(&localIn, &localOut); + } + + if (returnCode == ADDR_OK) + { + for (UINT_32 regionIdx = 0; regionIdx < regionCount; regionIdx++) + { + const ADDR2_COPY_MEMSURFACE_REGION* pCurRegion = &pRegions[regionIdx]; + + void* pMipBase = VoidPtrInc(pIn->pMappedSurface, + (pIn->singleSubres ? 0 : mipInfo[pCurRegion->mipId].offset)); + + const size_t lineSizeBytes = (localIn.bpp >> 3) * pCurRegion->copyDims.width; + const size_t lineImgPitchBytes = (localIn.bpp >> 3) * mipInfo[pCurRegion->mipId].pitch; + + for (UINT_32 sliceIdx = 0; sliceIdx < pCurRegion->copyDims.depth; sliceIdx++) + { + UINT_32 sliceCoord = sliceIdx + pCurRegion->slice; + size_t imgOffsetInMip = (localOut.sliceSize * sliceCoord) + + (lineImgPitchBytes * pCurRegion->y) + + (pCurRegion->x * (pIn->bpp >> 3)); + size_t memOffset = sliceIdx * pCurRegion->memSlicePitch; + + for (UINT_32 yIdx = 0; yIdx < pCurRegion->copyDims.height; yIdx++) + { + if (surfaceIsDst) + { + memcpy(VoidPtrInc(pMipBase, imgOffsetInMip), VoidPtrInc(pCurRegion->pMem, memOffset), lineSizeBytes); + } + else + { + memcpy(VoidPtrInc(pCurRegion->pMem, memOffset), VoidPtrInc(pMipBase, imgOffsetInMip), lineSizeBytes); + } + + imgOffsetInMip += lineImgPitchBytes; + memOffset += pCurRegion->memRowPitch; + } + } + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::CopyMemToSurface +* +* @brief +* Interface function stub of Addr2CopyMemToSurface. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::CopyMemToSurface( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if ((regionCount == 0) || (pRegions == NULL)) + { + returnCode = ADDR_INVALIDPARAMS; + } + else if (GetFillSizeFieldsFlags() == TRUE) + { + if (pIn->size != sizeof(ADDR2_COPY_MEMSURFACE_INPUT)) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + UINT_32 baseSlice = pRegions[0].slice; + UINT_32 baseMip = pRegions[0].mipId; + BOOL_32 singleSubres = pIn->singleSubres; + for (UINT_32 i = 0; i < regionCount; i++) + { + if (pRegions[i].size != sizeof(ADDR2_COPY_MEMSURFACE_REGION)) + { + returnCode = ADDR_INVALIDPARAMS; + break; + } + if (singleSubres && + ((pRegions[i].copyDims.depth != 1) || + (pRegions[i].slice != baseSlice) || + (pRegions[i].mipId != baseMip))) + { + // Copy will cover multiple/interleaved subresources, a + // mapped pointer to a single subres cannot be valid. + returnCode = ADDR_INVALIDPARAMS; + break; + } + } + } + } + + if (returnCode == ADDR_OK) + { + if (IsLinear(pIn->swizzleMode)) + { + returnCode = CopyLinearSurface(pIn, pRegions, regionCount, true); + } + else + { + returnCode = HwlCopyMemToSurface(pIn, pRegions, regionCount); + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::CopySurfaceToMem +* +* @brief +* Interface function stub of Addr2CopySurfaceToMem. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::CopySurfaceToMem( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (regionCount == 0) + { + returnCode = ADDR_INVALIDPARAMS; + } + else if (GetFillSizeFieldsFlags() == TRUE) + { + if (pIn->size != sizeof(ADDR2_COPY_MEMSURFACE_INPUT)) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + UINT_32 baseSlice = pRegions[0].slice; + UINT_32 baseMip = pRegions[0].mipId; + BOOL_32 singleSubres = pIn->singleSubres; + for (UINT_32 i = 0; i < regionCount; i++) + { + if (pRegions[i].size != sizeof(ADDR2_COPY_MEMSURFACE_REGION)) + { + returnCode = ADDR_INVALIDPARAMS; + break; + } + if (singleSubres && + ((pRegions[i].copyDims.depth != 1) || + (pRegions[i].slice != baseSlice) || + (pRegions[i].mipId != baseMip))) + { + // Copy will cover multiple/interleaved subresources, a + // mapped pointer to a single subres cannot be valid. + returnCode = ADDR_INVALIDPARAMS; + break; + } + } + } + } + + if (returnCode == ADDR_OK) + { + if (IsLinear(pIn->swizzleMode)) + { + returnCode = CopyLinearSurface(pIn, pRegions, regionCount, false); + } + else + { + returnCode = HwlCopySurfaceToMem(pIn, pRegions, regionCount); + } + } + + return returnCode; +} + /** ************************************************************************************************************************ * Lib::ComputeSurfaceCoordFromAddr diff --git a/src/amd/addrlib/src/core/addrlib2.h b/src/amd/addrlib/src/core/addrlib2.h index d652244ec37..504832aa0fc 100644 --- a/src/amd/addrlib/src/core/addrlib2.h +++ b/src/amd/addrlib/src/core/addrlib2.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -74,23 +74,6 @@ struct Dim3d UINT_32 d; }; -// Macro define resource block type -enum AddrBlockType -{ - AddrBlockLinear = 0, // Resource uses linear swizzle mode - AddrBlockMicro = 1, // Resource uses 256B block - AddrBlockThin4KB = 2, // Resource uses thin 4KB block - AddrBlockThick4KB = 3, // Resource uses thick 4KB block - AddrBlockThin64KB = 4, // Resource uses thin 64KB block - AddrBlockThick64KB = 5, // Resource uses thick 64KB block - AddrBlockThinVar = 6, // Resource uses thin var block - AddrBlockThickVar = 7, // Resource uses thick var block - AddrBlockMaxTiledType, - - AddrBlockThin256KB = AddrBlockThinVar, - AddrBlockThick256KB = AddrBlockThickVar, -}; - enum AddrSwSet { AddrSwSetZ = 1 << ADDR_SW_Z, @@ -109,23 +92,6 @@ const UINT_32 Log2Size256 = 8u; const UINT_32 Log2Size4K = 12u; const UINT_32 Log2Size64K = 16u; -/** -************************************************************************************************************************ -* @brief Bit setting for swizzle pattern -************************************************************************************************************************ -*/ -union ADDR_BIT_SETTING -{ - struct - { - UINT_16 x; - UINT_16 y; - UINT_16 z; - UINT_16 s; - }; - UINT_64 value; -}; - /** ************************************************************************************************************************ * @brief Swizzle pattern information @@ -142,55 +108,6 @@ struct ADDR_SW_PATINFO UINT_8 nibble4Idx; }; -/** -************************************************************************************************************************ -* InitBit -* -* @brief -* Initialize bit setting value via a return value -************************************************************************************************************************ -*/ -#define InitBit(c, index) (1ull << ((c << 4) + index)) - -const UINT_64 X0 = InitBit(0, 0); -const UINT_64 X1 = InitBit(0, 1); -const UINT_64 X2 = InitBit(0, 2); -const UINT_64 X3 = InitBit(0, 3); -const UINT_64 X4 = InitBit(0, 4); -const UINT_64 X5 = InitBit(0, 5); -const UINT_64 X6 = InitBit(0, 6); -const UINT_64 X7 = InitBit(0, 7); -const UINT_64 X8 = InitBit(0, 8); -const UINT_64 X9 = InitBit(0, 9); -const UINT_64 X10 = InitBit(0, 10); -const UINT_64 X11 = InitBit(0, 11); - -const UINT_64 Y0 = InitBit(1, 0); -const UINT_64 Y1 = InitBit(1, 1); -const UINT_64 Y2 = InitBit(1, 2); -const UINT_64 Y3 = InitBit(1, 3); -const UINT_64 Y4 = InitBit(1, 4); -const UINT_64 Y5 = InitBit(1, 5); -const UINT_64 Y6 = InitBit(1, 6); -const UINT_64 Y7 = InitBit(1, 7); -const UINT_64 Y8 = InitBit(1, 8); -const UINT_64 Y9 = InitBit(1, 9); -const UINT_64 Y10 = InitBit(1, 10); -const UINT_64 Y11 = InitBit(1, 11); - -const UINT_64 Z0 = InitBit(2, 0); -const UINT_64 Z1 = InitBit(2, 1); -const UINT_64 Z2 = InitBit(2, 2); -const UINT_64 Z3 = InitBit(2, 3); -const UINT_64 Z4 = InitBit(2, 4); -const UINT_64 Z5 = InitBit(2, 5); -const UINT_64 Z6 = InitBit(2, 6); -const UINT_64 Z7 = InitBit(2, 7); -const UINT_64 Z8 = InitBit(2, 8); - -const UINT_64 S0 = InitBit(3, 0); -const UINT_64 S1 = InitBit(3, 1); -const UINT_64 S2 = InitBit(3, 2); /** ************************************************************************************************************************ @@ -205,6 +122,10 @@ public: static Lib* GetLib( ADDR_HANDLE hLib); + virtual UINT_32 GetInterfaceVersion() const + { + return 2; + } // // Interface stubs // @@ -221,6 +142,16 @@ public: ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr( const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; + + ADDR_E_RETURNCODE CopyMemToSurface( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const; + + ADDR_E_RETURNCODE CopySurfaceToMem( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const; // For HTile ADDR_E_RETURNCODE ComputeHtileInfo( @@ -473,7 +404,7 @@ protected: sample = (sample == 0) ? 1 : sample; frag = (frag == 0) ? sample : frag; - UINT_32 fmaskBpp = QLog2(frag); + UINT_32 fmaskBpp = Log2(frag); if (sample > frag) { @@ -725,6 +656,24 @@ protected: return ADDR_NOTIMPLEMENTED; } + virtual ADDR_E_RETURNCODE HwlCopyMemToSurface( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlCopySurfaceToMem( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + ADDR_E_RETURNCODE ComputeBlock256Equation( AddrResourceType rsrcType, AddrSwizzleMode swMode, @@ -754,6 +703,12 @@ protected: const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + ADDR_E_RETURNCODE CopyLinearSurface( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount, + bool surfaceIsDst) const; + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordLinear( const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; @@ -892,13 +847,13 @@ protected: { case ADDR_RSRC_TEX_3D: // Fall through to share 2D case - actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->numSlices) + 1); + actualMipLevels = Max(actualMipLevels, Log2(pIn->numSlices) + 1); case ADDR_RSRC_TEX_2D: // Fall through to share 1D case - actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->height) + 1); + actualMipLevels = Max(actualMipLevels, Log2(pIn->height) + 1); case ADDR_RSRC_TEX_1D: // Base 1D case - actualMipLevels = Max(actualMipLevels, Log2NonPow2(pIn->width) + 1); + actualMipLevels = Max(actualMipLevels, Log2(pIn->width) + 1); break; default: ADDR_ASSERT_ALWAYS(); @@ -976,8 +931,6 @@ protected: static const UINT_32 MaxSwModeType = 32; // Max number of resource type (2D/3D) supported for equation static const UINT_32 MaxRsrcType = 2; - // Max number of bpp (8bpp/16bpp/32bpp/64bpp/128bpp) - static const UINT_32 MaxElementBytesLog2 = 5; // Almost all swizzle mode + resource type support equation static const UINT_32 EquationTableSize = MaxElementBytesLog2 * MaxSwModeType * MaxRsrcType; // Equation table diff --git a/src/amd/addrlib/src/core/addrlib3.cpp b/src/amd/addrlib/src/core/addrlib3.cpp index 3446b9681e8..cfa5107a3b8 100644 --- a/src/amd/addrlib/src/core/addrlib3.cpp +++ b/src/amd/addrlib/src/core/addrlib3.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -82,7 +82,7 @@ void Lib::Init() // There is no equation table entry for linear, so start at the "next" swizzle mode entry. for (UINT_32 swizzleModeIdx = ADDR3_LINEAR + 1; swizzleModeIdx < ADDR3_MAX_TYPE; swizzleModeIdx++) { - for (UINT_32 msaaRateIdx = 0; msaaRateIdx < MaxMsaaRateLog2; msaaRateIdx++) + for (UINT_32 msaaRateIdx = 0; msaaRateIdx < MaxNumMsaaRates; msaaRateIdx++) { for (UINT_32 log2BytesIdx = 0; log2BytesIdx < MaxElementBytesLog2; log2BytesIdx++) { @@ -276,6 +276,11 @@ ADDR_E_RETURNCODE Lib::ComputeSurfaceInfo( } } + if (returnCode == ADDR_OK) + { + returnCode = ComputeSurfaceInfoSanityCheck(&localIn); + } + if (returnCode == ADDR_OK) { returnCode = HwlComputeSurfaceInfo(&localIn, pOut); @@ -480,6 +485,242 @@ ADDR_E_RETURNCODE Lib::ComputeSurfaceAddrFromCoord( return returnCode; } +/** +************************************************************************************************************************ +* Lib::CopyLinearSurface +* +* @brief +* Implements uncompressed linear copies between memory and images. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::CopyLinearSurface( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount, + bool surfaceIsDst) const +{ + ADDR3_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR3_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR3_MIP_INFO mipInfo[Addr3MaxMipLevels] = {{0}}; + ADDR_ASSERT(pIn->numMipLevels <= Addr3MaxMipLevels); + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numSamples > 1) + { + returnCode = ADDR_INVALIDPARAMS; + } + + localIn.size = sizeof(localIn); + localIn.flags = pIn->flags; + localIn.swizzleMode = ADDR3_LINEAR; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unAlignedDims.width, 1u); + localIn.height = Max(pIn->unAlignedDims.height, 1u); + localIn.numSlices = Max(pIn->unAlignedDims.depth, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + + if (localIn.numMipLevels <= 1) + { + localIn.pitchInElement = pIn->pitchInElement; + } + + localOut.size = sizeof(localOut); + localOut.pMipInfo = mipInfo; + + if (returnCode == ADDR_OK) + { + returnCode = ComputeSurfaceInfo(&localIn, &localOut); + } + + if (returnCode == ADDR_OK) + { + for (UINT_32 regionIdx = 0; regionIdx < regionCount; regionIdx++) + { + const ADDR3_COPY_MEMSURFACE_REGION* pCurRegion = &pRegions[regionIdx]; + + void* pMipBase = VoidPtrInc(pIn->pMappedSurface, + (pIn->singleSubres ? 0 : mipInfo[pCurRegion->mipId].offset)); + + const size_t lineSizeBytes = (localIn.bpp >> 3) * pCurRegion->copyDims.width; + const size_t lineImgPitchBytes = (localIn.bpp >> 3) * mipInfo[pCurRegion->mipId].pitch; + + for (UINT_32 sliceIdx = 0; sliceIdx < pCurRegion->copyDims.depth; sliceIdx++) + { + UINT_32 sliceCoord = sliceIdx + pCurRegion->slice; + size_t imgOffsetInMip = (localOut.sliceSize * sliceCoord) + + (lineImgPitchBytes * pCurRegion->y) + + (pCurRegion->x * (pIn->bpp >> 3)); + size_t memOffset = sliceIdx * pCurRegion->memSlicePitch; + + for (UINT_32 yIdx = 0; yIdx < pCurRegion->copyDims.height; yIdx++) + { + if (surfaceIsDst) + { + memcpy(VoidPtrInc(pMipBase, imgOffsetInMip), + VoidPtrInc(pCurRegion->pMem, memOffset), + lineSizeBytes); + } + else + { + memcpy(VoidPtrInc(pCurRegion->pMem, memOffset), + VoidPtrInc(pMipBase, imgOffsetInMip), + lineSizeBytes); + } + + imgOffsetInMip += lineImgPitchBytes; + memOffset += pCurRegion->memRowPitch; + } + } + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::CopyMemToSurface +* +* @brief +* Interface function stub of Addr3CopyMemToSurface. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::CopyMemToSurface( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if ((regionCount == 0) || (pRegions == NULL)) + { + returnCode = ADDR_INVALIDPARAMS; + } + else if (GetFillSizeFieldsFlags() == TRUE) + { + if (pIn->size != sizeof(ADDR3_COPY_MEMSURFACE_INPUT)) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + UINT_32 baseSlice = pRegions[0].slice; + UINT_32 baseMip = pRegions[0].mipId; + BOOL_32 singleSubres = pIn->singleSubres; + for (UINT_32 i = 0; i < regionCount; i++) + { + if (pRegions[i].size != sizeof(ADDR3_COPY_MEMSURFACE_REGION)) + { + returnCode = ADDR_INVALIDPARAMS; + break; + } + if (singleSubres && + ((pRegions[i].copyDims.depth != 1) || + (pRegions[i].slice != baseSlice) || + (pRegions[i].mipId != baseMip))) + { + // Copy will cover multiple/interleaved subresources, a + // mapped pointer to a single subres cannot be valid. + returnCode = ADDR_INVALIDPARAMS; + break; + } + } + } + } + + if (returnCode == ADDR_OK) + { + if (IsLinear(pIn->swizzleMode)) + { + returnCode = CopyLinearSurface(pIn, pRegions, regionCount, true); + } + else + { + returnCode = HwlCopyMemToSurface(pIn, pRegions, regionCount); + } + } + + return returnCode; +} + +/** +************************************************************************************************************************ +* Lib::CopySurfaceToMem +* +* @brief +* Interface function stub of Addr3CopySurfaceToMem. +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::CopySurfaceToMem( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (regionCount == 0) + { + returnCode = ADDR_INVALIDPARAMS; + } + else if (GetFillSizeFieldsFlags() == TRUE) + { + if (pIn->size != sizeof(ADDR3_COPY_MEMSURFACE_INPUT)) + { + returnCode = ADDR_INVALIDPARAMS; + } + else + { + UINT_32 baseSlice = pRegions[0].slice; + UINT_32 baseMip = pRegions[0].mipId; + BOOL_32 singleSubres = pIn->singleSubres; + for (UINT_32 i = 0; i < regionCount; i++) + { + if (pRegions[i].size != sizeof(ADDR3_COPY_MEMSURFACE_REGION)) + { + returnCode = ADDR_INVALIDPARAMS; + break; + } + if (singleSubres && + ((pRegions[i].copyDims.depth != 1) || + (pRegions[i].slice != baseSlice) || + (pRegions[i].mipId != baseMip))) + { + // Copy will cover multiple/interleaved subresources, a + // mapped pointer to a single subres cannot be valid. + returnCode = ADDR_INVALIDPARAMS; + break; + } + } + } + } + + if (returnCode == ADDR_OK) + { + if (IsLinear(pIn->swizzleMode)) + { + returnCode = CopyLinearSurface(pIn, pRegions, regionCount, false); + } + else + { + returnCode = HwlCopySurfaceToMem(pIn, pRegions, regionCount); + } + } + + return returnCode; +} + /** ************************************************************************************************************************ * Lib::ComputeSurfaceAddrFromCoord @@ -776,14 +1017,21 @@ ADDR_E_RETURNCODE Lib::ApplyCustomizedPitchHeight( const UINT_32 elementBytes = pIn->bpp >> 3; - // Normal pitch of image data - const UINT_32 pitchAlignmentBytes = 1 << GetBlockSizeLog2(pIn->swizzleMode, TRUE); - const UINT_32 pitchAlignmentElements = pitchAlignmentBytes / elementBytes; - pOut->pitch = PowTwoAlign(pIn->width, pitchAlignmentElements); + UINT_32 pitchAlignmentElements = pOut->blockExtent.width; + UINT_32 pitchSliceAlignmentElements = pOut->blockExtent.width; - // Pitch of image data used for slice sizing (same except for linear images) - const UINT_32 pitchSliceAlignmentBytes = 1 << GetBlockSizeLog2(pIn->swizzleMode, CanTrimLinearPadding(pIn)); - const UINT_32 pitchSliceAlignmentElements = pitchSliceAlignmentBytes / elementBytes; + if (IsLinear(pIn->swizzleMode)) + { + // Normal pitch of image data + const UINT_32 pitchAlignmentBytes = 1 << GetBlockSizeLog2(pIn->swizzleMode, TRUE); + pitchAlignmentElements = pitchAlignmentBytes / elementBytes; + + // Pitch of image data used for slice sizing + const UINT_32 pitchSliceAlignmentBytes = 1 << GetBlockSizeLog2(pIn->swizzleMode, CanTrimLinearPadding(pIn)); + pitchSliceAlignmentElements = pitchSliceAlignmentBytes / elementBytes; + } + + pOut->pitch = PowTwoAlign(pIn->width, pitchAlignmentElements); pOut->pitchForSlice = PowTwoAlign(pIn->width, pitchSliceAlignmentElements); UINT_32 heightAlign = pOut->blockExtent.height; @@ -854,6 +1102,7 @@ ADDR_E_RETURNCODE Lib::ApplyCustomizedPitchHeight( return returnCode; } + /** ************************************************************************************************************************ * Lib::ComputeQbStereoInfo @@ -889,5 +1138,34 @@ VOID Lib::ComputeQbStereoInfo( pOut->sliceSize <<= 1; } +/** +************************************************************************************************************************ +* Lib::ComputeSurfaceInfoSanityCheck +* +* @brief +* Internal function to do basic sanity check before compute surface info +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Lib::ComputeSurfaceInfoSanityCheck( + const ADDR3_COMPUTE_SURFACE_INFO_INPUT* pIn ///< [in] input structure + ) const +{ + ADDR3_GET_POSSIBLE_SWIZZLE_MODE_INPUT localIn = {}; + localIn.size = sizeof(ADDR3_GET_POSSIBLE_SWIZZLE_MODE_INPUT); + localIn.flags = pIn->flags; + localIn.resourceType = pIn->resourceType; + localIn.bpp = pIn->bpp; + localIn.width = pIn->width; + localIn.height = pIn->height; + localIn.numSlices = pIn->numSlices; + localIn.numMipLevels = pIn->numMipLevels; + localIn.numSamples = pIn->numSamples; + + return HwlValidateNonSwModeParams(&localIn) ? ADDR_OK : ADDR_INVALIDPARAMS; +} + } // V3 } // Addr diff --git a/src/amd/addrlib/src/core/addrlib3.h b/src/amd/addrlib/src/core/addrlib3.h index 476218825bd..75c0efded71 100644 --- a/src/amd/addrlib/src/core/addrlib3.h +++ b/src/amd/addrlib/src/core/addrlib3.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2022-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -28,6 +28,7 @@ constexpr UINT_32 Size256 = 256u; constexpr UINT_32 Size4K = 4 * 1024; constexpr UINT_32 Size64K = 64 * 1024; constexpr UINT_32 Size256K = 256 * 1024; +constexpr UINT_32 Addr3MaxMipLevels = 16; // Max Mip Levels across all addr3 chips struct ADDR3_COORD { @@ -46,23 +47,6 @@ struct ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT void* pvAddrParams; }; -/** -************************************************************************************************************************ -* @brief Bit setting for swizzle pattern -************************************************************************************************************************ -*/ -union ADDR_BIT_SETTING -{ - struct - { - UINT_16 x; - UINT_16 y; - UINT_16 z; - UINT_16 s; - }; - UINT_64 value; -}; - /** ************************************************************************************************************************ * @brief Flags for SwizzleModeTable @@ -108,53 +92,6 @@ struct ADDR_SW_PATINFO UINT_8 nibble4Idx; }; -/** -************************************************************************************************************************ -* InitBit -* -* @brief -* Initialize bit setting value via a return value -************************************************************************************************************************ -*/ -#define InitBit(c, index) (1ull << ((c << 4) + index)) - -const UINT_64 X0 = InitBit(0, 0); -const UINT_64 X1 = InitBit(0, 1); -const UINT_64 X2 = InitBit(0, 2); -const UINT_64 X3 = InitBit(0, 3); -const UINT_64 X4 = InitBit(0, 4); -const UINT_64 X5 = InitBit(0, 5); -const UINT_64 X6 = InitBit(0, 6); -const UINT_64 X7 = InitBit(0, 7); -const UINT_64 X8 = InitBit(0, 8); - -const UINT_64 Y0 = InitBit(1, 0); -const UINT_64 Y1 = InitBit(1, 1); -const UINT_64 Y2 = InitBit(1, 2); -const UINT_64 Y3 = InitBit(1, 3); -const UINT_64 Y4 = InitBit(1, 4); -const UINT_64 Y5 = InitBit(1, 5); -const UINT_64 Y6 = InitBit(1, 6); -const UINT_64 Y7 = InitBit(1, 7); -const UINT_64 Y8 = InitBit(1, 8); - -const UINT_64 Z0 = InitBit(2, 0); -const UINT_64 Z1 = InitBit(2, 1); -const UINT_64 Z2 = InitBit(2, 2); -const UINT_64 Z3 = InitBit(2, 3); -const UINT_64 Z4 = InitBit(2, 4); -const UINT_64 Z5 = InitBit(2, 5); - -const UINT_64 S0 = InitBit(3, 0); -const UINT_64 S1 = InitBit(3, 1); -const UINT_64 S2 = InitBit(3, 2); - -/** -************************************************************************************************************************ -* @brief Bit setting for swizzle pattern -************************************************************************************************************************ -*/ - /** ************************************************************************************************************************ * @brief This class contains asic independent address lib functionalities @@ -168,6 +105,11 @@ public: static Lib* GetLib( ADDR_HANDLE hLib); + virtual UINT_32 GetInterfaceVersion() const + { + return 3; + } + // // Interface stubs // @@ -185,6 +127,16 @@ public: const ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + ADDR_E_RETURNCODE CopyMemToSurface( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const; + + ADDR_E_RETURNCODE CopySurfaceToMem( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const; + // Misc ADDR_E_RETURNCODE ComputePipeBankXor( const ADDR3_COMPUTE_PIPEBANKXOR_INPUT* pIn, @@ -212,18 +164,16 @@ protected: SwizzleModeFlags m_swizzleModeTable[ADDR3_MAX_TYPE]; ///< Swizzle mode table // Number of unique MSAA sample rates (1/2/4/8) - static const UINT_32 MaxMsaaRateLog2 = 4; - // Max number of bpp (8bpp/16bpp/32bpp/64bpp/128bpp) - static const UINT_32 MaxElementBytesLog2 = 5; + static const UINT_32 MaxNumMsaaRates = 4; // Number of equation entries in the table UINT_32 m_numEquations; // Swizzle equation lookup table according to swizzle mode, MSAA sample rate and bpp. This does not include linear. - UINT_32 m_equationLookupTable[ADDR3_MAX_TYPE - 1][MaxMsaaRateLog2][MaxElementBytesLog2]; + UINT_32 m_equationLookupTable[ADDR3_MAX_TYPE - 1][MaxNumMsaaRates][MaxElementBytesLog2]; // Block dimension lookup table according to swizzle mode, MSAA sample rate and bpp. This includes linear. - ADDR_EXTENT3D m_blockDimensionTable[ADDR3_MAX_TYPE][MaxMsaaRateLog2][MaxElementBytesLog2]; + ADDR_EXTENT3D m_blockDimensionTable[ADDR3_MAX_TYPE][MaxNumMsaaRates][MaxElementBytesLog2]; virtual ADDR_E_RETURNCODE HwlComputeStereoInfo( const ADDR3_COMPUTE_SURFACE_INFO_INPUT* pIn, @@ -333,7 +283,7 @@ protected: // The max alignment is tied to the swizzle mode and since the largest swizzle mode is 256kb, so the maximal // alignment is also 256kb. - virtual UINT_32 HwlComputeMaxBaseAlignments() const { return Size256K; } + virtual UINT_32 HwlComputeMaxBaseAlignments() const { return Size256K; } virtual ADDR_E_RETURNCODE HwlGetPossibleSwizzleModes( const ADDR3_GET_POSSIBLE_SWIZZLE_MODE_INPUT* pIn, @@ -357,6 +307,24 @@ protected: return ADDR_NOTSUPPORTED; } + virtual ADDR_E_RETURNCODE HwlCopyMemToSurface( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + + virtual ADDR_E_RETURNCODE HwlCopySurfaceToMem( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const + { + ADDR_NOT_IMPLEMENTED(); + return ADDR_NOTSUPPORTED; + } + virtual ADDR_E_RETURNCODE HwlComputePipeBankXor( const ADDR3_COMPUTE_PIPEBANKXOR_INPUT* pIn, ADDR3_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const @@ -373,6 +341,12 @@ protected: const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT* pIn, const ADDR_EXTENT3D& blockDims) const; + ADDR_E_RETURNCODE CopyLinearSurface( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount, + bool surfaceIsDst) const; + ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordLinear( const ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; @@ -457,6 +431,8 @@ protected: virtual BOOL_32 HwlValidateNonSwModeParams(const ADDR3_GET_POSSIBLE_SWIZZLE_MODE_INPUT* pIn) const = 0; + ADDR_E_RETURNCODE ComputeSurfaceInfoSanityCheck(const ADDR3_COMPUTE_SURFACE_INFO_INPUT* pIn) const; + private: // Disallow the copy constructor Lib(const Lib& a); diff --git a/src/amd/addrlib/src/core/addrobject.cpp b/src/amd/addrlib/src/core/addrobject.cpp index d615ceb51af..7dde6c0e22b 100644 --- a/src/amd/addrlib/src/core/addrobject.cpp +++ b/src/amd/addrlib/src/core/addrobject.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/src/core/addrobject.h b/src/amd/addrlib/src/core/addrobject.h index 3a19439575c..1e0adc1dbd2 100644 --- a/src/amd/addrlib/src/core/addrobject.h +++ b/src/amd/addrlib/src/core/addrobject.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/src/core/addrswizzler.cpp b/src/amd/addrlib/src/core/addrswizzler.cpp new file mode 100644 index 00000000000..949d7e5c851 --- /dev/null +++ b/src/amd/addrlib/src/core/addrswizzler.cpp @@ -0,0 +1,441 @@ + +/* +************************************************************************************************************************ +* +* Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved. +* +***********************************************************************************************************************/ + +/** +**************************************************************************************************** +* @file addrswizzler.cpp +* @brief Contains code for efficient CPU swizzling. +**************************************************************************************************** +*/ + +#include "addrswizzler.h" + +namespace Addr +{ + +/** +**************************************************************************************************** +* LutAddresser::LutAddresser +* +* @brief +* Constructor for the LutAddresser class. +**************************************************************************************************** +*/ +LutAddresser::LutAddresser() + : + m_pXLut(&m_lutData[0]), + m_pYLut(&m_lutData[0]), + m_pZLut(&m_lutData[0]), + m_pSLut(&m_lutData[0]), + m_xLutMask(0), + m_yLutMask(0), + m_zLutMask(0), + m_sLutMask(0), + m_blockBits(0), + m_blockSize(), + m_bpeLog2(0), + m_bit(), + m_lutData() +{ +} + +/** +**************************************************************************************************** +* LutAddresser::Init +* +* @brief +* Calculates general properties about the swizzle +**************************************************************************************************** +*/ +void LutAddresser::Init( + const ADDR_BIT_SETTING* pEq, + UINT_32 eqSize, + ADDR_EXTENT3D blockSize, + UINT_8 blockBits) +{ + ADDR_ASSERT(eqSize <= ADDR_MAX_EQUATION_BIT); + memcpy(&m_bit[0], pEq, sizeof(ADDR_BIT_SETTING) * eqSize); + m_blockSize = blockSize; + m_blockBits = blockBits; + + InitSwizzleProps(); + InitLuts(); +} + +/** +**************************************************************************************************** +* LutAddresser::InitSwizzleProps +* +* @brief +* Calculates general properties about the swizzle +**************************************************************************************************** +*/ +void LutAddresser::InitSwizzleProps() +{ + // Calculate BPE from the swizzle. This can be derived from the number of invalid low bits. + m_bpeLog2 = 0; + for (UINT_32 i = 0; i < MaxElementBytesLog2; i++) + { + if (m_bit[i].value != 0) + { + break; + } + m_bpeLog2++; + } + + // Generate a mask/size for each channel's LUT. This may be larger than the block size. + // If a given 'source' bit (eg. 'x0') is used for any part of the equation, fill that in the mask. + for (UINT_32 i = 0; i < ADDR_MAX_EQUATION_BIT; i++) + { + m_xLutMask |= m_bit[i].x; + m_yLutMask |= m_bit[i].y; + m_zLutMask |= m_bit[i].z; + m_sLutMask |= m_bit[i].s; + } + + // An expandX of 1 is a no-op + m_maxExpandX = 1; + if (m_sLutMask == 0) + { + // Calculate expandX from the swizzle. This can be derived from the number of consecutive, + // increasing low x bits + for (UINT_32 i = 0; i < 3; i++) + { + const auto& curBit = m_bit[m_bpeLog2 + i]; + ADDR_ASSERT(curBit.value != 0); + if ((IsPow2(curBit.value) == false) || // More than one bit contributes + (curBit.x == 0) || // Bit is from Y/Z/S channel + (curBit.x != m_maxExpandX)) // X bits are out of order + { + break; + } + m_maxExpandX *= 2; + } + } +} + +/** +**************************************************************************************************** +* LutAddresser::InitLuts +* +* @brief +* Creates lookup tables for each channel. +**************************************************************************************************** +*/ +void LutAddresser::InitLuts() +{ + UINT_32 curOffset = 0; + m_pXLut = &m_lutData[0]; + for (UINT_32 x = 0; x < (m_xLutMask + 1); x++) + { + m_pXLut[x] = EvalEquation(x, 0, 0, 0); + } + curOffset += m_xLutMask + 1; + ADDR_ASSERT(curOffset <= MaxLutSize); + + if (m_yLutMask != 0) + { + m_pYLut = &m_lutData[curOffset]; + for (UINT_32 y = 0; y < (m_yLutMask + 1); y++) + { + m_pYLut[y] = EvalEquation(0, y, 0, 0); + } + curOffset += m_yLutMask + 1; + ADDR_ASSERT(curOffset <= MaxLutSize); + } + else + { + m_pYLut = &m_lutData[0]; + ADDR_ASSERT(m_pYLut[0] == 0); + } + + if (m_zLutMask != 0) + { + m_pZLut = &m_lutData[curOffset]; + for (UINT_32 z = 0; z < (m_zLutMask + 1); z++) + { + m_pZLut[z] = EvalEquation(0, 0, z, 0); + } + curOffset += m_zLutMask + 1; + ADDR_ASSERT(curOffset <= MaxLutSize); + } + else + { + m_pZLut = &m_lutData[0]; + ADDR_ASSERT(m_pZLut[0] == 0); + } + + if (m_sLutMask != 0) + { + m_pSLut = &m_lutData[curOffset]; + for (UINT_32 s = 0; s < (m_sLutMask + 1); s++) + { + m_pSLut[s] = EvalEquation(0, 0, 0, s); + } + curOffset += m_sLutMask + 1; + ADDR_ASSERT(curOffset <= MaxLutSize); + } + else + { + m_pSLut = &m_lutData[0]; + ADDR_ASSERT(m_pSLut[0] == 0); + } +} + +/** +**************************************************************************************************** +* LutAddresser::EvalEquation +* +* @brief +* Evaluates the equation at a given coordinate manually. +**************************************************************************************************** +*/ +UINT_32 LutAddresser::EvalEquation( + UINT_32 x, + UINT_32 y, + UINT_32 z, + UINT_32 s) +{ + UINT_32 out = 0; + + for (UINT_32 i = 0; i < ADDR_MAX_EQUATION_BIT; i++) + { + if (m_bit[i].value == 0) + { + if (out != 0) + { + // Invalid bits at the top of the equation + break; + } + else + { + continue; + } + } + + if (x != 0) + { + UINT_32 xSrcs = m_bit[i].x; + while (xSrcs != 0) + { + UINT_32 xIdx = BitScanForward(xSrcs); + out ^= (((x >> xIdx) & 1) << i); + xSrcs = UnsetLeastBit(xSrcs); + } + } + + if (y != 0) + { + UINT_32 ySrcs = m_bit[i].y; + while (ySrcs != 0) + { + UINT_32 yIdx = BitScanForward(ySrcs); + out ^= (((y >> yIdx) & 1) << i); + ySrcs = UnsetLeastBit(ySrcs); + } + } + + if (z != 0) + { + UINT_32 zSrcs = m_bit[i].z; + while (zSrcs != 0) + { + UINT_32 zIdx = BitScanForward(zSrcs); + out ^= (((z >> zIdx) & 1) << i); + zSrcs = UnsetLeastBit(zSrcs); + } + } + + if (s != 0) + { + UINT_32 sSrcs = m_bit[i].s; + while (sSrcs != 0) + { + UINT_32 sIdx = BitScanForward(sSrcs); + out ^= (((s >> sIdx) & 1) << i); + sSrcs = UnsetLeastBit(sSrcs); + } + } + } + + return out; +} + + +/** +**************************************************************************************************** +* Copy2DSliceUnaligned +* +* @brief +* Copies an arbitrary 2D pixel region to or from a surface. +**************************************************************************************************** +*/ +template +void Copy2DSliceUnaligned( + void* pImgBlockSliceStart, // Block corresponding to beginning of slice + void* pBuf, // Pointer to data starting from the copy origin. + size_t bufStrideY, // Stride of each row in pBuf + UINT_32 imageBlocksY, // Width of the image slice, in blocks. + ADDR_COORD2D origin, // Absolute origin, in elements + ADDR_EXTENT2D extent, // Size to copy, in elements + UINT_32 sliceXor, // Includes pipeBankXor and z XOR + const LutAddresser& addresser) +{ + UINT_32 xStart = origin.x; + UINT_32 xEnd = origin.x + extent.width; + + constexpr UINT_32 PixBytes = (1 << BPELog2); + + // Apply a negative offset now so later code can do eg. pBuf[x] instead of pBuf[x - origin.x] + pBuf = VoidPtrDec(pBuf, xStart * PixBytes); + + // Do things one row at a time for unaligned regions. + for (UINT_32 y = origin.y; y < (origin.y + extent.height); y++) + { + UINT_32 yBlk = (y >> addresser.GetBlockYBits()) * imageBlocksY; + UINT_32 rowXor = sliceXor ^ addresser.GetAddressY(y); + + UINT_32 x = xStart; + + // Most swizzles pack 2-4 pixels horizontally. Take advantage of this even in non-microblock-aligned + // regions to commonly do 2-4x less work. This is still way less good than copying by whole microblocks though. + if (ExpandX > 1) + { + // Unaligned left edge + for (; x < Min(xEnd, PowTwoAlign(xStart, ExpandX)); x++) + { + UINT_32 blk = (yBlk + (x >> addresser.GetBlockXBits())); + void* pImgBlock = VoidPtrInc(pImgBlockSliceStart, blk << addresser.GetBlockBits()); + void* pPix = VoidPtrInc(pImgBlock, rowXor ^ addresser.GetAddressX(x)); + if (ImgIsDest) + { + memcpy(pPix, VoidPtrInc(pBuf, x * PixBytes), PixBytes); + } + else + { + memcpy(VoidPtrInc(pBuf, x * PixBytes), pPix, PixBytes); + } + } + // Aligned middle + for (; x < PowTwoAlignDown(xEnd, ExpandX); x += ExpandX) + { + UINT_32 blk = (yBlk + (x >> addresser.GetBlockXBits())); + void* pImgBlock = VoidPtrInc(pImgBlockSliceStart, blk << addresser.GetBlockBits()); + void* pPix = VoidPtrInc(pImgBlock, rowXor ^ addresser.GetAddressX(x)); + if (ImgIsDest) + { + memcpy(pPix, VoidPtrInc(pBuf, x * PixBytes), PixBytes * ExpandX); + } + else + { + memcpy(VoidPtrInc(pBuf, x * PixBytes), pPix, PixBytes * ExpandX); + } + } + } + // Unaligned end (or the whole thing when ExpandX == 1) + for (; x < xEnd; x++) + { + // Get the index of the block within the slice + UINT_32 blk = (yBlk + (x >> addresser.GetBlockXBits())); + // Apply that index to get the base address of the current block. + void* pImgBlock = VoidPtrInc(pImgBlockSliceStart, blk << addresser.GetBlockBits()); + // Grab the x-xor and XOR it all together, adding to get the final address + void* pPix = VoidPtrInc(pImgBlock, rowXor ^ addresser.GetAddressX(x)); + if (ImgIsDest) + { + memcpy(pPix, VoidPtrInc(pBuf, x * PixBytes), PixBytes); + } + else + { + memcpy(VoidPtrInc(pBuf, x * PixBytes), pPix, PixBytes); + } + } + + pBuf = VoidPtrInc(pBuf, bufStrideY); + } +} + +/** +**************************************************************************************************** +* LutAddresser::GetCopyMemImgFunc +* +* @brief +* Determines and returns which copy function to use for copying to images +**************************************************************************************************** +*/ +UnalignedCopyMemImgFunc LutAddresser::GetCopyMemImgFunc() const +{ + // While these are all the same function, the codegen gets really bad if the size of each pixel + // is not known at compile time. Hence, templates. + const UnalignedCopyMemImgFunc Funcs[MaxElementBytesLog2][3] = + { + // ExpandX = 1, 2, 4 + { Copy2DSliceUnaligned<0, 1, true>, Copy2DSliceUnaligned<0, 2, true>, Copy2DSliceUnaligned<0, 4, true> }, // 1BPE + { Copy2DSliceUnaligned<1, 1, true>, Copy2DSliceUnaligned<1, 2, true>, Copy2DSliceUnaligned<1, 4, true> }, // 2BPE + { Copy2DSliceUnaligned<2, 1, true>, Copy2DSliceUnaligned<2, 2, true>, Copy2DSliceUnaligned<2, 4, true> }, // 4BPE + { Copy2DSliceUnaligned<3, 1, true>, Copy2DSliceUnaligned<3, 2, true>, Copy2DSliceUnaligned<3, 4, true> }, // 8BPE + { Copy2DSliceUnaligned<4, 1, true>, Copy2DSliceUnaligned<4, 2, true>, Copy2DSliceUnaligned<4, 4, true> }, // 16BPE + }; + + UnalignedCopyMemImgFunc pfnRet = nullptr; + ADDR_ASSERT(m_bpeLog2 < MaxElementBytesLog2); + if (m_maxExpandX >= 4) + { + pfnRet = Funcs[m_bpeLog2][2]; + } + else if (m_maxExpandX >= 2) + { + pfnRet = Funcs[m_bpeLog2][1]; + } + else + { + pfnRet = Funcs[m_bpeLog2][0]; + } + return pfnRet; +} + +/** +**************************************************************************************************** +* LutAddresser::GetCopyImgMemFunc +* +* @brief +* Determines and returns which copy function to use for copying from images +**************************************************************************************************** +*/ +UnalignedCopyMemImgFunc LutAddresser::GetCopyImgMemFunc() const +{ + // While these are all the same function, the codegen gets really bad if the size of each pixel + // is not known at compile time. Hence, templates. + const UnalignedCopyMemImgFunc Funcs[MaxElementBytesLog2][3] = + { + // ExpandX = 1, 2, 4 + { Copy2DSliceUnaligned<0, 1, false>, Copy2DSliceUnaligned<0, 2, false>, Copy2DSliceUnaligned<0, 4, false> }, // 1BPE + { Copy2DSliceUnaligned<1, 1, false>, Copy2DSliceUnaligned<1, 2, false>, Copy2DSliceUnaligned<1, 4, false> }, // 2BPE + { Copy2DSliceUnaligned<2, 1, false>, Copy2DSliceUnaligned<2, 2, false>, Copy2DSliceUnaligned<2, 4, false> }, // 4BPE + { Copy2DSliceUnaligned<3, 1, false>, Copy2DSliceUnaligned<3, 2, false>, Copy2DSliceUnaligned<3, 4, false> }, // 8BPE + { Copy2DSliceUnaligned<4, 1, false>, Copy2DSliceUnaligned<4, 2, false>, Copy2DSliceUnaligned<4, 4, false> }, // 16BPE + }; + + UnalignedCopyMemImgFunc pfnRet = nullptr; + ADDR_ASSERT(m_bpeLog2 < MaxElementBytesLog2); + if (m_maxExpandX >= 4) + { + pfnRet = Funcs[m_bpeLog2][2]; + } + else if (m_maxExpandX >= 2) + { + pfnRet = Funcs[m_bpeLog2][1]; + } + else + { + pfnRet = Funcs[m_bpeLog2][0]; + } + return pfnRet; +} + +} diff --git a/src/amd/addrlib/src/core/addrswizzler.h b/src/amd/addrlib/src/core/addrswizzler.h new file mode 100644 index 00000000000..feace2761c1 --- /dev/null +++ b/src/amd/addrlib/src/core/addrswizzler.h @@ -0,0 +1,119 @@ +/* +************************************************************************************************************************ +* +* Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved. +* +***********************************************************************************************************************/ +/** +**************************************************************************************************** +* @file addrswizzler.cpp +* @brief Contains code for efficient CPU swizzling. +**************************************************************************************************** +*/ +#ifndef __ADDR_SWIZZLER_H__ +#define __ADDR_SWIZZLER_H__ + +#include "addrlib.h" +#include "addrcommon.h" + +namespace Addr +{ + +// Forward decl +class LutAddresser; + +typedef void (*UnalignedCopyMemImgFunc)( + void* pImgBlockSliceStart, // Block corresponding to beginning of slice + void* pBuf, // Pointer to data starting from the copy origin. + size_t bufStrideY, // Stride of each row in pBuf + UINT_32 imageBlocksY, // Width of the image slice, in blocks. + ADDR_COORD2D origin, // Absolute origin, in elements + ADDR_EXTENT2D extent, // Size to copy, in elements + UINT_32 sliceXor, // Includes pipeBankXor and z XOR + const LutAddresser& addresser); + +// This class calculates and holds up to four lookup tables (x/y/z/s) which can be used to cheaply calculate the +// position of a pixel within a block at the cost of some precomputation and memory usage. +// +// This works for all equations and does something like this: +// offset = blockAddr ^ XLut[x & xMask] ^ YLut[Y & ymask]... +class LutAddresser +{ +public: + constexpr static UINT_32 MaxLutSize = 2100; // Sized to fit the largest non-VAR LUT size + + LutAddresser(); + + void Init(const ADDR_BIT_SETTING* pEq, UINT_32 eqSize, ADDR_EXTENT3D blockSize, UINT_8 blkBits); + + // Does a full calculation to get the offset within a block. Takes an *absolute* coordinate, + // not the coordinate within the block. + UINT_32 GetBlockOffset( + UINT_32 x, + UINT_32 y, + UINT_32 z, + UINT_32 s = 0, + UINT_32 pipeBankXor = 0) + { + return GetAddressX(x) ^ GetAddressY(y) ^ GetAddressZ(z) ^ GetAddressS(s) ^ pipeBankXor; + } + + // Get the block size + UINT_32 GetBlockBits() const { return m_blockBits; } + UINT_32 GetBlockXBits() const { return Log2(m_blockSize.width); } + UINT_32 GetBlockYBits() const { return Log2(m_blockSize.height); } + UINT_32 GetBlockZBits() const { return Log2(m_blockSize.depth); } + + // "Fast single channel" functions to get the part that each channel contributes to be XORd together. + UINT_32 GetAddressX(UINT_32 x) const { return m_pXLut[x & m_xLutMask];} + UINT_32 GetAddressY(UINT_32 y) const { return m_pYLut[y & m_yLutMask];} + UINT_32 GetAddressZ(UINT_32 z) const { return m_pZLut[z & m_zLutMask];} + UINT_32 GetAddressS(UINT_32 s) const { return m_pSLut[s & m_sLutMask];} + + // Get a function that can copy a single 2D slice of an image with this swizzle. + UnalignedCopyMemImgFunc GetCopyMemImgFunc() const; + UnalignedCopyMemImgFunc GetCopyImgMemFunc() const; +private: + // Calculate general properties of the swizzle equations + void InitSwizzleProps(); + // Fills a LUT for each channel. + void InitLuts(); + // Evaluate coordinate without LUTs + UINT_32 EvalEquation(UINT_32 x, UINT_32 y, UINT_32 z, UINT_32 s); + + // Pointers within m_lutData corresponding to where each LUT starts + // m_lutData[0] always has a value of 0 and thus can be considered an empty 1-entry LUT for "don't care" channels + UINT_32* m_pXLut; + UINT_32* m_pYLut; + UINT_32* m_pZLut; + UINT_32* m_pSLut; + + // Size of each LUT, minus 1 to form a mask. A mask of 0 is valid for an empty LUT. + UINT_32 m_xLutMask; + UINT_32 m_yLutMask; + UINT_32 m_zLutMask; + UINT_32 m_sLutMask; + + // Number of bits in the block (aka Log2(blkSize)) + UINT_32 m_blockBits; + + // The block size + ADDR_EXTENT3D m_blockSize; + + // Number of 'x' bits at the bottom of the equation. Must be a pow2 and at least 1. + // This will be used as a simple optimization to batch together operations on adjacent x pixels. + UINT_32 m_maxExpandX; + + // BPE for this equation. + UINT_32 m_bpeLog2; + + // The full equation + ADDR_BIT_SETTING m_bit[ADDR_MAX_EQUATION_BIT]; + + // Backing store for the LUT tables. + UINT_32 m_lutData[MaxLutSize]; +}; + +} + +#endif // __ADDR_SWIZZLER_H__ \ No newline at end of file diff --git a/src/amd/addrlib/src/gfx10/gfx10SwizzlePattern.h b/src/amd/addrlib/src/gfx10/gfx10SwizzlePattern.h index 0b6b1e1cc19..92a7a710ff2 100644 --- a/src/amd/addrlib/src/gfx10/gfx10SwizzlePattern.h +++ b/src/amd/addrlib/src/gfx10/gfx10SwizzlePattern.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -3721,6 +3721,7 @@ const ADDR_SW_PATINFO GFX10_SW_VAR_Z_X_8xaa_RBPLUS_PATINFO[] = { 3, 27, 344, 365, 124, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 8xaa @ RbPlus }; + const UINT_64 GFX10_SW_PATTERN_NIBBLE01[][8] = { {X0, X1, X2, X3, Y0, Y1, Y2, Y3, }, // 0 diff --git a/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp b/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp index addc606375b..c59c67b4e67 100644 --- a/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp +++ b/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -15,6 +15,7 @@ #include "gfx10addrlib.h" #include "addrcommon.h" +#include "addrswizzler.h" #include "gfx10_gb_reg.h" #include "amdgpu_asic_addr.h" @@ -401,17 +402,14 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeDccInfo( else { const UINT_32 elemLog2 = Log2(pIn->bpp >> 3); + // only SW_*_R_X surfaces may be DCC compressed when attached to the CB + ADDR_ASSERT(IsRtOptSwizzle(pIn->swizzleMode)); - { - // only SW_*_R_X surfaces may be DCC compressed when attached to the CB - ADDR_ASSERT(IsRtOptSwizzle(pIn->swizzleMode)); + const BOOL_32 isThick = IsThick(pIn->resourceType, pIn->swizzleMode); - const BOOL_32 isThick = IsThick(pIn->resourceType, pIn->swizzleMode); - - pOut->compressBlkWidth = isThick ? Block256_3d[elemLog2].w : Block256_2d[elemLog2].w; - pOut->compressBlkHeight = isThick ? Block256_3d[elemLog2].h : Block256_2d[elemLog2].h; - pOut->compressBlkDepth = isThick ? Block256_3d[elemLog2].d : 1; - } + pOut->compressBlkWidth = isThick ? Block256_3d[elemLog2].w : Block256_2d[elemLog2].w; + pOut->compressBlkHeight = isThick ? Block256_3d[elemLog2].h : Block256_2d[elemLog2].h; + pOut->compressBlkDepth = isThick ? Block256_3d[elemLog2].d : 1; if (ret == ADDR_OK) { @@ -931,42 +929,40 @@ BOOL_32 Gfx10Lib::HwlInitGlobalParams( break; } + // Skip unaligned case + m_xmaskBaseIndex += MaxNumOfBppCMask; + m_htileBaseIndex += MaxNumOfAA; + + m_xmaskBaseIndex += m_pipesLog2 * MaxNumOfBppCMask; + m_htileBaseIndex += m_pipesLog2 * MaxNumOfAA; + m_colorBaseIndex += m_pipesLog2 * MaxNumOfBpp; + + if (m_settings.supportRbPlus) { - // Skip unaligned case - m_xmaskBaseIndex += MaxNumOfBppCMask; - m_htileBaseIndex += MaxNumOfAA; + m_numPkrLog2 = gbAddrConfig.bits.NUM_PKRS; + m_numSaLog2 = (m_numPkrLog2 > 0) ? (m_numPkrLog2 - 1) : 0; - m_xmaskBaseIndex += m_pipesLog2 * MaxNumOfBppCMask; - m_htileBaseIndex += m_pipesLog2 * MaxNumOfAA; - m_colorBaseIndex += m_pipesLog2 * MaxNumOfBpp; + ADDR_ASSERT((m_numPkrLog2 <= m_pipesLog2) && ((m_pipesLog2 - m_numPkrLog2) <= 2)); - if (m_settings.supportRbPlus) + ADDR_C_ASSERT(sizeof(GFX10_HTILE_RBPLUS_PATIDX) / sizeof(GFX10_HTILE_RBPLUS_PATIDX[0]) == + sizeof(GFX10_CMASK_64K_RBPLUS_PATIDX) / sizeof(GFX10_CMASK_64K_RBPLUS_PATIDX[0])); + + if (m_numPkrLog2 >= 2) { - m_numPkrLog2 = gbAddrConfig.bits.NUM_PKRS; - m_numSaLog2 = (m_numPkrLog2 > 0) ? (m_numPkrLog2 - 1) : 0; - - ADDR_ASSERT((m_numPkrLog2 <= m_pipesLog2) && ((m_pipesLog2 - m_numPkrLog2) <= 2)); - - ADDR_C_ASSERT(sizeof(GFX10_HTILE_RBPLUS_PATIDX) / sizeof(GFX10_HTILE_RBPLUS_PATIDX[0]) == - sizeof(GFX10_CMASK_64K_RBPLUS_PATIDX) / sizeof(GFX10_CMASK_64K_RBPLUS_PATIDX[0])); - - if (m_numPkrLog2 >= 2) - { - m_colorBaseIndex += (2 * m_numPkrLog2 - 2) * MaxNumOfBpp; - m_xmaskBaseIndex += (m_numPkrLog2 - 1) * 3 * MaxNumOfBppCMask; - m_htileBaseIndex += (m_numPkrLog2 - 1) * 3 * MaxNumOfAA; - } + m_colorBaseIndex += (2 * m_numPkrLog2 - 2) * MaxNumOfBpp; + m_xmaskBaseIndex += (m_numPkrLog2 - 1) * 3 * MaxNumOfBppCMask; + m_htileBaseIndex += (m_numPkrLog2 - 1) * 3 * MaxNumOfAA; } - else - { - const UINT_32 numPipeType = static_cast(ADDR_CONFIG_64_PIPE) - - static_cast(ADDR_CONFIG_1_PIPE) + - 1; + } + else + { + const UINT_32 numPipeType = static_cast(ADDR_CONFIG_64_PIPE) - + static_cast(ADDR_CONFIG_1_PIPE) + + 1; - ADDR_C_ASSERT(sizeof(GFX10_HTILE_PATIDX) / sizeof(GFX10_HTILE_PATIDX[0]) == (numPipeType + 1) * MaxNumOfAA); - ADDR_C_ASSERT(sizeof(GFX10_CMASK_64K_PATIDX) / sizeof(GFX10_CMASK_64K_PATIDX[0]) == - (numPipeType + 1) * MaxNumOfBppCMask); - } + ADDR_C_ASSERT(sizeof(GFX10_HTILE_PATIDX) / sizeof(GFX10_HTILE_PATIDX[0]) == (numPipeType + 1) * MaxNumOfAA); + ADDR_C_ASSERT(sizeof(GFX10_CMASK_64K_PATIDX) / sizeof(GFX10_CMASK_64K_PATIDX[0]) == + (numPipeType + 1) * MaxNumOfBppCMask); } if (m_settings.supportRbPlus) @@ -1057,6 +1053,7 @@ ChipFamily Gfx10Lib::HwlConvertChipFamily( { ADDR_ASSERT(!"Unknown chip revision"); } + break; case FAMILY_RMB: if (ASICREV_IS_REMBRANDT(chipRevision)) @@ -1068,6 +1065,7 @@ ChipFamily Gfx10Lib::HwlConvertChipFamily( { ADDR_ASSERT(!"Unknown chip revision"); } + break; case FAMILY_RPL: if (ASICREV_IS_RAPHAEL(chipRevision)) @@ -1304,124 +1302,122 @@ UINT_32 Gfx10Lib::GetMetaBlkSize( { INT_32 metablkSizeLog2; - { - const INT_32 metaElemSizeLog2 = GetMetaElementSizeLog2(dataType); - const INT_32 metaCacheSizeLog2 = GetMetaCacheSizeLog2(dataType); - const INT_32 compBlkSizeLog2 = (dataType == Gfx10DataColor) ? 8 : 6 + numSamplesLog2 + elemLog2; - const INT_32 metaBlkSamplesLog2 = (dataType == Gfx10DataDepthStencil) ? - numSamplesLog2 : Min(numSamplesLog2, m_maxCompFragLog2); - const INT_32 dataBlkSizeLog2 = GetBlockSizeLog2(swizzleMode); - INT_32 numPipesLog2 = m_pipesLog2; + const INT_32 metaElemSizeLog2 = GetMetaElementSizeLog2(dataType); + const INT_32 metaCacheSizeLog2 = GetMetaCacheSizeLog2(dataType); + const INT_32 compBlkSizeLog2 = (dataType == Gfx10DataColor) ? 8 : 6 + numSamplesLog2 + elemLog2; + const INT_32 metaBlkSamplesLog2 = (dataType == Gfx10DataDepthStencil) ? + numSamplesLog2 : Min(numSamplesLog2, m_maxCompFragLog2); + const INT_32 dataBlkSizeLog2 = GetBlockSizeLog2(swizzleMode); + INT_32 numPipesLog2 = m_pipesLog2; - if (IsThin(resourceType, swizzleMode)) + if (IsThin(resourceType, swizzleMode)) + { + if ((pipeAlign == FALSE) || + (IsStandardSwizzle(resourceType, swizzleMode) == TRUE) || + (IsDisplaySwizzle(resourceType, swizzleMode) == TRUE)) { - if ((pipeAlign == FALSE) || - (IsStandardSwizzle(resourceType, swizzleMode) == TRUE) || - (IsDisplaySwizzle(resourceType, swizzleMode) == TRUE)) + if (pipeAlign) { - if (pipeAlign) - { - metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); - metablkSizeLog2 = Min(metablkSizeLog2, dataBlkSizeLog2); - } - else - { - metablkSizeLog2 = Min(dataBlkSizeLog2, 12); - } + metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); + metablkSizeLog2 = Min(metablkSizeLog2, dataBlkSizeLog2); } else { - if (m_settings.supportRbPlus && (m_pipesLog2 == m_numSaLog2 + 1) && (m_pipesLog2 > 1)) - { - numPipesLog2++; - } - - INT_32 pipeRotateLog2 = GetPipeRotateAmount(resourceType, swizzleMode); - - if (numPipesLog2 >= 4) - { - INT_32 overlapLog2 = GetMetaOverlapLog2(dataType, resourceType, swizzleMode, elemLog2, numSamplesLog2); - - // In 16Bpe 8xaa, we have an extra overlap bit - if ((pipeRotateLog2 > 0) && - (elemLog2 == 4) && - (numSamplesLog2 == 3) && - (IsZOrderSwizzle(swizzleMode) || (GetEffectiveNumPipes() > 3))) - { - overlapLog2++; - } - - metablkSizeLog2 = metaCacheSizeLog2 + overlapLog2 + numPipesLog2; - metablkSizeLog2 = Max(metablkSizeLog2, static_cast(m_pipeInterleaveLog2) + numPipesLog2); - - if (m_settings.supportRbPlus && - IsRtOptSwizzle(swizzleMode) && - (numPipesLog2 == 6) && - (numSamplesLog2 == 3) && - (m_maxCompFragLog2 == 3) && - (metablkSizeLog2 < 15)) - { - metablkSizeLog2 = 15; - } - } - else - { - metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); - } - - if (dataType == Gfx10DataDepthStencil) - { - // For htile surfaces, pad meta block size to 2K * num_pipes - metablkSizeLog2 = Max(metablkSizeLog2, 11 + numPipesLog2); - } - - const INT_32 compFragLog2 = Min(m_maxCompFragLog2, numSamplesLog2); - - if (IsRtOptSwizzle(swizzleMode) && (compFragLog2 > 1) && (pipeRotateLog2 >= 1)) - { - const INT_32 tmp = 8 + m_pipesLog2 + Max(pipeRotateLog2, compFragLog2 - 1); - - metablkSizeLog2 = Max(metablkSizeLog2, tmp); - } + metablkSizeLog2 = Min(dataBlkSizeLog2, 12); } - - const INT_32 metablkBitsLog2 = - metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; - pBlock->w = 1 << ((metablkBitsLog2 >> 1) + (metablkBitsLog2 & 1)); - pBlock->h = 1 << (metablkBitsLog2 >> 1); - pBlock->d = 1; } else { - ADDR_ASSERT(IsThick(resourceType, swizzleMode)); - - if (pipeAlign) + if (m_settings.supportRbPlus && (m_pipesLog2 == m_numSaLog2 + 1) && (m_pipesLog2 > 1)) { - if (m_settings.supportRbPlus && - (m_pipesLog2 == m_numSaLog2 + 1) && - (m_pipesLog2 > 1) && - IsRbAligned(resourceType, swizzleMode)) - { - numPipesLog2++; - } + numPipesLog2++; + } - const INT_32 overlapLog2 = Get3DMetaOverlapLog2(resourceType, swizzleMode, elemLog2); + INT_32 pipeRotateLog2 = GetPipeRotateAmount(resourceType, swizzleMode); + + if (numPipesLog2 >= 4) + { + INT_32 overlapLog2 = GetMetaOverlapLog2(dataType, resourceType, swizzleMode, elemLog2, numSamplesLog2); + + // In 16Bpe 8xaa, we have an extra overlap bit + if ((pipeRotateLog2 > 0) && + (elemLog2 == 4) && + (numSamplesLog2 == 3) && + (IsZOrderSwizzle(swizzleMode) || (GetEffectiveNumPipes() > 3))) + { + overlapLog2++; + } metablkSizeLog2 = metaCacheSizeLog2 + overlapLog2 + numPipesLog2; metablkSizeLog2 = Max(metablkSizeLog2, static_cast(m_pipeInterleaveLog2) + numPipesLog2); - metablkSizeLog2 = Max(metablkSizeLog2, 12); + + if (m_settings.supportRbPlus && + IsRtOptSwizzle(swizzleMode) && + (numPipesLog2 == 6) && + (numSamplesLog2 == 3) && + (m_maxCompFragLog2 == 3) && + (metablkSizeLog2 < 15)) + { + metablkSizeLog2 = 15; + } } else { - metablkSizeLog2 = 12; + metablkSizeLog2 = Max(static_cast(m_pipeInterleaveLog2) + numPipesLog2, 12); } - const INT_32 metablkBitsLog2 = - metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; - pBlock->w = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 0) ? 1 : 0)); - pBlock->h = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 1) ? 1 : 0)); - pBlock->d = 1 << (metablkBitsLog2 / 3); + if (dataType == Gfx10DataDepthStencil) + { + // For htile surfaces, pad meta block size to 2K * num_pipes + metablkSizeLog2 = Max(metablkSizeLog2, 11 + numPipesLog2); + } + + const INT_32 compFragLog2 = Min(m_maxCompFragLog2, numSamplesLog2); + + if (IsRtOptSwizzle(swizzleMode) && (compFragLog2 > 1) && (pipeRotateLog2 >= 1)) + { + const INT_32 tmp = 8 + m_pipesLog2 + Max(pipeRotateLog2, compFragLog2 - 1); + + metablkSizeLog2 = Max(metablkSizeLog2, tmp); + } } + + const INT_32 metablkBitsLog2 = + metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; + pBlock->w = 1 << ((metablkBitsLog2 >> 1) + (metablkBitsLog2 & 1)); + pBlock->h = 1 << (metablkBitsLog2 >> 1); + pBlock->d = 1; + } + else + { + ADDR_ASSERT(IsThick(resourceType, swizzleMode)); + + if (pipeAlign) + { + if (m_settings.supportRbPlus && + (m_pipesLog2 == m_numSaLog2 + 1) && + (m_pipesLog2 > 1) && + IsRbAligned(resourceType, swizzleMode)) + { + numPipesLog2++; + } + + const INT_32 overlapLog2 = Get3DMetaOverlapLog2(resourceType, swizzleMode, elemLog2); + + metablkSizeLog2 = metaCacheSizeLog2 + overlapLog2 + numPipesLog2; + metablkSizeLog2 = Max(metablkSizeLog2, static_cast(m_pipeInterleaveLog2) + numPipesLog2); + metablkSizeLog2 = Max(metablkSizeLog2, 12); + } + else + { + metablkSizeLog2 = 12; + } + + const INT_32 metablkBitsLog2 = + metablkSizeLog2 + compBlkSizeLog2 - elemLog2 - metaBlkSamplesLog2 - metaElemSizeLog2; + pBlock->w = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 0) ? 1 : 0)); + pBlock->h = 1 << ((metablkBitsLog2 / 3) + (((metablkBitsLog2 % 3) > 1) ? 1 : 0)); + pBlock->d = 1 << (metablkBitsLog2 / 3); } return (1 << static_cast(metablkSizeLog2)); @@ -2243,7 +2239,7 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSlicePipeBankXor( if (pPatInfo != NULL) { - ADDR_BIT_SETTING fullSwizzlePattern[20]; + ADDR_BIT_SETTING fullSwizzlePattern[ADDR_MAX_EQUATION_BIT]; GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); const UINT_32 pipeBankXorOffset = @@ -2572,10 +2568,8 @@ BOOL_32 Gfx10Lib::ValidateSwModeParams( } else if (IsValidSwMode(pIn->swizzleMode) == FALSE) { - { - ADDR_ASSERT_ALWAYS(); - valid = FALSE; - } + ADDR_ASSERT_ALWAYS(); + valid = FALSE; } const ADDR2_SURFACE_FLAGS flags = pIn->flags; @@ -2632,10 +2626,8 @@ BOOL_32 Gfx10Lib::ValidateSwModeParams( { if ((swizzleMask & Gfx10Rsrc2dSwModeMask) == 0) { - { - ADDR_ASSERT_ALWAYS(); - valid = FALSE; - } + ADDR_ASSERT_ALWAYS(); + valid = FALSE; } else if ((prt && ((swizzleMask & Gfx10Rsrc2dPrtSwModeMask) == 0)) || (fmask && ((swizzleMask & Gfx10ZSwModeMask) == 0))) @@ -2701,10 +2693,8 @@ BOOL_32 Gfx10Lib::ValidateSwModeParams( } else { - { - ADDR_ASSERT_ALWAYS(); - valid = FALSE; - } + ADDR_ASSERT_ALWAYS(); + valid = FALSE; } // Block type check @@ -3224,7 +3214,7 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( } // Select the biggest allowed block type - minSizeBlk = Log2NonPow2(allowedBlockSet.value) + 1; + minSizeBlk = Log2(allowedBlockSet.value) + 1; if (minSizeBlk == static_cast(AddrBlockMaxTiledType)) { @@ -3364,7 +3354,7 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( // Determine swizzle mode now. Always select the "largest" swizzle mode for a given block type + // swizzle type combination. E.g, for AddrBlockThin64KB + ADDR_SW_S, select SW_64KB_S_X(25) if it's // available, or otherwise select SW_64KB_S_T(17) if it's available, or otherwise select SW_64KB_S(9). - pOut->swizzleMode = static_cast(Log2NonPow2(allowedSwModeSet.value)); + pOut->swizzleMode = static_cast(Log2(allowedSwModeSet.value)); } } else @@ -3385,6 +3375,245 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting( return returnCode; } +/** +************************************************************************************************************************ +* Gfx10Lib::HwlGetPossibleSwizzleModes +* +* @brief +* Returns a list of swizzle modes that are valid from the hardware's perspective for the client to choose from +* +* @return +* ADDR_E_RETURNCODE +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlGetPossibleSwizzleModes( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, ///< [in] input structure + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut ///< [out] output structure + ) const +{ + ADDR_E_RETURNCODE returnCode = ADDR_OK; + UINT_32 bpp = pIn->bpp; + UINT_32 width = Max(pIn->width, 1u); + UINT_32 height = Max(pIn->height, 1u); + + // Set format to INVALID will skip this conversion + if (pIn->format != ADDR_FMT_INVALID) + { + ElemMode elemMode = ADDR_UNCOMPRESSED; + UINT_32 expandX, expandY; + + // Get compression/expansion factors and element mode which indicates compression/expansion + bpp = GetElemLib()->GetBitsPerPixel(pIn->format, + &elemMode, + &expandX, + &expandY); + + UINT_32 basePitch = 0; + GetElemLib()->AdjustSurfaceInfo(elemMode, + expandX, + expandY, + &bpp, + &basePitch, + &width, + &height); + } + + const UINT_32 numSlices = Max(pIn->numSlices, 1u); + const UINT_32 numMipLevels = Max(pIn->numMipLevels, 1u); + const UINT_32 numSamples = Max(pIn->numSamples, 1u); + const BOOL_32 msaa = numSamples > 1; + + // Pre sanity check on non swizzle mode parameters + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {}; + localIn.flags = pIn->flags; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = bpp; + localIn.width = width; + localIn.height = height; + localIn.numSlices = numSlices; + localIn.numMipLevels = numMipLevels; + localIn.numSamples = numSamples; + localIn.numFrags = numSamples; + + if (ValidateNonSwModeParams(&localIn)) + { + // Forbid swizzle mode(s) by client setting + ADDR2_SWMODE_SET allowedSwModeSet = {}; + allowedSwModeSet.value |= pIn->forbiddenBlock.linear ? 0 : Gfx10LinearSwModeMask; + allowedSwModeSet.value |= pIn->forbiddenBlock.micro ? 0 : Gfx10Blk256BSwModeMask; + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThin4KB ? 0 : + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? 0 : Gfx10Blk4KBSwModeMask); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThick4KB ? 0 : + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThick4KBSwModeMask : 0); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThin64KB ? 0 : + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThin64KBSwModeMask : Gfx10Blk64KBSwModeMask); + allowedSwModeSet.value |= + pIn->forbiddenBlock.macroThick64KB ? 0 : + ((pIn->resourceType == ADDR_RSRC_TEX_3D) ? Gfx10Rsrc3dThick64KBSwModeMask : 0); + allowedSwModeSet.value |= + pIn->forbiddenBlock.var ? 0 : (m_blockVarSizeLog2 ? Gfx10BlkVarSwModeMask : 0); + + if (pIn->preferredSwSet.value != 0) + { + allowedSwModeSet.value &= pIn->preferredSwSet.sw_Z ? ~0 : ~Gfx10ZSwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_S ? ~0 : ~Gfx10StandardSwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_D ? ~0 : ~Gfx10DisplaySwModeMask; + allowedSwModeSet.value &= pIn->preferredSwSet.sw_R ? ~0 : ~Gfx10RenderSwModeMask; + } + + if (pIn->noXor) + { + allowedSwModeSet.value &= ~Gfx10XorSwModeMask; + } + + if (pIn->maxAlign > 0) + { + if (pIn->maxAlign < (1u << m_blockVarSizeLog2)) + { + allowedSwModeSet.value &= ~Gfx10BlkVarSwModeMask; + } + + if (pIn->maxAlign < Size64K) + { + allowedSwModeSet.value &= ~Gfx10Blk64KBSwModeMask; + } + + if (pIn->maxAlign < Size4K) + { + allowedSwModeSet.value &= ~Gfx10Blk4KBSwModeMask; + } + + if (pIn->maxAlign < Size256) + { + allowedSwModeSet.value &= ~Gfx10Blk256BSwModeMask; + } + } + + // Filter out invalid swizzle mode(s) by image attributes and HW restrictions + switch (pIn->resourceType) + { + case ADDR_RSRC_TEX_1D: + allowedSwModeSet.value &= Gfx10Rsrc1dSwModeMask; + break; + + case ADDR_RSRC_TEX_2D: + allowedSwModeSet.value &= pIn->flags.prt ? Gfx10Rsrc2dPrtSwModeMask : Gfx10Rsrc2dSwModeMask; + break; + + case ADDR_RSRC_TEX_3D: + allowedSwModeSet.value &= pIn->flags.prt ? Gfx10Rsrc3dPrtSwModeMask : Gfx10Rsrc3dSwModeMask; + + if (pIn->flags.view3dAs2dArray) + { + // SW_LINEAR can be used for 3D thin images, including BCn image format. + allowedSwModeSet.value &= Gfx10Rsrc3dViewAs2dSwModeMask; + } + break; + + default: + ADDR_ASSERT_ALWAYS(); + allowedSwModeSet.value = 0; + break; + } + + if (ElemLib::IsBlockCompressed(pIn->format) || + ElemLib::IsMacroPixelPacked(pIn->format) || + (bpp > 64) || + (msaa && ((bpp > 32) || pIn->flags.color || pIn->flags.unordered))) + { + allowedSwModeSet.value &= ~Gfx10ZSwModeMask; + } + + if (pIn->format == ADDR_FMT_32_32_32) + { + allowedSwModeSet.value &= Gfx10LinearSwModeMask; + } + + if (msaa) + { + allowedSwModeSet.value &= Gfx10MsaaSwModeMask; + } + + if (pIn->flags.depth || pIn->flags.stencil || pIn->flags.fmask) + { + allowedSwModeSet.value &= Gfx10ZSwModeMask; + } + + if (pIn->flags.display) + { + allowedSwModeSet.value &= GetValidDisplaySwizzleModes(bpp); + } + + if (pIn->flags.needEquation) + { + UINT_32 components = pIn->flags.allowExtEquation ? ADDR_MAX_EQUATION_COMP : + ADDR_MAX_LEGACY_EQUATION_COMP; + FilterInvalidEqSwizzleMode(allowedSwModeSet, pIn->resourceType, Log2(bpp >> 3), components); + } + + if (pIn->flags.requireMetadata) + { + // Linear images can never be compressed + allowedSwModeSet.value &= ~Gfx10LinearSwModeMask; + if (pIn->flags.color) + { + // 256B formats must not be pipe-aligned (can't use in CB) + allowedSwModeSet.value &= ~(Gfx10Blk256BSwModeMask); + // D/S formats must not be pipe-aligned + allowedSwModeSet.value &= ~(Gfx10DisplaySwModeMask | Gfx10StandardSwModeMask); + } + } + + if (allowedSwModeSet.value != 0) + { +#if DEBUG + // Post sanity check, at least AddrLib should accept the output generated by its own + UINT_32 validateSwModeSet = allowedSwModeSet.value; + + for (UINT_32 i = 0; validateSwModeSet != 0; i++) + { + if (validateSwModeSet & 1) + { + localIn.swizzleMode = static_cast(i); + ADDR_ASSERT(ValidateSwModeParams(&localIn)); + } + + validateSwModeSet >>= 1; + } +#endif + + pOut->resourceType = pIn->resourceType; + pOut->clientPreferredSwSet = pIn->preferredSwSet; + + if (pOut->clientPreferredSwSet.value == 0) + { + pOut->clientPreferredSwSet.value = AddrSwSetAll; + } + + pOut->validSwModeSet = allowedSwModeSet; + pOut->canXor = (allowedSwModeSet.value & Gfx10XorSwModeMask) ? TRUE : FALSE; + } + else + { + // Invalid combination... + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + } + else + { + // Invalid combination... + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + + return returnCode; +} + /** ************************************************************************************************************************ * Gfx10Lib::ComputeStereoInfo @@ -3877,6 +4106,244 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlComputeSurfaceAddrFromCoordTiled( return ret; } +/** +************************************************************************************************************************ +* Gfx10Lib::HwlCopyMemToSurface +* +* @brief +* Copy multiple regions from memory to a non-linear surface. +* +* @return +* Error or success. +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlCopyMemToSurface( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount + ) const +{ + // Copy memory to tiled surface. We will use the 'swizzler' object to dispatch to a version of the copy routine + // optimized for a particular micro-swizzle mode if available. + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR2_MIP_INFO mipInfo[MaxMipLevels] = {{0}}; + ADDR_ASSERT(pIn->numMipLevels <= MaxMipLevels); + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numSamples > 1) + { + // TODO: MSAA + returnCode = ADDR_NOTIMPLEMENTED; + } + if (IsBlockVariable(pIn->swizzleMode)) + { + // TODO: larger LUTs for worst-case var swizzle. + returnCode = ADDR_NOTIMPLEMENTED; + } + + localIn.size = sizeof(localIn); + localIn.flags = pIn->flags; + localIn.swizzleMode = pIn->swizzleMode; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unAlignedDims.width, 1u); + localIn.height = Max(pIn->unAlignedDims.height, 1u); + localIn.numSlices = Max(pIn->unAlignedDims.depth, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + + localOut.size = sizeof(localOut); + localOut.pMipInfo = mipInfo; + + if (returnCode == ADDR_OK) + { + returnCode = ComputeSurfaceInfo(&localIn, &localOut); + } + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(pIn->swizzleMode, + pIn->resourceType, + Log2(pIn->bpp >> 3), + pIn->numSamples); + + ADDR_BIT_SETTING fullSwizzlePattern[ADDR_MAX_EQUATION_BIT] = {}; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + ADDR_EXTENT3D blockExtent = { + localOut.blockWidth, + localOut.blockHeight, + localOut.blockSlices + }; + + LutAddresser addresser = LutAddresser(); + addresser.Init(fullSwizzlePattern, ADDR_MAX_EQUATION_BIT, blockExtent, blkSizeLog2); + UnalignedCopyMemImgFunc pfnCopyUnaligned = addresser.GetCopyMemImgFunc(); + if (pfnCopyUnaligned == nullptr) + { + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + for (UINT_32 regionIdx = 0; regionIdx < regionCount; regionIdx++) + { + const ADDR2_COPY_MEMSURFACE_REGION* pCurRegion = &pRegions[regionIdx]; + const ADDR2_MIP_INFO* pMipInfo = &mipInfo[pCurRegion->mipId]; + UINT_64 mipOffset = pIn->singleSubres ? 0 : pMipInfo->macroBlockOffset; + UINT_32 yBlks = pMipInfo->pitch / localOut.blockWidth; + + UINT_32 xStart = pCurRegion->x + pMipInfo->mipTailCoordX; + UINT_32 yStart = pCurRegion->y + pMipInfo->mipTailCoordY; + UINT_32 sliceStart = pCurRegion->slice + pMipInfo->mipTailCoordZ; + + for (UINT_32 slice = sliceStart; slice < (sliceStart + pCurRegion->copyDims.depth); slice++) + { + // The copy functions take the base address of the hardware slice, not the logical slice. Those are + // not the same thing in 3D swizzles. Logical slices within 3D swizzles are handled by sliceXor + // for unaligned copies. + UINT_32 sliceBlkStart = PowTwoAlignDown(slice, localOut.blockSlices); + UINT_32 sliceXor = pIn->pbXor ^ addresser.GetAddressZ(slice); + + UINT_64 memOffset = ((slice - pCurRegion->slice) * pCurRegion->memSlicePitch); + UINT_64 imgOffset = mipOffset + (sliceBlkStart * localOut.sliceSize); + + ADDR_COORD2D sliceOrigin = { xStart, yStart }; + ADDR_EXTENT2D sliceExtent = { pCurRegion->copyDims.width, pCurRegion->copyDims.height }; + + pfnCopyUnaligned(VoidPtrInc(pIn->pMappedSurface, imgOffset), + VoidPtrInc(pCurRegion->pMem, memOffset), + pCurRegion->memRowPitch, + yBlks, + sliceOrigin, + sliceExtent, + sliceXor, + addresser); + } + } + } + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx10Lib::HwlCopySurfaceToMem +* +* @brief +* Copy multiple regions from a non-linear surface to memory. +* +* @return +* Error or success. +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx10Lib::HwlCopySurfaceToMem( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount + ) const +{ + // Copy memory to tiled surface. We will use the 'swizzler' object to dispatch to a version of the copy routine + // optimized for a particular micro-swizzle mode if available. + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR2_MIP_INFO mipInfo[MaxMipLevels] = {{0}}; + ADDR_ASSERT(pIn->numMipLevels <= MaxMipLevels); + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numSamples > 1) + { + // TODO: MSAA + returnCode = ADDR_NOTIMPLEMENTED; + } + if (IsBlockVariable(pIn->swizzleMode)) + { + // TODO: larger LUTs for worst-case var swizzle. + returnCode = ADDR_NOTIMPLEMENTED; + } + + localIn.size = sizeof(localIn); + localIn.flags = pIn->flags; + localIn.swizzleMode = pIn->swizzleMode; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unAlignedDims.width, 1u); + localIn.height = Max(pIn->unAlignedDims.height, 1u); + localIn.numSlices = Max(pIn->unAlignedDims.depth, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + + localOut.size = sizeof(localOut); + localOut.pMipInfo = mipInfo; + + if (returnCode == ADDR_OK) + { + returnCode = ComputeSurfaceInfo(&localIn, &localOut); + } + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(pIn->swizzleMode, + pIn->resourceType, + Log2(pIn->bpp >> 3), + pIn->numSamples); + + ADDR_BIT_SETTING fullSwizzlePattern[ADDR_MAX_EQUATION_BIT] = {}; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + ADDR_EXTENT3D blockExtent = { + localOut.blockWidth, + localOut.blockHeight, + localOut.blockSlices + }; + + LutAddresser addresser = LutAddresser(); + addresser.Init(fullSwizzlePattern, ADDR_MAX_EQUATION_BIT, blockExtent, blkSizeLog2); + UnalignedCopyMemImgFunc pfnCopyUnaligned = addresser.GetCopyImgMemFunc(); + if (pfnCopyUnaligned == nullptr) + { + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + for (UINT_32 regionIdx = 0; regionIdx < regionCount; regionIdx++) + { + const ADDR2_COPY_MEMSURFACE_REGION* pCurRegion = &pRegions[regionIdx]; + const ADDR2_MIP_INFO* pMipInfo = &mipInfo[pCurRegion->mipId]; + UINT_64 mipOffset = pIn->singleSubres ? 0 : pMipInfo->macroBlockOffset; + UINT_32 yBlks = pMipInfo->pitch / localOut.blockWidth; + + UINT_32 xStart = pCurRegion->x + pMipInfo->mipTailCoordX; + UINT_32 yStart = pCurRegion->y + pMipInfo->mipTailCoordY; + UINT_32 sliceStart = pCurRegion->slice + pMipInfo->mipTailCoordZ; + + for (UINT_32 slice = sliceStart; slice < (sliceStart + pCurRegion->copyDims.depth); slice++) + { + // The copy functions take the base address of the hardware slice, not the logical slice. Those are + // not the same thing in 3D swizzles. Logical slices within 3D swizzles are handled by sliceXor + // for unaligned copies. + UINT_32 sliceBlkStart = PowTwoAlignDown(slice, localOut.blockSlices); + UINT_32 sliceXor = pIn->pbXor ^ addresser.GetAddressZ(slice); + + UINT_64 memOffset = ((slice - pCurRegion->slice) * pCurRegion->memSlicePitch); + UINT_64 imgOffset = mipOffset + (sliceBlkStart * localOut.sliceSize); + + ADDR_COORD2D sliceOrigin = { xStart, yStart }; + ADDR_EXTENT2D sliceExtent = { pCurRegion->copyDims.width, pCurRegion->copyDims.height }; + + pfnCopyUnaligned(VoidPtrInc(pIn->pMappedSurface, imgOffset), + VoidPtrInc(pCurRegion->pMem, memOffset), + pCurRegion->memRowPitch, + yBlks, + sliceOrigin, + sliceExtent, + sliceXor, + addresser); + } + } + } + return returnCode; +} + /** ************************************************************************************************************************ * Gfx10Lib::ComputeOffsetFromEquation @@ -3927,107 +4394,6 @@ UINT_32 Gfx10Lib::ComputeOffsetFromEquation( return offset; } -/** -************************************************************************************************************************ -* Gfx10Lib::ComputeOffsetFromSwizzlePattern -* -* @brief -* Compute offset from swizzle pattern -* -* @return -* Offset -************************************************************************************************************************ -*/ -UINT_32 Gfx10Lib::ComputeOffsetFromSwizzlePattern( - const UINT_64* pPattern, ///< Swizzle pattern - UINT_32 numBits, ///< Number of bits in pattern - UINT_32 x, ///< x coord in pixel - UINT_32 y, ///< y coord in pixel - UINT_32 z, ///< z coord in slice - UINT_32 s ///< sample id - ) const -{ - UINT_32 offset = 0; - const ADDR_BIT_SETTING* pSwizzlePattern = reinterpret_cast(pPattern); - - for (UINT_32 i = 0; i < numBits; i++) - { - UINT_32 v = 0; - - if (pSwizzlePattern[i].x != 0) - { - UINT_16 mask = pSwizzlePattern[i].x; - UINT_32 xBits = x; - - while (mask != 0) - { - if (mask & 1) - { - v ^= xBits & 1; - } - - xBits >>= 1; - mask >>= 1; - } - } - - if (pSwizzlePattern[i].y != 0) - { - UINT_16 mask = pSwizzlePattern[i].y; - UINT_32 yBits = y; - - while (mask != 0) - { - if (mask & 1) - { - v ^= yBits & 1; - } - - yBits >>= 1; - mask >>= 1; - } - } - - if (pSwizzlePattern[i].z != 0) - { - UINT_16 mask = pSwizzlePattern[i].z; - UINT_32 zBits = z; - - while (mask != 0) - { - if (mask & 1) - { - v ^= zBits & 1; - } - - zBits >>= 1; - mask >>= 1; - } - } - - if (pSwizzlePattern[i].s != 0) - { - UINT_16 mask = pSwizzlePattern[i].s; - UINT_32 sBits = s; - - while (mask != 0) - { - if (mask & 1) - { - v ^= sBits & 1; - } - - sBits >>= 1; - mask >>= 1; - } - } - - offset |= (v << i); - } - - return offset; -} - /** ************************************************************************************************************************ * Gfx10Lib::GetSwizzlePatternInfo @@ -4446,7 +4812,7 @@ ADDR_E_RETURNCODE Gfx10Lib::ComputeSurfaceAddrFromCoordMacroTiled( const UINT_32 xb = pIn->x / localOut.blockWidth; const UINT_64 blkIdx = yb * pb + xb; - ADDR_BIT_SETTING fullSwizzlePattern[20]; + ADDR_BIT_SETTING fullSwizzlePattern[ADDR_MAX_EQUATION_BIT]; GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); const UINT_32 blkOffset = diff --git a/src/amd/addrlib/src/gfx10/gfx10addrlib.h b/src/amd/addrlib/src/gfx10/gfx10addrlib.h index a8421e92ad1..19bbb1dc1d5 100644 --- a/src/amd/addrlib/src/gfx10/gfx10addrlib.h +++ b/src/amd/addrlib/src/gfx10/gfx10addrlib.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -41,8 +41,7 @@ struct Gfx10ChipSettings UINT_32 supportRbPlus : 1; UINT_32 dsMipmapHtileFix : 1; UINT_32 dccUnsup3DSwDis : 1; - UINT_32 : 4; - UINT_32 reserved2 : 24; + UINT_32 reserved2 : 28; }; }; @@ -142,7 +141,6 @@ const UINT_32 Gfx10Rsrc3dPrtSwModeMask = Gfx10Rsrc2dPrtSwModeMask & ~Gfx10Displa const UINT_32 Gfx10Rsrc3dThin64KBSwModeMask = (1u << ADDR_SW_64KB_Z_X) | (1u << ADDR_SW_64KB_R_X); - const UINT_32 Gfx10Rsrc3dThinSwModeMask = Gfx10Rsrc3dThin64KBSwModeMask | Gfx10BlkVarSwModeMask; @@ -155,8 +153,7 @@ const UINT_32 Gfx10Rsrc3dThick4KBSwModeMask = Gfx10Rsrc3dThickSwModeMask & Gfx10 const UINT_32 Gfx10Rsrc3dThick64KBSwModeMask = Gfx10Rsrc3dThickSwModeMask & Gfx10Blk64KBSwModeMask; const UINT_32 Gfx10MsaaSwModeMask = (Gfx10ZSwModeMask | - Gfx10RenderSwModeMask) - ; + Gfx10RenderSwModeMask); const UINT_32 Dcn20NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) | (1u << ADDR_SW_4KB_S) | @@ -299,6 +296,10 @@ protected: const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; + virtual ADDR_E_RETURNCODE HwlGetPossibleSwizzleModes( + const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn, + ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const; + virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck( const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const; @@ -313,6 +314,16 @@ protected: virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled( const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + + virtual ADDR_E_RETURNCODE HwlCopyMemToSurface( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const; + + virtual ADDR_E_RETURNCODE HwlCopySurfaceToMem( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const; virtual UINT_32 HwlComputeMaxBaseAlignments() const; @@ -342,14 +353,6 @@ private: const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; - UINT_32 ComputeOffsetFromSwizzlePattern( - const UINT_64* pPattern, - UINT_32 numBits, - UINT_32 x, - UINT_32 y, - UINT_32 z, - UINT_32 s) const; - UINT_32 ComputeOffsetFromEquation( const ADDR_EQUATION* pEq, UINT_32 x, @@ -393,7 +396,7 @@ private: */ VOID GetSwizzlePatternFromPatternInfo( const ADDR_SW_PATINFO* pPatInfo, - ADDR_BIT_SETTING (&pSwizzle)[20]) const + ADDR_BIT_SETTING (&pSwizzle)[ADDR_MAX_EQUATION_BIT]) const { memcpy(pSwizzle, GFX10_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx], diff --git a/src/amd/addrlib/src/gfx11/gfx11SwizzlePattern.h b/src/amd/addrlib/src/gfx11/gfx11SwizzlePattern.h index e8adff6ac42..cd72f17f57f 100644 --- a/src/amd/addrlib/src/gfx11/gfx11SwizzlePattern.h +++ b/src/amd/addrlib/src/gfx11/gfx11SwizzlePattern.h @@ -23,1740 +23,1740 @@ namespace V2 { const ADDR_SW_PATINFO GFX11_SW_256_D_PATINFO[] = { - { 1, 0, 0, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256_D - { 1, 0, 0, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256_D - { 1, 1, 0, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256_D - { 1, 2, 0, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256_D - { 1, 3, 0, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256_D - { 1, 4, 0, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256_D + { 1, 0, 0, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256_D @ Navi3x + { 1, 0, 0, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256_D @ Navi3x + { 1, 1, 0, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256_D @ Navi3x + { 1, 2, 0, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256_D @ Navi3x + { 1, 3, 0, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256_D @ Navi3x + { 1, 4, 0, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256_D @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_4K_D_PATINFO[] = { - { 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_D - { 1, 0, 1, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_D - { 1, 1, 2, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_D - { 1, 2, 3, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_D - { 1, 3, 4, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_D - { 1, 4, 5, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D + { 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_D @ Navi3x + { 1, 0, 1, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_D @ Navi3x + { 1, 1, 2, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_D @ Navi3x + { 1, 2, 3, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_D @ Navi3x + { 1, 3, 4, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_D @ Navi3x + { 1, 4, 5, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_4K_D_X_PATINFO[] = { - { 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D_X - { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D_X - { 1, 2, 3, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_D_X - { 1, 3, 4, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_D_X - { 1, 4, 5, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 6, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 7, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 8, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 9, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 10, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 11, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 12, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 13, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 14, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 15, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 16, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 17, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 18, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 19, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 20, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 21, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 22, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 23, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 24, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 25, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 26, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 27, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 28, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 29, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 30, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 31, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 32, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 33, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 34, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 35, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 36, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 37, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 38, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 39, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 40, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 41, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 42, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 43, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 44, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 45, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 46, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 47, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 48, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 49, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 50, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 51, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 52, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 53, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 54, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 55, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 56, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 57, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 58, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 59, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 60, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 61, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 62, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 63, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 64, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 65, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 51, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 52, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 53, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 54, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 55, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_D_X - { 3, 0, 56, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_D_X - { 3, 1, 57, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_D_X - { 3, 2, 58, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_D_X - { 3, 3, 59, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_D_X - { 3, 4, 60, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D_X + { 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 1, 2, 3, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 1, 3, 4, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 1, 4, 5, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 6, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 7, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 8, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 9, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 10, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 11, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 12, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 13, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 14, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 15, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 16, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 17, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 18, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 19, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 20, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 21, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 22, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 23, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 24, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 25, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 26, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 27, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 28, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 29, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 30, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 31, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 32, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 33, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 34, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 35, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 36, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 37, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 38, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 39, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 40, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 41, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 42, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 43, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 44, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 45, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 46, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 47, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 48, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 49, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 50, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 51, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 52, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 53, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 54, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 55, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 56, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 57, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 58, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 59, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 60, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 61, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 62, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 63, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 64, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 65, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 51, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 52, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 53, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 54, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 55, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x + { 3, 0, 56, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_D_X @ Navi3x + { 3, 1, 57, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_D_X @ Navi3x + { 3, 2, 58, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_D_X @ Navi3x + { 3, 3, 59, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_D_X @ Navi3x + { 3, 4, 60, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D_X @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_D_PATINFO[] = { - { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D - { 1, 0, 1, 1, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D - { 1, 1, 2, 2, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D - { 1, 2, 3, 3, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D - { 1, 3, 4, 4, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D - { 1, 4, 5, 5, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D + { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D @ Navi3x + { 1, 0, 1, 1, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D @ Navi3x + { 1, 1, 2, 2, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D @ Navi3x + { 1, 2, 3, 3, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D @ Navi3x + { 1, 3, 4, 4, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D @ Navi3x + { 1, 4, 5, 5, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_D_X_PATINFO[] = { - { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_X - { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_X - { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D_X - { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D_X - { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 6, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 7, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 8, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 9, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 10, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 11, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 12, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 13, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 14, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 15, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 16, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 17, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 18, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 19, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 20, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 21, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 22, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 23, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 24, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 25, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 26, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 27, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 28, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 29, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 30, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 31, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 32, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 33, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 34, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 35, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 36, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 37, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 38, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 39, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 40, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 41, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 42, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 43, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 44, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 45, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 66, 6, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 67, 7, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 68, 8, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 69, 9, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 70, 10, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 51, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 52, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 53, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 54, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 55, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 71, 6, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 72, 7, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 73, 8, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 74, 9, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 75, 10, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 76, 11, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 77, 12, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 78, 13, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 79, 14, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 80, 15, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 81, 6, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 82, 7, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 83, 8, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 84, 9, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 85, 10, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D_X - { 3, 0, 86, 11, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D_X - { 3, 1, 87, 12, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D_X - { 3, 2, 88, 13, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D_X - { 3, 3, 89, 14, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D_X - { 3, 4, 90, 15, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_X + { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 6, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 7, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 8, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 9, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 10, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 11, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 12, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 13, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 14, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 15, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 16, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 17, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 18, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 19, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 20, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 21, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 22, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 23, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 24, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 25, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 26, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 27, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 28, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 29, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 30, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 31, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 32, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 33, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 34, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 35, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 36, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 37, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 38, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 39, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 40, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 41, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 42, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 43, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 44, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 45, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 66, 6, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 67, 7, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 68, 8, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 69, 9, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 70, 10, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 51, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 52, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 53, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 54, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 55, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 71, 6, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 72, 7, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 73, 8, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 74, 9, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 75, 10, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 76, 11, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 77, 12, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 78, 13, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 79, 14, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 80, 15, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 81, 6, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 82, 7, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 83, 8, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 84, 9, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 85, 10, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x + { 3, 0, 86, 11, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D_X @ Navi3x + { 3, 1, 87, 12, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D_X @ Navi3x + { 3, 2, 88, 13, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D_X @ Navi3x + { 3, 3, 89, 14, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D_X @ Navi3x + { 3, 4, 90, 15, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_X @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_D_T_PATINFO[] = { - { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_T - { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_T - { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D_T - { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D_T - { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 91, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 92, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 93, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 94, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 95, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 96, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 97, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 98, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 99, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 100, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 101, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 102, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 103, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 104, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 105, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 96, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 97, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 98, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 99, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 100, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 101, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 102, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 103, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 104, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 105, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 106, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 107, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 108, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 109, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 110, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 101, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 102, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 103, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 104, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 105, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 106, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 107, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 108, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 109, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 110, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 111, 16, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 112, 17, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 113, 18, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 114, 19, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 115, 20, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 106, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 107, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 108, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 109, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 110, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 111, 16, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 112, 17, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 113, 18, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 114, 19, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 115, 20, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 1, 21, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 2, 22, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 3, 23, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 4, 24, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 5, 25, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 111, 16, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 112, 17, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 113, 18, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 114, 19, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 115, 20, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D_T - { 2, 0, 1, 21, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D_T - { 2, 1, 2, 22, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D_T - { 2, 2, 3, 23, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D_T - { 2, 3, 4, 24, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D_T - { 2, 4, 5, 25, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_T + { 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 1, 2, 3, 3, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 1, 3, 4, 4, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 1, 4, 5, 5, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 91, 1, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 92, 2, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 93, 3, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 94, 4, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 95, 5, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 96, 1, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 97, 2, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 98, 3, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 99, 4, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 100, 5, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 101, 1, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 102, 2, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 103, 3, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 104, 4, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 105, 5, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 96, 1, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 97, 2, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 98, 3, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 99, 4, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 100, 5, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 101, 1, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 102, 2, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 103, 3, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 104, 4, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 105, 5, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 106, 1, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 107, 2, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 108, 3, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 109, 4, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 110, 5, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 101, 1, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 102, 2, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 103, 3, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 104, 4, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 105, 5, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 106, 1, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 107, 2, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 108, 3, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 109, 4, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 110, 5, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 111, 16, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 112, 17, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 113, 18, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 114, 19, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 115, 20, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 106, 1, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 107, 2, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 108, 3, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 109, 4, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 110, 5, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 111, 16, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 112, 17, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 113, 18, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 114, 19, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 115, 20, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 1, 21, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 2, 22, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 3, 23, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 4, 24, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 5, 25, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 111, 16, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 112, 17, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 113, 18, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 114, 19, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 115, 20, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x + { 2, 0, 1, 21, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D_T @ Navi3x + { 2, 1, 2, 22, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D_T @ Navi3x + { 2, 2, 3, 23, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D_T @ Navi3x + { 2, 3, 4, 24, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D_T @ Navi3x + { 2, 4, 5, 25, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_T @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_256K_D_X_PATINFO[] = { - { 1, 0, 1, 1, 1, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_D_X - { 1, 1, 2, 2, 2, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_D_X - { 1, 2, 3, 3, 3, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_D_X - { 1, 3, 4, 4, 4, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_D_X - { 1, 4, 5, 5, 5, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 6, 1, 1, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 7, 2, 2, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 8, 3, 3, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 9, 4, 4, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 10, 5, 5, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 11, 1, 1, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 12, 2, 2, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 13, 3, 3, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 14, 4, 4, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 15, 5, 5, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 16, 1, 1, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 17, 2, 2, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 18, 3, 3, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 19, 4, 4, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 20, 5, 5, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 21, 1, 1, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 22, 2, 2, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 23, 3, 3, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 24, 4, 4, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 25, 5, 5, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 26, 1, 1, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 27, 2, 2, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 28, 3, 3, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 29, 4, 4, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 30, 5, 5, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 31, 1, 1, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 32, 2, 2, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 33, 3, 3, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 34, 4, 4, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 35, 5, 5, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 36, 1, 1, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 37, 2, 2, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 38, 3, 3, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 39, 4, 4, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 40, 5, 5, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 41, 1, 1, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 42, 2, 2, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 43, 3, 3, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 44, 4, 4, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 45, 5, 5, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 66, 6, 1, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 67, 7, 2, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 68, 8, 3, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 69, 9, 4, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 70, 10, 5, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 51, 1, 1, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 52, 2, 2, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 53, 3, 3, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 54, 4, 4, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 55, 5, 5, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 71, 6, 1, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 72, 7, 2, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 73, 8, 3, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 74, 9, 4, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 75, 10, 5, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 76, 11, 1, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 77, 12, 2, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 78, 13, 3, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 79, 14, 4, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 80, 15, 5, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 81, 6, 1, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 82, 7, 2, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 83, 8, 3, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 84, 9, 4, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 85, 10, 5, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_D_X - { 3, 0, 86, 11, 1, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_D_X - { 3, 1, 87, 12, 2, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_D_X - { 3, 2, 88, 13, 3, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_D_X - { 3, 3, 89, 14, 4, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_D_X - { 3, 4, 90, 15, 5, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_D_X + { 1, 0, 1, 1, 1, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 1, 1, 2, 2, 2, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 1, 2, 3, 3, 3, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 1, 3, 4, 4, 4, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 1, 4, 5, 5, 5, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 6, 1, 1, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 7, 2, 2, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 8, 3, 3, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 9, 4, 4, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 10, 5, 5, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 11, 1, 1, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 12, 2, 2, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 13, 3, 3, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 14, 4, 4, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 15, 5, 5, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 16, 1, 1, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 17, 2, 2, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 18, 3, 3, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 19, 4, 4, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 20, 5, 5, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 21, 1, 1, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 22, 2, 2, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 23, 3, 3, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 24, 4, 4, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 25, 5, 5, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 26, 1, 1, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 27, 2, 2, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 28, 3, 3, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 29, 4, 4, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 30, 5, 5, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 31, 1, 1, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 32, 2, 2, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 33, 3, 3, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 34, 4, 4, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 35, 5, 5, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 36, 1, 1, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 37, 2, 2, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 38, 3, 3, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 39, 4, 4, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 40, 5, 5, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 41, 1, 1, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 42, 2, 2, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 43, 3, 3, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 44, 4, 4, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 45, 5, 5, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 66, 6, 1, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 67, 7, 2, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 68, 8, 3, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 69, 9, 4, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 70, 10, 5, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 51, 1, 1, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 52, 2, 2, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 53, 3, 3, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 54, 4, 4, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 55, 5, 5, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 71, 6, 1, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 72, 7, 2, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 73, 8, 3, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 74, 9, 4, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 75, 10, 5, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 76, 11, 1, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 77, 12, 2, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 78, 13, 3, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 79, 14, 4, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 80, 15, 5, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 81, 6, 1, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 82, 7, 2, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 83, 8, 3, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 84, 9, 4, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 85, 10, 5, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x + { 3, 0, 86, 11, 1, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_D_X @ Navi3x + { 3, 1, 87, 12, 2, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_D_X @ Navi3x + { 3, 2, 88, 13, 3, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_D_X @ Navi3x + { 3, 3, 89, 14, 4, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_D_X @ Navi3x + { 3, 4, 90, 15, 5, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_D_X @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_ZR_X_1xaa_PATINFO[] = { - { 2, 0, 116, 26, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 2, 1, 117, 22, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 2, 2, 118, 27, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 2, 3, 119, 28, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 2, 4, 120, 29, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 121, 30, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 122, 31, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 123, 32, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 124, 33, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 125, 34, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 126, 35, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 127, 36, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 128, 37, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 129, 38, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 130, 39, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 131, 40, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 132, 41, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 133, 42, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 134, 43, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 135, 44, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 136, 45, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 137, 46, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 138, 47, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 139, 48, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 140, 49, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 141, 40, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 142, 50, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 143, 51, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 144, 52, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 145, 53, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 146, 54, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 146, 55, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 146, 56, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 146, 57, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 146, 58, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 147, 59, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 148, 60, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 149, 61, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 150, 62, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 151, 63, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 152, 54, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 152, 64, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 152, 56, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 153, 57, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 153, 65, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 152, 66, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 152, 67, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 152, 68, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 153, 69, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 153, 70, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 154, 71, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 154, 72, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 154, 73, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 155, 74, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 156, 75, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 154, 76, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 154, 77, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 154, 78, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 155, 79, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 156, 80, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 154, 81, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 154, 82, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 154, 83, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 155, 84, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 156, 85, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 157, 86, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 157, 87, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 157, 88, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 158, 89, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 159, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 0, 157, 91, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 1, 157, 92, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 2, 157, 93, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 3, 158, 94, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa - { 3, 4, 159, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa + { 2, 0, 116, 26, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 2, 1, 117, 22, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 2, 2, 118, 27, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 2, 3, 119, 28, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 2, 4, 120, 29, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 121, 30, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 122, 31, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 123, 32, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 124, 33, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 125, 34, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 126, 35, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 127, 36, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 128, 37, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 129, 38, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 130, 39, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 131, 40, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 132, 41, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 133, 42, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 134, 43, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 135, 44, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 136, 45, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 137, 46, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 138, 47, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 139, 48, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 140, 49, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 141, 40, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 142, 50, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 143, 51, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 144, 52, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 145, 53, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 146, 54, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 146, 55, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 146, 56, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 146, 57, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 146, 58, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 147, 59, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 148, 60, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 149, 61, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 150, 62, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 151, 63, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 152, 54, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 152, 64, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 152, 56, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 153, 57, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 153, 65, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 152, 66, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 152, 67, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 152, 68, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 153, 69, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 153, 70, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 154, 71, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 154, 72, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 154, 73, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 155, 74, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 156, 75, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 154, 76, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 154, 77, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 154, 78, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 155, 79, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 156, 80, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 154, 81, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 154, 82, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 154, 83, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 155, 84, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 156, 85, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 157, 86, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 157, 87, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 157, 88, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 158, 89, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 159, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 157, 91, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 157, 92, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 157, 93, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 158, 94, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 159, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 1xaa @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_ZR_X_2xaa_PATINFO[] = { - { 2, 5, 160, 96, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 2, 6, 118, 27, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 2, 7, 161, 97, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 2, 8, 119, 98, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 2, 9, 162, 99, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 163, 100, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 123, 32, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 123, 101, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 164, 102, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 125, 103, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 127, 104, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 128, 37, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 128, 105, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 165, 106, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 130, 107, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 132, 108, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 133, 51, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 133, 109, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 135, 110, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 135, 111, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 137, 112, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 138, 47, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 138, 113, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 139, 114, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 140, 115, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 142, 108, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 143, 51, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 143, 109, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 144, 116, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 145, 111, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 146, 117, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 146, 118, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 146, 119, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 166, 120, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 167, 121, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 148, 122, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 149, 61, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 149, 123, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 151, 124, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 168, 125, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 152, 55, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 152, 56, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 152, 126, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 153, 127, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 169, 127, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 152, 77, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 152, 78, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 152, 128, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 153, 80, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 169, 80, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 154, 72, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 154, 73, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 154, 129, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 156, 130, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 170, 130, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 154, 77, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 154, 78, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 154, 128, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 156, 131, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 170, 131, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 154, 132, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 154, 83, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 154, 133, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 156, 134, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 170, 134, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 157, 135, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 157, 88, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 157, 136, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 159, 90, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 171, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 5, 157, 137, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 6, 157, 93, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 7, 157, 138, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 8, 159, 95, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa - { 3, 9, 171, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa + { 2, 5, 160, 96, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 2, 6, 118, 27, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 2, 7, 161, 97, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 2, 8, 119, 98, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 2, 9, 162, 99, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 163, 100, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 123, 32, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 123, 101, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 164, 102, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 125, 103, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 127, 104, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 128, 37, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 128, 105, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 165, 106, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 130, 107, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 132, 108, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 133, 51, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 133, 109, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 135, 110, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 135, 111, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 137, 112, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 138, 47, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 138, 113, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 139, 114, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 140, 115, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 142, 108, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 143, 51, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 143, 109, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 144, 116, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 145, 111, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 146, 117, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 146, 118, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 146, 119, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 166, 120, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 167, 121, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 148, 122, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 149, 61, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 149, 123, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 151, 124, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 168, 125, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 152, 55, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 152, 56, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 152, 126, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 153, 127, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 169, 127, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 152, 77, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 152, 78, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 152, 128, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 153, 80, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 169, 80, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 154, 72, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 154, 73, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 154, 129, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 156, 130, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 170, 130, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 154, 77, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 154, 78, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 154, 128, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 156, 131, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 170, 131, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 154, 132, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 154, 83, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 154, 133, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 156, 134, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 170, 134, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 157, 135, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 157, 88, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 157, 136, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 159, 90, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 171, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 157, 137, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 157, 93, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 157, 138, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 159, 95, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 171, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 2xaa @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_ZR_X_4xaa_PATINFO[] = { - { 2, 10, 118, 27, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 2, 11, 118, 139, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 2, 12, 118, 140, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 2, 13, 119, 141, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 2, 14, 120, 142, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 123, 32, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 172, 143, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 123, 144, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 124, 145, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 125, 146, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 128, 37, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 128, 147, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 128, 148, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 129, 149, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 130, 150, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 133, 42, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 133, 151, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 133, 152, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 134, 153, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 173, 154, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 138, 47, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 138, 155, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 138, 156, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 174, 157, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 175, 158, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 143, 51, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 143, 159, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 143, 160, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 145, 161, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 176, 162, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 146, 56, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 146, 163, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 146, 164, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 167, 165, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 177, 166, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 149, 61, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 149, 167, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 149, 168, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 178, 169, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 179, 170, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 152, 56, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 152, 163, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 152, 171, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 180, 171, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 181, 171, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 152, 68, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 152, 172, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 152, 173, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 180, 173, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 181, 173, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 154, 73, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 154, 174, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 154, 130, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 182, 130, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 183, 130, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 154, 78, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 154, 172, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 154, 131, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 182, 131, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 183, 131, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 154, 83, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 154, 133, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 154, 134, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 182, 134, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 183, 134, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 157, 88, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 157, 175, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 157, 90, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 184, 90, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 185, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 10, 157, 93, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 11, 157, 176, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 12, 157, 95, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 13, 184, 95, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa - { 3, 14, 185, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa + { 2, 10, 118, 27, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 2, 11, 118, 139, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 2, 12, 118, 140, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 2, 13, 119, 141, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 2, 14, 120, 142, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 123, 32, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 172, 143, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 123, 144, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 124, 145, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 125, 146, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 128, 37, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 128, 147, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 128, 148, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 129, 149, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 130, 150, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 133, 42, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 133, 151, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 133, 152, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 134, 153, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 173, 154, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 138, 47, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 138, 155, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 138, 156, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 174, 157, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 175, 158, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 143, 51, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 143, 159, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 143, 160, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 145, 161, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 176, 162, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 146, 56, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 146, 163, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 146, 164, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 167, 165, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 177, 166, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 149, 61, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 149, 167, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 149, 168, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 178, 169, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 179, 170, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 152, 56, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 152, 163, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 152, 171, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 180, 171, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 181, 171, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 152, 68, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 152, 172, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 152, 173, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 180, 173, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 181, 173, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 154, 73, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 154, 174, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 154, 130, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 182, 130, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 183, 130, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 154, 78, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 154, 172, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 154, 131, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 182, 131, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 183, 131, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 154, 83, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 154, 133, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 154, 134, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 182, 134, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 183, 134, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 157, 88, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 157, 175, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 157, 90, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 184, 90, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 185, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 157, 93, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 157, 176, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 157, 95, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 184, 95, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 185, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 4xaa @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_ZR_X_8xaa_PATINFO[] = { - { 2, 15, 161, 97, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 2, 16, 118, 140, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 186, 177, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 187, 178, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 162, 179, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 123, 101, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 123, 144, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 188, 180, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 189, 181, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 190, 182, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 128, 105, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 128, 148, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 128, 183, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 165, 184, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 191, 185, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 133, 109, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 133, 186, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 133, 187, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 192, 188, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 193, 189, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 138, 113, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 138, 156, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 138, 190, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 194, 191, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 195, 192, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 143, 109, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 143, 160, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 143, 187, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 196, 193, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 197, 194, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 146, 126, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 146, 164, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 198, 195, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 199, 196, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 200, 197, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 149, 123, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 149, 168, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 149, 198, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 179, 170, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 201, 170, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 152, 126, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 152, 171, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 202, 199, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 181, 171, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 203, 171, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 152, 128, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 152, 173, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 202, 200, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 181, 173, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 203, 201, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 154, 129, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 154, 130, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 204, 202, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 183, 130, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 205, 130, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 154, 128, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 154, 131, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 206, 203, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 183, 131, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 205, 131, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 154, 133, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 154, 134, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 206, 204, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 183, 134, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 205, 134, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 157, 136, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 157, 90, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 207, 205, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 185, 90, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 208, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 15, 157, 138, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 16, 157, 95, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 17, 171, 95, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 18, 185, 95, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa - { 3, 19, 208, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa + { 2, 15, 161, 97, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 2, 16, 118, 140, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 186, 177, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 187, 178, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 162, 179, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 123, 101, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 123, 144, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 188, 180, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 189, 181, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 190, 182, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 128, 105, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 128, 148, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 128, 183, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 165, 184, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 191, 185, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 133, 109, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 133, 186, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 133, 187, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 192, 188, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 193, 189, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 138, 113, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 138, 156, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 138, 190, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 194, 191, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 195, 192, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 143, 109, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 143, 160, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 143, 187, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 196, 193, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 197, 194, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 146, 126, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 146, 164, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 198, 195, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 199, 196, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 200, 197, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 149, 123, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 149, 168, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 149, 198, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 179, 170, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 201, 170, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 152, 126, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 152, 171, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 202, 199, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 181, 171, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 203, 171, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 152, 128, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 152, 173, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 202, 200, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 181, 173, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 203, 201, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 154, 129, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 154, 130, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 204, 202, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 183, 130, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 205, 130, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 154, 128, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 154, 131, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 206, 203, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 183, 131, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 205, 131, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 154, 133, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 154, 134, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 206, 204, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 183, 134, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 205, 134, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 157, 136, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 157, 90, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 207, 205, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 185, 90, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 208, 90, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 157, 138, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 157, 95, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 171, 95, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 185, 95, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 208, 95, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_{Z,R}_X 8xaa @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_256K_ZR_X_1xaa_PATINFO[] = { - { 2, 0, 116, 26, 6, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 2, 1, 117, 22, 2, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 2, 2, 118, 27, 7, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 2, 3, 119, 28, 4, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 2, 4, 120, 29, 8, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 121, 30, 6, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 122, 31, 9, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 123, 32, 7, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 124, 33, 10, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 126, 35, 6, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 127, 36, 9, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 128, 37, 7, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 129, 38, 10, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 131, 206, 11, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 132, 207, 12, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 133, 208, 13, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 134, 209, 14, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 135, 210, 15, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 136, 211, 16, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 137, 35, 17, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 138, 212, 18, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 139, 213, 19, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 140, 214, 20, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 141, 206, 11, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 142, 215, 21, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 143, 216, 13, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 144, 217, 22, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 145, 218, 15, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 146, 219, 23, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 146, 220, 24, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 146, 221, 25, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 146, 222, 26, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 146, 223, 27, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 147, 224, 28, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 148, 225, 29, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 149, 226, 30, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 150, 227, 31, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 151, 228, 32, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 152, 219, 23, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 152, 229, 33, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 152, 221, 25, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 153, 222, 34, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 153, 230, 27, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 152, 231, 23, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 152, 232, 33, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 152, 233, 25, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 153, 234, 34, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 153, 235, 35, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 154, 236, 36, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 154, 237, 37, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 154, 238, 38, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 155, 239, 39, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 155, 240, 40, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 154, 241, 23, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 154, 242, 24, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 154, 243, 25, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 155, 244, 41, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 155, 245, 42, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 154, 81, 23, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 154, 82, 24, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 154, 83, 25, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 155, 246, 43, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 155, 247, 44, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 157, 248, 45, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 157, 249, 46, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 157, 250, 47, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 209, 251, 48, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 209, 252, 49, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 0, 157, 91, 23, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 1, 157, 92, 33, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 2, 157, 93, 25, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 3, 209, 253, 43, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa - { 3, 4, 209, 254, 50, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa + { 2, 0, 116, 26, 6, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 2, 1, 117, 22, 2, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 2, 2, 118, 27, 7, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 2, 3, 119, 28, 4, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 2, 4, 120, 29, 8, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 121, 30, 6, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 122, 31, 9, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 123, 32, 7, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 124, 33, 10, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 126, 35, 6, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 127, 36, 9, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 128, 37, 7, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 129, 38, 10, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 131, 206, 11, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 132, 207, 12, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 133, 208, 13, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 134, 209, 14, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 135, 210, 15, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 136, 211, 16, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 137, 35, 17, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 138, 212, 18, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 139, 213, 19, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 140, 214, 20, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 141, 206, 11, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 142, 215, 21, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 143, 216, 13, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 144, 217, 22, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 145, 218, 15, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 146, 219, 23, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 146, 220, 24, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 146, 221, 25, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 146, 222, 26, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 146, 223, 27, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 147, 224, 28, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 148, 225, 29, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 149, 226, 30, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 150, 227, 31, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 151, 228, 32, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 152, 219, 23, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 152, 229, 33, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 152, 221, 25, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 153, 222, 34, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 153, 230, 27, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 152, 231, 23, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 152, 232, 33, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 152, 233, 25, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 153, 234, 34, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 153, 235, 35, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 154, 236, 36, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 154, 237, 37, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 154, 238, 38, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 155, 239, 39, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 155, 240, 40, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 154, 241, 23, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 154, 242, 24, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 154, 243, 25, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 155, 244, 41, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 155, 245, 42, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 154, 81, 23, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 154, 82, 24, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 154, 83, 25, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 155, 246, 43, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 155, 247, 44, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 157, 248, 45, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 157, 249, 46, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 157, 250, 47, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 209, 251, 48, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 209, 252, 49, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 0, 157, 91, 23, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 1, 157, 92, 33, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 2, 157, 93, 25, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 3, 209, 253, 43, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x + { 3, 4, 209, 254, 50, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 1xaa @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_256K_ZR_X_2xaa_PATINFO[] = { - { 2, 5, 160, 96, 51, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 2, 6, 118, 27, 7, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 2, 7, 210, 255, 52, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 2, 8, 120, 29, 8, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 2, 9, 211, 256, 53, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 163, 100, 51, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 123, 32, 7, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 212, 257, 52, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 213, 258, 53, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 127, 104, 51, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 128, 37, 7, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 129, 259, 52, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 214, 260, 53, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 132, 261, 54, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 133, 216, 13, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 134, 262, 55, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 135, 263, 15, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 215, 264, 56, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 137, 265, 16, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 138, 212, 18, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 139, 266, 18, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 140, 214, 20, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 216, 267, 20, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 142, 261, 54, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 143, 216, 13, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 144, 262, 55, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 145, 218, 15, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 217, 268, 56, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 146, 269, 57, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 146, 270, 25, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 146, 271, 41, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 146, 272, 58, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 146, 273, 59, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 148, 274, 60, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 149, 226, 30, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 218, 275, 61, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 151, 228, 32, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 219, 276, 62, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 152, 277, 57, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 152, 221, 25, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 152, 278, 41, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 153, 230, 27, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 153, 279, 63, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 152, 280, 57, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 152, 243, 25, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 152, 281, 41, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 153, 282, 64, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 153, 283, 65, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 154, 284, 37, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 154, 238, 38, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 154, 239, 66, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 155, 240, 40, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 155, 273, 67, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 154, 280, 57, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 154, 243, 25, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 154, 281, 41, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 155, 245, 42, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 155, 285, 68, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 154, 82, 24, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 154, 83, 25, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 154, 286, 43, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 155, 247, 44, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 155, 287, 69, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 157, 288, 70, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 157, 250, 47, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 157, 289, 71, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 158, 290, 72, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 158, 291, 73, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 5, 157, 92, 24, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 6, 157, 93, 25, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 7, 157, 292, 43, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 8, 158, 293, 50, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa - { 3, 9, 158, 294, 74, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa + { 2, 5, 160, 96, 51, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 2, 6, 118, 27, 7, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 2, 7, 210, 255, 52, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 2, 8, 120, 29, 8, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 2, 9, 211, 256, 53, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 163, 100, 51, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 123, 32, 7, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 212, 257, 52, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 213, 258, 53, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 127, 104, 51, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 128, 37, 7, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 129, 259, 52, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 214, 260, 53, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 132, 261, 54, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 133, 216, 13, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 134, 262, 55, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 135, 263, 15, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 215, 264, 56, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 137, 265, 16, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 138, 212, 18, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 139, 266, 18, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 140, 214, 20, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 216, 267, 20, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 142, 261, 54, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 143, 216, 13, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 144, 262, 55, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 145, 218, 15, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 217, 268, 56, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 146, 269, 57, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 146, 270, 25, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 146, 271, 41, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 146, 272, 58, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 146, 273, 59, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 148, 274, 60, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 149, 226, 30, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 218, 275, 61, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 151, 228, 32, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 219, 276, 62, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 152, 277, 57, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 152, 221, 25, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 152, 278, 41, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 153, 230, 27, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 153, 279, 63, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 152, 280, 57, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 152, 243, 25, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 152, 281, 41, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 153, 282, 64, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 153, 283, 65, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 154, 284, 37, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 154, 238, 38, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 154, 239, 66, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 155, 240, 40, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 155, 273, 67, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 154, 280, 57, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 154, 243, 25, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 154, 281, 41, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 155, 245, 42, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 155, 285, 68, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 154, 82, 24, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 154, 83, 25, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 154, 286, 43, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 155, 247, 44, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 155, 287, 69, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 157, 288, 70, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 157, 250, 47, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 157, 289, 71, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 158, 290, 72, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 158, 291, 73, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 5, 157, 92, 24, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 6, 157, 93, 25, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 7, 157, 292, 43, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 8, 158, 293, 50, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x + { 3, 9, 158, 294, 74, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 2xaa @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_256K_ZR_X_4xaa_PATINFO[] = { - { 2, 10, 118, 27, 7, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 2, 11, 119, 28, 4, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 2, 12, 120, 29, 8, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 2, 13, 220, 295, 75, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 2, 14, 221, 296, 76, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 123, 32, 7, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 124, 33, 10, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 222, 297, 77, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 223, 298, 76, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 128, 37, 7, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 129, 38, 10, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 224, 299, 77, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 225, 300, 76, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 133, 208, 13, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 134, 209, 14, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 135, 210, 15, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 215, 301, 78, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 226, 302, 79, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 138, 212, 18, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 139, 213, 19, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 140, 214, 20, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 216, 299, 80, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 227, 303, 81, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 143, 216, 13, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 144, 217, 22, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 145, 218, 15, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 217, 304, 82, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 228, 305, 83, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 146, 221, 25, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 146, 222, 26, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 146, 223, 27, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 146, 306, 84, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 146, 307, 85, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 149, 226, 30, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 218, 227, 86, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 168, 228, 87, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 219, 301, 62, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 229, 308, 88, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 152, 221, 25, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 152, 222, 34, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 152, 230, 27, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 153, 306, 84, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 153, 309, 89, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 152, 233, 25, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 152, 234, 34, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 152, 235, 35, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 153, 310, 90, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 153, 311, 91, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 154, 238, 38, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 154, 239, 66, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 154, 240, 92, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 156, 312, 93, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 156, 313, 94, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 154, 243, 25, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 154, 281, 41, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 154, 314, 42, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 156, 315, 95, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 156, 316, 96, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 154, 83, 25, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 154, 286, 43, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 154, 317, 44, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 156, 318, 97, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 156, 319, 68, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 157, 250, 47, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 157, 289, 71, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 157, 320, 98, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 159, 321, 99, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 159, 322, 100, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 10, 157, 93, 25, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 11, 157, 292, 43, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 12, 157, 323, 50, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 13, 159, 324, 74, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa - { 3, 14, 159, 325, 101, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa + { 2, 10, 118, 27, 7, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 2, 11, 119, 28, 4, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 2, 12, 120, 29, 8, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 2, 13, 220, 295, 75, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 2, 14, 221, 296, 76, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 123, 32, 7, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 124, 33, 10, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 222, 297, 77, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 223, 298, 76, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 128, 37, 7, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 129, 38, 10, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 224, 299, 77, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 225, 300, 76, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 133, 208, 13, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 134, 209, 14, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 135, 210, 15, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 215, 301, 78, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 226, 302, 79, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 138, 212, 18, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 139, 213, 19, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 140, 214, 20, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 216, 299, 80, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 227, 303, 81, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 143, 216, 13, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 144, 217, 22, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 145, 218, 15, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 217, 304, 82, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 228, 305, 83, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 146, 221, 25, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 146, 222, 26, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 146, 223, 27, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 146, 306, 84, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 146, 307, 85, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 149, 226, 30, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 218, 227, 86, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 168, 228, 87, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 219, 301, 62, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 229, 308, 88, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 152, 221, 25, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 152, 222, 34, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 152, 230, 27, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 153, 306, 84, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 153, 309, 89, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 152, 233, 25, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 152, 234, 34, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 152, 235, 35, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 153, 310, 90, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 153, 311, 91, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 154, 238, 38, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 154, 239, 66, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 154, 240, 92, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 156, 312, 93, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 156, 313, 94, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 154, 243, 25, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 154, 281, 41, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 154, 314, 42, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 156, 315, 95, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 156, 316, 96, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 154, 83, 25, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 154, 286, 43, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 154, 317, 44, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 156, 318, 97, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 156, 319, 68, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 157, 250, 47, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 157, 289, 71, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 157, 320, 98, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 159, 321, 99, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 159, 322, 100, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 10, 157, 93, 25, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 11, 157, 292, 43, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 12, 157, 323, 50, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 13, 159, 324, 74, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x + { 3, 14, 159, 325, 101, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 4xaa @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_256K_ZR_X_8xaa_PATINFO[] = { - { 2, 15, 210, 255, 52, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 2, 16, 120, 29, 8, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 2, 17, 211, 256, 53, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 2, 18, 221, 296, 76, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 2, 19, 230, 326, 102, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 212, 257, 52, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 213, 258, 53, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 223, 298, 76, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 231, 327, 103, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 129, 259, 52, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 214, 260, 53, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 225, 300, 76, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 232, 328, 103, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 134, 262, 55, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 135, 263, 15, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 215, 264, 56, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 226, 302, 104, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 233, 329, 105, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 139, 266, 18, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 140, 214, 20, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 216, 267, 20, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 227, 303, 81, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 234, 330, 106, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 144, 262, 55, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 145, 218, 15, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 217, 268, 56, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 228, 305, 83, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 235, 331, 107, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 146, 271, 41, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 146, 272, 58, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 146, 273, 59, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 236, 332, 108, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 237, 333, 109, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 218, 275, 61, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 168, 228, 87, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 238, 276, 110, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 239, 308, 111, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 239, 334, 112, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 152, 278, 41, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 152, 230, 27, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 152, 279, 63, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 240, 309, 89, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 241, 335, 113, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 152, 281, 41, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 152, 282, 64, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 152, 283, 65, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 240, 311, 91, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 241, 336, 89, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 154, 239, 66, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 154, 240, 92, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 154, 273, 63, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 242, 313, 94, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 243, 337, 114, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 154, 281, 41, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 154, 314, 42, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 154, 338, 68, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 242, 316, 96, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 243, 339, 115, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 154, 286, 43, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 154, 317, 44, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 154, 340, 68, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 242, 341, 116, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 243, 342, 115, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 157, 289, 71, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 157, 320, 98, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 157, 343, 117, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 244, 322, 100, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 245, 344, 118, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 15, 157, 292, 43, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 16, 157, 323, 50, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 17, 157, 345, 119, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 18, 244, 325, 101, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa - { 3, 19, 245, 346, 120, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa + { 2, 15, 210, 255, 52, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 2, 16, 120, 29, 8, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 2, 17, 211, 256, 53, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 2, 18, 221, 296, 76, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 2, 19, 230, 326, 102, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 212, 257, 52, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 125, 34, 8, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 213, 258, 53, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 223, 298, 76, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 231, 327, 103, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 129, 259, 52, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 130, 39, 8, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 214, 260, 53, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 225, 300, 76, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 232, 328, 103, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 134, 262, 55, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 135, 263, 15, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 215, 264, 56, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 226, 302, 104, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 233, 329, 105, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 139, 266, 18, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 140, 214, 20, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 216, 267, 20, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 227, 303, 81, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 234, 330, 106, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 144, 262, 55, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 145, 218, 15, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 217, 268, 56, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 228, 305, 83, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 235, 331, 107, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 146, 271, 41, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 146, 272, 58, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 146, 273, 59, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 236, 332, 108, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 237, 333, 109, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 218, 275, 61, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 168, 228, 87, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 238, 276, 110, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 239, 308, 111, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 239, 334, 112, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 152, 278, 41, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 152, 230, 27, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 152, 279, 63, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 240, 309, 89, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 241, 335, 113, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 152, 281, 41, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 152, 282, 64, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 152, 283, 65, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 240, 311, 91, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 241, 336, 89, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 154, 239, 66, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 154, 240, 92, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 154, 273, 63, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 242, 313, 94, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 243, 337, 114, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 154, 281, 41, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 154, 314, 42, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 154, 338, 68, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 242, 316, 96, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 243, 339, 115, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 154, 286, 43, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 154, 317, 44, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 154, 340, 68, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 242, 341, 116, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 243, 342, 115, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 157, 289, 71, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 157, 320, 98, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 157, 343, 117, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 244, 322, 100, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 245, 344, 118, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 15, 157, 292, 43, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 16, 157, 323, 50, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 17, 157, 345, 119, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 18, 244, 325, 101, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x + { 3, 19, 245, 346, 120, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_{Z,R}_X 8xaa @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_4K_S3_PATINFO[] = { - { 1, 20, 246, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_S3 - { 1, 20, 246, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_S3 - { 1, 21, 247, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_S3 - { 1, 22, 248, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_S3 - { 1, 23, 249, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_S3 - { 1, 24, 250, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3 + { 1, 20, 246, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x + { 1, 20, 246, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_S3 @ Navi3x + { 1, 21, 247, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_S3 @ Navi3x + { 1, 22, 248, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_S3 @ Navi3x + { 1, 23, 249, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_S3 @ Navi3x + { 1, 24, 250, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3 @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_4K_S3_X_PATINFO[] = { - { 1, 20, 246, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3_X - { 1, 21, 247, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3_X - { 1, 22, 248, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_S3_X - { 1, 23, 249, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_S3_X - { 1, 24, 250, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 251, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 252, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 253, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 254, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 255, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 256, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 257, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 258, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 259, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 260, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 261, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 262, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 263, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 264, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 265, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 256, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 257, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 258, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 259, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 260, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 261, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 262, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 263, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 264, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 265, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 266, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 267, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 268, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 269, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 270, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 261, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 262, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 263, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 264, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 265, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 266, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 267, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 268, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 269, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 270, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 266, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 267, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 268, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 269, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 270, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 266, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 267, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 268, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 269, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 270, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 266, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 267, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 268, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 269, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 270, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 266, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 267, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 268, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 269, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 270, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 266, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 267, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 268, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 269, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 270, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_S3_X - { 3, 20, 266, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_S3_X - { 3, 21, 267, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_S3_X - { 3, 22, 268, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_S3_X - { 3, 23, 269, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_S3_X - { 3, 24, 270, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3_X + { 1, 20, 246, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 1, 21, 247, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 1, 22, 248, 0, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 1, 23, 249, 0, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 1, 24, 250, 0, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 251, 0, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 252, 0, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 253, 0, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 254, 0, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 255, 0, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 256, 0, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 257, 0, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 258, 0, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 259, 0, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 260, 0, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 261, 0, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 262, 0, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 263, 0, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 264, 0, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 265, 0, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 256, 0, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 257, 0, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 258, 0, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 259, 0, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 260, 0, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 261, 0, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 262, 0, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 263, 0, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 264, 0, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 265, 0, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 266, 0, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 267, 0, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 268, 0, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 269, 0, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 270, 0, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 261, 0, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 262, 0, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 263, 0, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 264, 0, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 265, 0, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 266, 0, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 267, 0, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 268, 0, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 269, 0, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 270, 0, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 266, 0, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 267, 0, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 268, 0, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 269, 0, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 270, 0, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 266, 0, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 267, 0, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 268, 0, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 269, 0, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 270, 0, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 266, 0, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 267, 0, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 268, 0, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 269, 0, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 270, 0, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 266, 0, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 267, 0, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 268, 0, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 269, 0, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 270, 0, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 266, 0, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 267, 0, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 268, 0, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 269, 0, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 270, 0, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x + { 3, 20, 266, 0, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_4K_S3_X @ Navi3x + { 3, 21, 267, 0, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_4K_S3_X @ Navi3x + { 3, 22, 268, 0, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_4K_S3_X @ Navi3x + { 3, 23, 269, 0, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_4K_S3_X @ Navi3x + { 3, 24, 270, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3_X @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_S3_PATINFO[] = { - { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3 - { 1, 20, 246, 347, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3 - { 1, 21, 247, 348, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3 - { 1, 22, 248, 349, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3 - { 1, 23, 249, 350, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3 - { 1, 24, 250, 351, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3 + { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x + { 1, 20, 246, 347, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3 @ Navi3x + { 1, 21, 247, 348, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3 @ Navi3x + { 1, 22, 248, 349, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3 @ Navi3x + { 1, 23, 249, 350, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3 @ Navi3x + { 1, 24, 250, 351, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3 @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_S3_X_PATINFO[] = { - { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_X - { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_X - { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3_X - { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3_X - { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 251, 347, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 252, 348, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 253, 349, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 254, 350, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 255, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 256, 347, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 257, 348, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 258, 349, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 259, 350, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 260, 351, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 261, 347, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 262, 348, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 263, 349, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 264, 350, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 265, 351, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 256, 347, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 257, 348, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 258, 349, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 259, 350, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 260, 351, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 261, 347, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 262, 348, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 263, 349, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 264, 350, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 265, 351, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 266, 347, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 267, 348, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 268, 349, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 269, 350, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 270, 351, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 261, 347, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 262, 348, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 263, 349, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 264, 350, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 265, 351, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 266, 347, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 267, 348, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 268, 349, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 269, 350, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 270, 351, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 271, 352, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 272, 353, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 273, 354, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 274, 355, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 275, 356, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 266, 347, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 267, 348, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 268, 349, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 269, 350, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 270, 351, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 271, 352, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 272, 353, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 273, 354, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 274, 355, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 275, 356, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 276, 357, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 277, 358, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 278, 359, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 279, 360, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 280, 361, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 271, 352, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 272, 353, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 273, 354, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 274, 355, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 275, 356, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3_X - { 3, 20, 276, 357, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3_X - { 3, 21, 277, 358, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3_X - { 3, 22, 278, 359, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3_X - { 3, 23, 279, 360, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3_X - { 3, 24, 280, 361, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_X + { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 251, 347, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 252, 348, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 253, 349, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 254, 350, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 255, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 256, 347, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 257, 348, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 258, 349, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 259, 350, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 260, 351, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 261, 347, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 262, 348, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 263, 349, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 264, 350, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 265, 351, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 256, 347, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 257, 348, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 258, 349, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 259, 350, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 260, 351, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 261, 347, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 262, 348, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 263, 349, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 264, 350, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 265, 351, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 266, 347, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 267, 348, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 268, 349, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 269, 350, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 270, 351, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 261, 347, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 262, 348, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 263, 349, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 264, 350, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 265, 351, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 266, 347, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 267, 348, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 268, 349, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 269, 350, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 270, 351, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 271, 352, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 272, 353, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 273, 354, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 274, 355, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 275, 356, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 266, 347, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 267, 348, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 268, 349, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 269, 350, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 270, 351, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 271, 352, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 272, 353, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 273, 354, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 274, 355, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 275, 356, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 276, 357, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 277, 358, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 278, 359, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 279, 360, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 280, 361, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 271, 352, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 272, 353, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 273, 354, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 274, 355, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 275, 356, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x + { 3, 20, 276, 357, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3_X @ Navi3x + { 3, 21, 277, 358, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3_X @ Navi3x + { 3, 22, 278, 359, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3_X @ Navi3x + { 3, 23, 279, 360, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3_X @ Navi3x + { 3, 24, 280, 361, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_X @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_S3_T_PATINFO[] = { - { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_T - { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_T - { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3_T - { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3_T - { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 251, 347, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 252, 348, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 253, 349, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 254, 350, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 255, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 256, 347, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 257, 348, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 258, 349, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 259, 350, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 260, 351, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 281, 347, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 282, 348, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 283, 349, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 284, 350, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 285, 351, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 256, 347, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 257, 348, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 258, 349, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 259, 350, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 260, 351, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 281, 347, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 282, 348, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 283, 349, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 284, 350, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 285, 351, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 286, 347, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 287, 348, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 288, 349, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 289, 350, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 290, 351, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 281, 347, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 282, 348, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 283, 349, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 284, 350, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 285, 351, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 286, 347, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 287, 348, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 288, 349, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 289, 350, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 290, 351, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 291, 352, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 292, 353, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 293, 354, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 294, 355, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 295, 356, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 286, 347, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 287, 348, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 288, 349, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 289, 350, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 290, 351, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 291, 352, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 292, 353, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 293, 354, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 294, 355, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 295, 356, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 246, 362, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 247, 363, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 248, 364, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 249, 365, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 250, 366, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 291, 352, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 292, 353, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 293, 354, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 294, 355, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 295, 356, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3_T - { 3, 20, 246, 362, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3_T - { 3, 21, 247, 363, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3_T - { 3, 22, 248, 364, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3_T - { 3, 23, 249, 365, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3_T - { 3, 24, 250, 366, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_T + { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 251, 347, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 252, 348, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 253, 349, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 254, 350, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 255, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 256, 347, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 257, 348, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 258, 349, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 259, 350, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 260, 351, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 281, 347, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 282, 348, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 283, 349, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 284, 350, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 285, 351, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 256, 347, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 257, 348, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 258, 349, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 259, 350, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 260, 351, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 281, 347, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 282, 348, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 283, 349, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 284, 350, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 285, 351, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 286, 347, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 287, 348, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 288, 349, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 289, 350, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 290, 351, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 281, 347, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 282, 348, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 283, 349, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 284, 350, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 285, 351, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 286, 347, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 287, 348, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 288, 349, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 289, 350, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 290, 351, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 291, 352, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 292, 353, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 293, 354, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 294, 355, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 295, 356, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 286, 347, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 287, 348, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 288, 349, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 289, 350, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 290, 351, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 291, 352, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 292, 353, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 293, 354, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 294, 355, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 295, 356, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 246, 362, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 247, 363, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 248, 364, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 249, 365, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 250, 366, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 291, 352, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 292, 353, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 293, 354, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 294, 355, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 295, 356, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x + { 3, 20, 246, 362, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_S3_T @ Navi3x + { 3, 21, 247, 363, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_S3_T @ Navi3x + { 3, 22, 248, 364, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_S3_T @ Navi3x + { 3, 23, 249, 365, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_S3_T @ Navi3x + { 3, 24, 250, 366, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_T @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_256K_S3_X_PATINFO[] = { - { 1, 20, 246, 347, 121, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_S3_X - { 1, 21, 247, 348, 121, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_S3_X - { 1, 22, 248, 349, 122, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_S3_X - { 1, 23, 249, 350, 123, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_S3_X - { 1, 24, 250, 351, 123, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 251, 347, 121, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 252, 348, 121, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 253, 349, 122, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 254, 350, 123, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 255, 351, 123, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 256, 347, 121, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 257, 348, 121, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 258, 349, 122, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 259, 350, 123, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 260, 351, 123, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 261, 347, 121, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 262, 348, 121, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 263, 349, 122, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 264, 350, 123, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 265, 351, 123, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 256, 347, 121, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 257, 348, 121, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 258, 349, 122, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 259, 350, 123, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 260, 351, 123, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 261, 347, 121, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 262, 348, 121, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 263, 349, 122, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 264, 350, 123, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 265, 351, 123, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 266, 347, 121, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 267, 348, 121, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 268, 349, 122, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 269, 350, 123, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 270, 351, 123, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 261, 347, 121, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 262, 348, 121, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 263, 349, 122, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 264, 350, 123, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 265, 351, 123, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 266, 347, 121, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 267, 348, 121, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 268, 349, 122, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 269, 350, 123, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 270, 351, 123, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 271, 352, 121, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 272, 353, 121, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 273, 354, 122, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 274, 355, 123, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 275, 356, 123, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 266, 347, 121, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 267, 348, 121, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 268, 349, 122, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 269, 350, 123, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 270, 351, 123, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 271, 352, 121, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 272, 353, 121, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 273, 354, 122, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 274, 355, 123, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 275, 356, 123, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 276, 357, 121, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 277, 358, 121, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 278, 359, 122, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 279, 360, 123, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 280, 361, 123, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 271, 352, 121, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 272, 353, 121, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 273, 354, 122, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 274, 355, 123, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 275, 356, 123, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_S3_X - { 3, 20, 276, 357, 121, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_S3_X - { 3, 21, 277, 358, 121, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_S3_X - { 3, 22, 278, 359, 122, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_S3_X - { 3, 23, 279, 360, 123, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_S3_X - { 3, 24, 280, 361, 123, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_S3_X + { 1, 20, 246, 347, 121, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 1, 21, 247, 348, 121, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 1, 22, 248, 349, 122, } , // 1 pipes (1 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 1, 23, 249, 350, 123, } , // 1 pipes (1 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 1, 24, 250, 351, 123, } , // 1 pipes (1 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 251, 347, 121, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 252, 348, 121, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 253, 349, 122, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 254, 350, 123, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 255, 351, 123, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 256, 347, 121, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 257, 348, 121, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 258, 349, 122, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 259, 350, 123, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 260, 351, 123, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 261, 347, 121, } , // 8 pipes (2 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 262, 348, 121, } , // 8 pipes (2 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 263, 349, 122, } , // 8 pipes (2 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 264, 350, 123, } , // 8 pipes (2 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 265, 351, 123, } , // 8 pipes (2 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 256, 347, 121, } , // 4 pipes (4 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 257, 348, 121, } , // 4 pipes (4 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 258, 349, 122, } , // 4 pipes (4 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 259, 350, 123, } , // 4 pipes (4 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 260, 351, 123, } , // 4 pipes (4 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 261, 347, 121, } , // 8 pipes (4 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 262, 348, 121, } , // 8 pipes (4 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 263, 349, 122, } , // 8 pipes (4 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 264, 350, 123, } , // 8 pipes (4 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 265, 351, 123, } , // 8 pipes (4 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 266, 347, 121, } , // 16 pipes (4 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 267, 348, 121, } , // 16 pipes (4 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 268, 349, 122, } , // 16 pipes (4 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 269, 350, 123, } , // 16 pipes (4 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 270, 351, 123, } , // 16 pipes (4 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 261, 347, 121, } , // 8 pipes (8 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 262, 348, 121, } , // 8 pipes (8 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 263, 349, 122, } , // 8 pipes (8 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 264, 350, 123, } , // 8 pipes (8 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 265, 351, 123, } , // 8 pipes (8 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 266, 347, 121, } , // 16 pipes (8 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 267, 348, 121, } , // 16 pipes (8 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 268, 349, 122, } , // 16 pipes (8 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 269, 350, 123, } , // 16 pipes (8 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 270, 351, 123, } , // 16 pipes (8 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 271, 352, 121, } , // 32 pipes (8 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 272, 353, 121, } , // 32 pipes (8 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 273, 354, 122, } , // 32 pipes (8 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 274, 355, 123, } , // 32 pipes (8 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 275, 356, 123, } , // 32 pipes (8 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 266, 347, 121, } , // 16 pipes (16 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 267, 348, 121, } , // 16 pipes (16 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 268, 349, 122, } , // 16 pipes (16 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 269, 350, 123, } , // 16 pipes (16 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 270, 351, 123, } , // 16 pipes (16 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 271, 352, 121, } , // 32 pipes (16 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 272, 353, 121, } , // 32 pipes (16 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 273, 354, 122, } , // 32 pipes (16 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 274, 355, 123, } , // 32 pipes (16 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 275, 356, 123, } , // 32 pipes (16 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 276, 357, 121, } , // 64 pipes (16 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 277, 358, 121, } , // 64 pipes (16 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 278, 359, 122, } , // 64 pipes (16 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 279, 360, 123, } , // 64 pipes (16 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 280, 361, 123, } , // 64 pipes (16 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 271, 352, 121, } , // 32 pipes (32 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 272, 353, 121, } , // 32 pipes (32 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 273, 354, 122, } , // 32 pipes (32 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 274, 355, 123, } , // 32 pipes (32 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 275, 356, 123, } , // 32 pipes (32 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x + { 3, 20, 276, 357, 121, } , // 64 pipes (32 PKRs) 1 bpe @ SW_256K_S3_X @ Navi3x + { 3, 21, 277, 358, 121, } , // 64 pipes (32 PKRs) 2 bpe @ SW_256K_S3_X @ Navi3x + { 3, 22, 278, 359, 122, } , // 64 pipes (32 PKRs) 4 bpe @ SW_256K_S3_X @ Navi3x + { 3, 23, 279, 360, 123, } , // 64 pipes (32 PKRs) 8 bpe @ SW_256K_S3_X @ Navi3x + { 3, 24, 280, 361, 123, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256K_S3_X @ Navi3x }; const ADDR_SW_PATINFO GFX11_SW_64K_D3_X_PATINFO[] = { - { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D3_X - { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D3_X - { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D3_X - { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D3_X - { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D3_X - { 2, 20, 296, 367, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D3_X - { 2, 21, 296, 368, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D3_X - { 2, 22, 297, 369, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D3_X - { 2, 23, 298, 351, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D3_X - { 3, 24, 299, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 300, 370, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 300, 371, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 301, 372, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 302, 373, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 303, 373, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 304, 370, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 304, 371, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 305, 372, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 306, 373, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 307, 373, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 308, 374, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 309, 375, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 310, 376, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 311, 377, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 312, 378, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 313, 379, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 314, 371, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 315, 372, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 316, 373, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 317, 373, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 318, 380, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 319, 371, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 320, 372, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 321, 373, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 322, 373, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 323, 381, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 323, 382, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 323, 383, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 324, 384, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 325, 384, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 326, 379, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 327, 371, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 328, 372, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 329, 373, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 330, 373, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 326, 385, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 331, 386, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 331, 387, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 332, 388, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 333, 388, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 334, 389, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 335, 390, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 336, 391, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 337, 392, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 338, 392, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 334, 393, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 335, 394, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 336, 395, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 337, 396, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 338, 396, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 334, 397, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 339, 398, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 339, 399, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 340, 400, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 341, 400, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 342, 401, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 343, 402, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 344, 403, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 345, 404, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 346, 404, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D3_X - { 3, 20, 342, 405, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D3_X - { 3, 21, 343, 406, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D3_X - { 3, 22, 344, 407, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D3_X - { 4, 23, 345, 408, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D3_X - { 4, 24, 346, 408, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D3_X + { 1, 20, 246, 347, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 1, 21, 247, 348, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 1, 22, 248, 349, 0, } , // 1 pipes (1 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 1, 23, 249, 350, 0, } , // 1 pipes (1 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 1, 24, 250, 351, 0, } , // 1 pipes (1 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 2, 20, 296, 367, 0, } , // 2 pipes (1-2 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 2, 21, 296, 368, 0, } , // 2 pipes (1-2 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 2, 22, 297, 369, 0, } , // 2 pipes (1-2 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 2, 23, 298, 351, 0, } , // 2 pipes (1-2 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 3, 24, 299, 351, 0, } , // 2 pipes (1-2 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 300, 370, 0, } , // 4 pipes (1-2 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 300, 371, 0, } , // 4 pipes (1-2 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 301, 372, 0, } , // 4 pipes (1-2 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 302, 373, 0, } , // 4 pipes (1-2 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 303, 373, 0, } , // 4 pipes (1-2 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 304, 370, 0, } , // 8 pipes (2 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 304, 371, 0, } , // 8 pipes (2 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 305, 372, 0, } , // 8 pipes (2 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 306, 373, 0, } , // 8 pipes (2 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 307, 373, 0, } , // 8 pipes (2 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 308, 374, 0, } , // 4 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 309, 375, 0, } , // 4 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 310, 376, 0, } , // 4 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 311, 377, 0, } , // 4 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 312, 378, 0, } , // 4 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 313, 379, 0, } , // 8 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 314, 371, 0, } , // 8 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 315, 372, 0, } , // 8 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 316, 373, 0, } , // 8 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 317, 373, 0, } , // 8 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 318, 380, 0, } , // 16 pipes (4 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 319, 371, 0, } , // 16 pipes (4 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 320, 372, 0, } , // 16 pipes (4 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 321, 373, 0, } , // 16 pipes (4 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 322, 373, 0, } , // 16 pipes (4 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 323, 381, 0, } , // 8 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 323, 382, 0, } , // 8 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 323, 383, 0, } , // 8 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 324, 384, 0, } , // 8 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 325, 384, 0, } , // 8 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 326, 379, 0, } , // 16 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 327, 371, 0, } , // 16 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 328, 372, 0, } , // 16 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 329, 373, 0, } , // 16 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 330, 373, 0, } , // 16 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 326, 385, 0, } , // 32 pipes (8 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 331, 386, 0, } , // 32 pipes (8 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 331, 387, 0, } , // 32 pipes (8 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 332, 388, 0, } , // 32 pipes (8 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 333, 388, 0, } , // 32 pipes (8 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 334, 389, 0, } , // 16 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 335, 390, 0, } , // 16 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 336, 391, 0, } , // 16 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 337, 392, 0, } , // 16 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 338, 392, 0, } , // 16 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 334, 393, 0, } , // 32 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 335, 394, 0, } , // 32 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 336, 395, 0, } , // 32 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 337, 396, 0, } , // 32 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 338, 396, 0, } , // 32 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 334, 397, 0, } , // 64 pipes (16 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 339, 398, 0, } , // 64 pipes (16 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 339, 399, 0, } , // 64 pipes (16 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 340, 400, 0, } , // 64 pipes (16 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 341, 400, 0, } , // 64 pipes (16 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 342, 401, 0, } , // 32 pipes (32 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 343, 402, 0, } , // 32 pipes (32 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 344, 403, 0, } , // 32 pipes (32 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 345, 404, 0, } , // 32 pipes (32 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 346, 404, 0, } , // 32 pipes (32 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x + { 3, 20, 342, 405, 0, } , // 64 pipes (32 PKRs) 1 bpe @ SW_64K_D3_X @ Navi3x + { 3, 21, 343, 406, 0, } , // 64 pipes (32 PKRs) 2 bpe @ SW_64K_D3_X @ Navi3x + { 3, 22, 344, 407, 0, } , // 64 pipes (32 PKRs) 4 bpe @ SW_64K_D3_X @ Navi3x + { 4, 23, 345, 408, 0, } , // 64 pipes (32 PKRs) 8 bpe @ SW_64K_D3_X @ Navi3x + { 4, 24, 346, 408, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D3_X @ Navi3x }; @@ -2683,254 +2683,254 @@ const UINT_64 GFX11_SW_PATTERN_NIBBLE4[][4] = const UINT_8 GFX11_DCC_64K_R_X_PATIDX[] = { - 0, // 1 bpe ua @ SW_64K_{Z,R}_X 1xaa - 1, // 2 bpe ua @ SW_64K_{Z,R}_X 1xaa - 2, // 4 bpe ua @ SW_64K_{Z,R}_X 1xaa - 3, // 8 bpe ua @ SW_64K_{Z,R}_X 1xaa - 4, // 16 bpe ua @ SW_64K_{Z,R}_X 1xaa - 0, // 1 pipes (1 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 1, // 1 pipes (1 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 2, // 1 pipes (1 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 3, // 1 pipes (1 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 4, // 1 pipes (1 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 5, // 2 pipes (1-2 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 6, // 2 pipes (1-2 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 7, // 2 pipes (1-2 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 8, // 2 pipes (1-2 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 9, // 2 pipes (1-2 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 10, // 4 pipes (1-2 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 11, // 4 pipes (1-2 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 12, // 4 pipes (1-2 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 13, // 4 pipes (1-2 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 14, // 4 pipes (1-2 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 15, // 8 pipes (2 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 16, // 8 pipes (2 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 17, // 8 pipes (2 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 18, // 8 pipes (2 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 19, // 8 pipes (2 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 20, // 4 pipes (4 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 21, // 4 pipes (4 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 22, // 4 pipes (4 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 23, // 4 pipes (4 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 24, // 4 pipes (4 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 25, // 8 pipes (4 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 26, // 8 pipes (4 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 27, // 8 pipes (4 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 28, // 8 pipes (4 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 29, // 8 pipes (4 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 30, // 16 pipes (4 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 31, // 16 pipes (4 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 32, // 16 pipes (4 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 33, // 16 pipes (4 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 34, // 16 pipes (4 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 35, // 8 pipes (8 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 36, // 8 pipes (8 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 37, // 8 pipes (8 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 38, // 8 pipes (8 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 39, // 8 pipes (8 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 35, // 16 pipes (8 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 36, // 16 pipes (8 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 37, // 16 pipes (8 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 40, // 16 pipes (8 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 41, // 16 pipes (8 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 42, // 32 pipes (8 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 43, // 32 pipes (8 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 44, // 32 pipes (8 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 45, // 32 pipes (8 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 46, // 32 pipes (8 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 47, // 16 pipes (16 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 48, // 16 pipes (16 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 49, // 16 pipes (16 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 50, // 16 pipes (16 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 51, // 16 pipes (16 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 47, // 32 pipes (16 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 48, // 32 pipes (16 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 49, // 32 pipes (16 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 52, // 32 pipes (16 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 53, // 32 pipes (16 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 54, // 64 pipes (16 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 55, // 64 pipes (16 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 56, // 64 pipes (16 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 57, // 64 pipes (16 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 58, // 64 pipes (16 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 59, // 32 pipes (32 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 60, // 32 pipes (32 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 61, // 32 pipes (32 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 62, // 32 pipes (32 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 63, // 32 pipes (32 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa - 59, // 64 pipes (32 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa - 60, // 64 pipes (32 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa - 61, // 64 pipes (32 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa - 64, // 64 pipes (32 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa - 65, // 64 pipes (32 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa + 0, // 1 bpe ua @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 1, // 2 bpe ua @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 2, // 4 bpe ua @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 3, // 8 bpe ua @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 4, // 16 bpe ua @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 0, // 1 pipes (1 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 1, // 1 pipes (1 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 2, // 1 pipes (1 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 3, // 1 pipes (1 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 4, // 1 pipes (1 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 5, // 2 pipes (1-2 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 6, // 2 pipes (1-2 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 7, // 2 pipes (1-2 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 8, // 2 pipes (1-2 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 9, // 2 pipes (1-2 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 10, // 4 pipes (1-2 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 11, // 4 pipes (1-2 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 12, // 4 pipes (1-2 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 13, // 4 pipes (1-2 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 14, // 4 pipes (1-2 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 15, // 8 pipes (2 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 16, // 8 pipes (2 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 17, // 8 pipes (2 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 18, // 8 pipes (2 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 19, // 8 pipes (2 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 20, // 4 pipes (4 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 21, // 4 pipes (4 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 22, // 4 pipes (4 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 23, // 4 pipes (4 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 24, // 4 pipes (4 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 25, // 8 pipes (4 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 26, // 8 pipes (4 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 27, // 8 pipes (4 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 28, // 8 pipes (4 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 29, // 8 pipes (4 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 30, // 16 pipes (4 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 31, // 16 pipes (4 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 32, // 16 pipes (4 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 33, // 16 pipes (4 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 34, // 16 pipes (4 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 35, // 8 pipes (8 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 36, // 8 pipes (8 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 37, // 8 pipes (8 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 38, // 8 pipes (8 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 39, // 8 pipes (8 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 35, // 16 pipes (8 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 36, // 16 pipes (8 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 37, // 16 pipes (8 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 40, // 16 pipes (8 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 41, // 16 pipes (8 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 42, // 32 pipes (8 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 43, // 32 pipes (8 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 44, // 32 pipes (8 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 45, // 32 pipes (8 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 46, // 32 pipes (8 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 47, // 16 pipes (16 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 48, // 16 pipes (16 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 49, // 16 pipes (16 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 50, // 16 pipes (16 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 51, // 16 pipes (16 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 47, // 32 pipes (16 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 48, // 32 pipes (16 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 49, // 32 pipes (16 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 52, // 32 pipes (16 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 53, // 32 pipes (16 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 54, // 64 pipes (16 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 55, // 64 pipes (16 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 56, // 64 pipes (16 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 57, // 64 pipes (16 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 58, // 64 pipes (16 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 59, // 32 pipes (32 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 60, // 32 pipes (32 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 61, // 32 pipes (32 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 62, // 32 pipes (32 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 63, // 32 pipes (32 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 59, // 64 pipes (32 PKRs) 1 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 60, // 64 pipes (32 PKRs) 2 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 61, // 64 pipes (32 PKRs) 4 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 64, // 64 pipes (32 PKRs) 8 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x + 65, // 64 pipes (32 PKRs) 16 bpe pa @ SW_64K_{Z,R}_X 1xaa @ Navi3x }; const UINT_8 GFX11_DCC_256K_R_X_PATIDX[] = { - 0, // 1 bpe ua @ SW_256K_{Z,R}_X 1xaa - 1, // 2 bpe ua @ SW_256K_{Z,R}_X 1xaa - 2, // 4 bpe ua @ SW_256K_{Z,R}_X 1xaa - 3, // 8 bpe ua @ SW_256K_{Z,R}_X 1xaa - 4, // 16 bpe ua @ SW_256K_{Z,R}_X 1xaa - 0, // 1 pipes (1 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 1, // 1 pipes (1 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 2, // 1 pipes (1 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 3, // 1 pipes (1 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 4, // 1 pipes (1 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 5, // 2 pipes (1-2 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 6, // 2 pipes (1-2 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 7, // 2 pipes (1-2 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 8, // 2 pipes (1-2 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 9, // 2 pipes (1-2 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 10, // 4 pipes (1-2 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 11, // 4 pipes (1-2 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 12, // 4 pipes (1-2 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 13, // 4 pipes (1-2 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 14, // 4 pipes (1-2 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 15, // 8 pipes (2 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 16, // 8 pipes (2 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 17, // 8 pipes (2 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 18, // 8 pipes (2 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 19, // 8 pipes (2 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 20, // 4 pipes (4 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 21, // 4 pipes (4 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 22, // 4 pipes (4 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 23, // 4 pipes (4 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 24, // 4 pipes (4 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 25, // 8 pipes (4 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 26, // 8 pipes (4 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 27, // 8 pipes (4 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 28, // 8 pipes (4 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 29, // 8 pipes (4 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 30, // 16 pipes (4 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 31, // 16 pipes (4 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 32, // 16 pipes (4 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 33, // 16 pipes (4 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 34, // 16 pipes (4 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 35, // 8 pipes (8 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 36, // 8 pipes (8 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 37, // 8 pipes (8 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 38, // 8 pipes (8 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 39, // 8 pipes (8 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 35, // 16 pipes (8 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 36, // 16 pipes (8 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 37, // 16 pipes (8 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 40, // 16 pipes (8 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 41, // 16 pipes (8 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 42, // 32 pipes (8 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 43, // 32 pipes (8 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 44, // 32 pipes (8 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 45, // 32 pipes (8 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 66, // 32 pipes (8 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 47, // 16 pipes (16 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 48, // 16 pipes (16 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 49, // 16 pipes (16 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 50, // 16 pipes (16 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 67, // 16 pipes (16 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 47, // 32 pipes (16 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 48, // 32 pipes (16 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 49, // 32 pipes (16 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 52, // 32 pipes (16 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 68, // 32 pipes (16 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 54, // 64 pipes (16 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 55, // 64 pipes (16 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 56, // 64 pipes (16 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 69, // 64 pipes (16 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 70, // 64 pipes (16 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 59, // 32 pipes (32 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 60, // 32 pipes (32 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 61, // 32 pipes (32 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 71, // 32 pipes (32 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 72, // 32 pipes (32 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa - 59, // 64 pipes (32 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa - 60, // 64 pipes (32 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa - 61, // 64 pipes (32 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa - 73, // 64 pipes (32 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa - 74, // 64 pipes (32 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa + 0, // 1 bpe ua @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 1, // 2 bpe ua @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 2, // 4 bpe ua @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 3, // 8 bpe ua @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 4, // 16 bpe ua @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 0, // 1 pipes (1 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 1, // 1 pipes (1 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 2, // 1 pipes (1 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 3, // 1 pipes (1 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 4, // 1 pipes (1 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 5, // 2 pipes (1-2 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 6, // 2 pipes (1-2 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 7, // 2 pipes (1-2 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 8, // 2 pipes (1-2 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 9, // 2 pipes (1-2 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 10, // 4 pipes (1-2 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 11, // 4 pipes (1-2 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 12, // 4 pipes (1-2 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 13, // 4 pipes (1-2 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 14, // 4 pipes (1-2 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 15, // 8 pipes (2 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 16, // 8 pipes (2 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 17, // 8 pipes (2 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 18, // 8 pipes (2 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 19, // 8 pipes (2 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 20, // 4 pipes (4 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 21, // 4 pipes (4 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 22, // 4 pipes (4 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 23, // 4 pipes (4 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 24, // 4 pipes (4 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 25, // 8 pipes (4 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 26, // 8 pipes (4 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 27, // 8 pipes (4 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 28, // 8 pipes (4 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 29, // 8 pipes (4 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 30, // 16 pipes (4 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 31, // 16 pipes (4 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 32, // 16 pipes (4 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 33, // 16 pipes (4 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 34, // 16 pipes (4 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 35, // 8 pipes (8 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 36, // 8 pipes (8 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 37, // 8 pipes (8 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 38, // 8 pipes (8 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 39, // 8 pipes (8 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 35, // 16 pipes (8 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 36, // 16 pipes (8 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 37, // 16 pipes (8 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 40, // 16 pipes (8 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 41, // 16 pipes (8 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 42, // 32 pipes (8 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 43, // 32 pipes (8 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 44, // 32 pipes (8 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 45, // 32 pipes (8 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 66, // 32 pipes (8 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 47, // 16 pipes (16 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 48, // 16 pipes (16 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 49, // 16 pipes (16 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 50, // 16 pipes (16 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 67, // 16 pipes (16 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 47, // 32 pipes (16 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 48, // 32 pipes (16 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 49, // 32 pipes (16 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 52, // 32 pipes (16 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 68, // 32 pipes (16 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 54, // 64 pipes (16 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 55, // 64 pipes (16 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 56, // 64 pipes (16 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 69, // 64 pipes (16 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 70, // 64 pipes (16 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 59, // 32 pipes (32 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 60, // 32 pipes (32 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 61, // 32 pipes (32 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 71, // 32 pipes (32 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 72, // 32 pipes (32 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 59, // 64 pipes (32 PKRs) 1 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 60, // 64 pipes (32 PKRs) 2 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 61, // 64 pipes (32 PKRs) 4 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 73, // 64 pipes (32 PKRs) 8 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x + 74, // 64 pipes (32 PKRs) 16 bpe pa @ SW_256K_{Z,R}_X 1xaa @ Navi3x }; const UINT_8 GFX11_HTILE_PATIDX[] = { - 0, // 1xaa ua @ HTILE_64K - 0, // 2xaa ua @ HTILE_64K - 0, // 4xaa ua @ HTILE_64K - 0, // 8xaa ua @ HTILE_64K - 0, // 1 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K - 0, // 1 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K - 0, // 1 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K - 0, // 1 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K - 1, // 2 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K - 1, // 2 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K - 1, // 2 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K - 1, // 2 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K - 2, // 4 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K - 2, // 4 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K - 2, // 4 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K - 2, // 4 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K - 3, // 8 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K - 3, // 8 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K - 3, // 8 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K - 3, // 8 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K - 1, // 2 pipes (4 PKRs) 1xaa pa @ HTILE_64K - 1, // 2 pipes (4 PKRs) 2xaa pa @ HTILE_64K - 1, // 2 pipes (4 PKRs) 4xaa pa @ HTILE_64K - 1, // 2 pipes (4 PKRs) 8xaa pa @ HTILE_64K - 4, // 4 pipes (4 PKRs) 1xaa pa @ HTILE_64K - 4, // 4 pipes (4 PKRs) 2xaa pa @ HTILE_64K - 4, // 4 pipes (4 PKRs) 4xaa pa @ HTILE_64K - 4, // 4 pipes (4 PKRs) 8xaa pa @ HTILE_64K - 5, // 8 pipes (4 PKRs) 1xaa pa @ HTILE_64K - 5, // 8 pipes (4 PKRs) 2xaa pa @ HTILE_64K - 5, // 8 pipes (4 PKRs) 4xaa pa @ HTILE_64K - 5, // 8 pipes (4 PKRs) 8xaa pa @ HTILE_64K - 6, // 16 pipes (4 PKRs) 1xaa pa @ HTILE_64K - 6, // 16 pipes (4 PKRs) 2xaa pa @ HTILE_64K - 6, // 16 pipes (4 PKRs) 4xaa pa @ HTILE_64K - 6, // 16 pipes (4 PKRs) 8xaa pa @ HTILE_64K - 7, // 4 pipes (8 PKRs) 1xaa pa @ HTILE_64K - 7, // 4 pipes (8 PKRs) 2xaa pa @ HTILE_64K - 7, // 4 pipes (8 PKRs) 4xaa pa @ HTILE_64K - 7, // 4 pipes (8 PKRs) 8xaa pa @ HTILE_64K - 8, // 8 pipes (8 PKRs) 1xaa pa @ HTILE_64K - 8, // 8 pipes (8 PKRs) 2xaa pa @ HTILE_64K - 8, // 8 pipes (8 PKRs) 4xaa pa @ HTILE_64K - 8, // 8 pipes (8 PKRs) 8xaa pa @ HTILE_64K - 9, // 16 pipes (8 PKRs) 1xaa pa @ HTILE_64K - 9, // 16 pipes (8 PKRs) 2xaa pa @ HTILE_64K - 9, // 16 pipes (8 PKRs) 4xaa pa @ HTILE_64K - 9, // 16 pipes (8 PKRs) 8xaa pa @ HTILE_64K - 10, // 32 pipes (8 PKRs) 1xaa pa @ HTILE_64K - 10, // 32 pipes (8 PKRs) 2xaa pa @ HTILE_64K - 10, // 32 pipes (8 PKRs) 4xaa pa @ HTILE_64K - 10, // 32 pipes (8 PKRs) 8xaa pa @ HTILE_64K - 11, // 8 pipes (16 PKRs) 1xaa pa @ HTILE_64K - 11, // 8 pipes (16 PKRs) 2xaa pa @ HTILE_64K - 11, // 8 pipes (16 PKRs) 4xaa pa @ HTILE_64K - 11, // 8 pipes (16 PKRs) 8xaa pa @ HTILE_64K - 12, // 16 pipes (16 PKRs) 1xaa pa @ HTILE_64K - 12, // 16 pipes (16 PKRs) 2xaa pa @ HTILE_64K - 12, // 16 pipes (16 PKRs) 4xaa pa @ HTILE_64K - 12, // 16 pipes (16 PKRs) 8xaa pa @ HTILE_64K - 13, // 32 pipes (16 PKRs) 1xaa pa @ HTILE_64K - 13, // 32 pipes (16 PKRs) 2xaa pa @ HTILE_64K - 13, // 32 pipes (16 PKRs) 4xaa pa @ HTILE_64K - 13, // 32 pipes (16 PKRs) 8xaa pa @ HTILE_64K - 14, // 64 pipes (16 PKRs) 1xaa pa @ HTILE_64K - 14, // 64 pipes (16 PKRs) 2xaa pa @ HTILE_64K - 14, // 64 pipes (16 PKRs) 4xaa pa @ HTILE_64K - 14, // 64 pipes (16 PKRs) 8xaa pa @ HTILE_64K - 15, // 16 pipes (32 PKRs) 1xaa pa @ HTILE_64K - 15, // 16 pipes (32 PKRs) 2xaa pa @ HTILE_64K - 15, // 16 pipes (32 PKRs) 4xaa pa @ HTILE_64K - 15, // 16 pipes (32 PKRs) 8xaa pa @ HTILE_64K - 16, // 32 pipes (32 PKRs) 1xaa pa @ HTILE_64K - 16, // 32 pipes (32 PKRs) 2xaa pa @ HTILE_64K - 16, // 32 pipes (32 PKRs) 4xaa pa @ HTILE_64K - 16, // 32 pipes (32 PKRs) 8xaa pa @ HTILE_64K - 17, // 64 pipes (32 PKRs) 1xaa pa @ HTILE_64K - 17, // 64 pipes (32 PKRs) 2xaa pa @ HTILE_64K - 17, // 64 pipes (32 PKRs) 4xaa pa @ HTILE_64K - 17, // 64 pipes (32 PKRs) 8xaa pa @ HTILE_64K + 0, // 1xaa ua @ HTILE_64K @ Navi3x + 0, // 2xaa ua @ HTILE_64K @ Navi3x + 0, // 4xaa ua @ HTILE_64K @ Navi3x + 0, // 8xaa ua @ HTILE_64K @ Navi3x + 0, // 1 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 0, // 1 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 0, // 1 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 0, // 1 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 1, // 2 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 1, // 2 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 1, // 2 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 1, // 2 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 2, // 4 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 2, // 4 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 2, // 4 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 2, // 4 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 3, // 8 pipes (1-2 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 3, // 8 pipes (1-2 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 3, // 8 pipes (1-2 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 3, // 8 pipes (1-2 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 1, // 2 pipes (4 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 1, // 2 pipes (4 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 1, // 2 pipes (4 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 1, // 2 pipes (4 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 4, // 4 pipes (4 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 4, // 4 pipes (4 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 4, // 4 pipes (4 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 4, // 4 pipes (4 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 5, // 8 pipes (4 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 5, // 8 pipes (4 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 5, // 8 pipes (4 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 5, // 8 pipes (4 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 6, // 16 pipes (4 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 6, // 16 pipes (4 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 6, // 16 pipes (4 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 6, // 16 pipes (4 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 7, // 4 pipes (8 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 7, // 4 pipes (8 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 7, // 4 pipes (8 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 7, // 4 pipes (8 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 8, // 8 pipes (8 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 8, // 8 pipes (8 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 8, // 8 pipes (8 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 8, // 8 pipes (8 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 9, // 16 pipes (8 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 9, // 16 pipes (8 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 9, // 16 pipes (8 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 9, // 16 pipes (8 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 10, // 32 pipes (8 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 10, // 32 pipes (8 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 10, // 32 pipes (8 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 10, // 32 pipes (8 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 11, // 8 pipes (16 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 11, // 8 pipes (16 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 11, // 8 pipes (16 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 11, // 8 pipes (16 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 12, // 16 pipes (16 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 12, // 16 pipes (16 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 12, // 16 pipes (16 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 12, // 16 pipes (16 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 13, // 32 pipes (16 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 13, // 32 pipes (16 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 13, // 32 pipes (16 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 13, // 32 pipes (16 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 14, // 64 pipes (16 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 14, // 64 pipes (16 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 14, // 64 pipes (16 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 14, // 64 pipes (16 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 15, // 16 pipes (32 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 15, // 16 pipes (32 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 15, // 16 pipes (32 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 15, // 16 pipes (32 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 16, // 32 pipes (32 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 16, // 32 pipes (32 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 16, // 32 pipes (32 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 16, // 32 pipes (32 PKRs) 8xaa pa @ HTILE_64K @ Navi3x + 17, // 64 pipes (32 PKRs) 1xaa pa @ HTILE_64K @ Navi3x + 17, // 64 pipes (32 PKRs) 2xaa pa @ HTILE_64K @ Navi3x + 17, // 64 pipes (32 PKRs) 4xaa pa @ HTILE_64K @ Navi3x + 17, // 64 pipes (32 PKRs) 8xaa pa @ HTILE_64K @ Navi3x }; const UINT_64 GFX11_DCC_R_X_SW_PATTERN[][17] = diff --git a/src/amd/addrlib/src/gfx11/gfx11addrlib.cpp b/src/amd/addrlib/src/gfx11/gfx11addrlib.cpp index 3918720cfc3..6331b300b55 100644 --- a/src/amd/addrlib/src/gfx11/gfx11addrlib.cpp +++ b/src/amd/addrlib/src/gfx11/gfx11addrlib.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -15,6 +15,7 @@ #include "gfx11addrlib.h" #include "gfx11_gb_reg.h" +#include "addrswizzler.h" #include "amdgpu_asic_addr.h" @@ -1874,7 +1875,7 @@ ADDR_E_RETURNCODE Gfx11Lib::HwlComputeSlicePipeBankXor( if (pPatInfo != NULL) { - ADDR_BIT_SETTING fullSwizzlePattern[20]; + ADDR_BIT_SETTING fullSwizzlePattern[ADDR_MAX_EQUATION_BIT]; GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); const UINT_32 pipeBankXorOffset = @@ -2751,7 +2752,7 @@ ADDR_E_RETURNCODE Gfx11Lib::HwlGetPreferredSurfaceSetting( } // Select the biggest allowed block type - minSizeBlk = Log2NonPow2(allowedBlockSet.value) + 1; + minSizeBlk = Log2(allowedBlockSet.value) + 1; if (minSizeBlk == static_cast(AddrBlockMaxTiledType)) { @@ -2897,7 +2898,7 @@ ADDR_E_RETURNCODE Gfx11Lib::HwlGetPreferredSurfaceSetting( // Determine swizzle mode now. Always select the "largest" swizzle mode for a given block type + // swizzle type combination. E.g, for AddrBlockThin64KB + ADDR_SW_S, select SW_64KB_S_X(25) if it's // available, or otherwise select SW_64KB_S_T(17) if it's available, or otherwise select SW_64KB_S(9). - pOut->swizzleMode = static_cast(Log2NonPow2(allowedSwModeSet.value)); + pOut->swizzleMode = static_cast(Log2(allowedSwModeSet.value)); } } else @@ -3690,6 +3691,245 @@ ADDR_E_RETURNCODE Gfx11Lib::HwlComputeSurfaceAddrFromCoordTiled( return ret; } +/** +************************************************************************************************************************ +* Gfx11Lib::HwlCopyMemToSurface +* +* @brief +* Copy multiple regions from memory to a non-linear surface. +* +* @return +* Error or success. +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlCopyMemToSurface( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount + ) const +{ + // Copy memory to tiled surface. We will use the 'swizzler' object to dispatch to a version of the copy routine + // optimized for a particular micro-swizzle mode if available. + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR2_MIP_INFO mipInfo[MaxMipLevels] = {{0}}; + ADDR_ASSERT(pIn->numMipLevels <= MaxMipLevels); + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numSamples > 1) + { + // TODO: MSAA + returnCode = ADDR_NOTIMPLEMENTED; + } + if (IsBlockVariable(pIn->swizzleMode)) + { + // TODO: larger LUTs for worst-case 256KB swizzle. + returnCode = ADDR_NOTIMPLEMENTED; + } + + localIn.size = sizeof(localIn); + localIn.flags = pIn->flags; + localIn.swizzleMode = pIn->swizzleMode; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unAlignedDims.width, 1u); + localIn.height = Max(pIn->unAlignedDims.height, 1u); + localIn.numSlices = Max(pIn->unAlignedDims.depth, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + + localOut.size = sizeof(localOut); + localOut.pMipInfo = mipInfo; + + if (returnCode == ADDR_OK) + { + returnCode = ComputeSurfaceInfo(&localIn, &localOut); + } + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(pIn->swizzleMode, + pIn->resourceType, + Log2(pIn->bpp >> 3), + pIn->numSamples); + + ADDR_BIT_SETTING fullSwizzlePattern[ADDR_MAX_EQUATION_BIT] = {}; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + ADDR_EXTENT3D blockExtent = { + localOut.blockWidth, + localOut.blockHeight, + localOut.blockSlices + }; + + LutAddresser addresser = LutAddresser(); + addresser.Init(fullSwizzlePattern, ADDR_MAX_EQUATION_BIT, blockExtent, blkSizeLog2); + UnalignedCopyMemImgFunc pfnCopyUnaligned = addresser.GetCopyMemImgFunc(); + if (pfnCopyUnaligned == nullptr) + { + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + for (UINT_32 regionIdx = 0; regionIdx < regionCount; regionIdx++) + { + const ADDR2_COPY_MEMSURFACE_REGION* pCurRegion = &pRegions[regionIdx]; + const ADDR2_MIP_INFO* pMipInfo = &mipInfo[pCurRegion->mipId]; + UINT_64 mipOffset = pIn->singleSubres ? 0 : pMipInfo->macroBlockOffset; + UINT_32 yBlks = pMipInfo->pitch / localOut.blockWidth; + + UINT_32 xStart = pCurRegion->x + pMipInfo->mipTailCoordX; + UINT_32 yStart = pCurRegion->y + pMipInfo->mipTailCoordY; + UINT_32 sliceStart = pCurRegion->slice + pMipInfo->mipTailCoordZ; + + for (UINT_32 slice = sliceStart; slice < (sliceStart + pCurRegion->copyDims.depth); slice++) + { + // The copy functions take the base address of the hardware slice, not the logical slice. Those are + // not the same thing in 3D swizzles. Logical slices within 3D swizzles are handled by sliceXor + // for unaligned copies. + UINT_32 sliceBlkStart = PowTwoAlignDown(slice, localOut.blockSlices); + UINT_32 sliceXor = pIn->pbXor ^ addresser.GetAddressZ(slice); + + UINT_64 memOffset = ((slice - pCurRegion->slice) * pCurRegion->memSlicePitch); + UINT_64 imgOffset = mipOffset + (sliceBlkStart * localOut.sliceSize); + + ADDR_COORD2D sliceOrigin = { xStart, yStart }; + ADDR_EXTENT2D sliceExtent = { pCurRegion->copyDims.width, pCurRegion->copyDims.height }; + + pfnCopyUnaligned(VoidPtrInc(pIn->pMappedSurface, imgOffset), + VoidPtrInc(pCurRegion->pMem, memOffset), + pCurRegion->memRowPitch, + yBlks, + sliceOrigin, + sliceExtent, + sliceXor, + addresser); + } + } + } + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx11Lib::HwlCopySurfaceToMem +* +* @brief +* Copy multiple regions from a non-linear surface to memory. +* +* @return +* Error or success. +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx11Lib::HwlCopySurfaceToMem( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount + ) const +{ + // Copy memory to tiled surface. We will use the 'swizzler' object to dispatch to a version of the copy routine + // optimized for a particular micro-swizzle mode if available. + ADDR2_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR2_MIP_INFO mipInfo[MaxMipLevels] = {{0}}; + ADDR_ASSERT(pIn->numMipLevels <= MaxMipLevels); + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numSamples > 1) + { + // TODO: MSAA + returnCode = ADDR_NOTIMPLEMENTED; + } + if (IsBlockVariable(pIn->swizzleMode)) + { + // TODO: larger LUTs for worst-case 256KB swizzle. + returnCode = ADDR_NOTIMPLEMENTED; + } + + localIn.size = sizeof(localIn); + localIn.flags = pIn->flags; + localIn.swizzleMode = pIn->swizzleMode; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unAlignedDims.width, 1u); + localIn.height = Max(pIn->unAlignedDims.height, 1u); + localIn.numSlices = Max(pIn->unAlignedDims.depth, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + + localOut.size = sizeof(localOut); + localOut.pMipInfo = mipInfo; + + if (returnCode == ADDR_OK) + { + returnCode = ComputeSurfaceInfo(&localIn, &localOut); + } + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(pIn->swizzleMode, + pIn->resourceType, + Log2(pIn->bpp >> 3), + pIn->numSamples); + + ADDR_BIT_SETTING fullSwizzlePattern[ADDR_MAX_EQUATION_BIT] = {}; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + ADDR_EXTENT3D blockExtent = { + localOut.blockWidth, + localOut.blockHeight, + localOut.blockSlices + }; + + LutAddresser addresser = LutAddresser(); + addresser.Init(fullSwizzlePattern, ADDR_MAX_EQUATION_BIT, blockExtent, blkSizeLog2); + UnalignedCopyMemImgFunc pfnCopyUnaligned = addresser.GetCopyImgMemFunc(); + if (pfnCopyUnaligned == nullptr) + { + ADDR_ASSERT_ALWAYS(); + returnCode = ADDR_INVALIDPARAMS; + } + + if (returnCode == ADDR_OK) + { + for (UINT_32 regionIdx = 0; regionIdx < regionCount; regionIdx++) + { + const ADDR2_COPY_MEMSURFACE_REGION* pCurRegion = &pRegions[regionIdx]; + const ADDR2_MIP_INFO* pMipInfo = &mipInfo[pCurRegion->mipId]; + UINT_64 mipOffset = pIn->singleSubres ? 0 : pMipInfo->macroBlockOffset; + UINT_32 yBlks = pMipInfo->pitch / localOut.blockWidth; + + UINT_32 xStart = pCurRegion->x + pMipInfo->mipTailCoordX; + UINT_32 yStart = pCurRegion->y + pMipInfo->mipTailCoordY; + UINT_32 sliceStart = pCurRegion->slice + pMipInfo->mipTailCoordZ; + + for (UINT_32 slice = sliceStart; slice < (sliceStart + pCurRegion->copyDims.depth); slice++) + { + // The copy functions take the base address of the hardware slice, not the logical slice. Those are + // not the same thing in 3D swizzles. Logical slices within 3D swizzles are handled by sliceXor + // for unaligned copies. + UINT_32 sliceBlkStart = PowTwoAlignDown(slice, localOut.blockSlices); + UINT_32 sliceXor = pIn->pbXor ^ addresser.GetAddressZ(slice); + + UINT_64 memOffset = ((slice - pCurRegion->slice) * pCurRegion->memSlicePitch); + UINT_64 imgOffset = mipOffset + (sliceBlkStart * localOut.sliceSize); + + ADDR_COORD2D sliceOrigin = { xStart, yStart }; + ADDR_EXTENT2D sliceExtent = { pCurRegion->copyDims.width, pCurRegion->copyDims.height }; + + pfnCopyUnaligned(VoidPtrInc(pIn->pMappedSurface, imgOffset), + VoidPtrInc(pCurRegion->pMem, memOffset), + pCurRegion->memRowPitch, + yBlks, + sliceOrigin, + sliceExtent, + sliceXor, + addresser); + } + } + } + return returnCode; +} + + /** ************************************************************************************************************************ * Gfx11Lib::ComputeOffsetFromEquation @@ -3740,107 +3980,6 @@ UINT_32 Gfx11Lib::ComputeOffsetFromEquation( return offset; } -/** -************************************************************************************************************************ -* Gfx11Lib::ComputeOffsetFromSwizzlePattern -* -* @brief -* Compute offset from swizzle pattern -* -* @return -* Offset -************************************************************************************************************************ -*/ -UINT_32 Gfx11Lib::ComputeOffsetFromSwizzlePattern( - const UINT_64* pPattern, ///< Swizzle pattern - UINT_32 numBits, ///< Number of bits in pattern - UINT_32 x, ///< x coord in pixel - UINT_32 y, ///< y coord in pixel - UINT_32 z, ///< z coord in slice - UINT_32 s ///< sample id - ) const -{ - UINT_32 offset = 0; - const ADDR_BIT_SETTING* pSwizzlePattern = reinterpret_cast(pPattern); - - for (UINT_32 i = 0; i < numBits; i++) - { - UINT_32 v = 0; - - if (pSwizzlePattern[i].x != 0) - { - UINT_16 mask = pSwizzlePattern[i].x; - UINT_32 xBits = x; - - while (mask != 0) - { - if (mask & 1) - { - v ^= xBits & 1; - } - - xBits >>= 1; - mask >>= 1; - } - } - - if (pSwizzlePattern[i].y != 0) - { - UINT_16 mask = pSwizzlePattern[i].y; - UINT_32 yBits = y; - - while (mask != 0) - { - if (mask & 1) - { - v ^= yBits & 1; - } - - yBits >>= 1; - mask >>= 1; - } - } - - if (pSwizzlePattern[i].z != 0) - { - UINT_16 mask = pSwizzlePattern[i].z; - UINT_32 zBits = z; - - while (mask != 0) - { - if (mask & 1) - { - v ^= zBits & 1; - } - - zBits >>= 1; - mask >>= 1; - } - } - - if (pSwizzlePattern[i].s != 0) - { - UINT_16 mask = pSwizzlePattern[i].s; - UINT_32 sBits = s; - - while (mask != 0) - { - if (mask & 1) - { - v ^= sBits & 1; - } - - sBits >>= 1; - mask >>= 1; - } - } - - offset |= (v << i); - } - - return offset; -} - /** ************************************************************************************************************************ * Gfx11Lib::GetSwizzlePatternInfo @@ -4200,7 +4339,7 @@ ADDR_E_RETURNCODE Gfx11Lib::ComputeSurfaceAddrFromCoordMacroTiled( const UINT_32 xb = pIn->x / localOut.blockWidth; const UINT_64 blkIdx = yb * pb + xb; - ADDR_BIT_SETTING fullSwizzlePattern[20]; + ADDR_BIT_SETTING fullSwizzlePattern[ADDR_MAX_EQUATION_BIT]; GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); const UINT_32 blkOffset = diff --git a/src/amd/addrlib/src/gfx11/gfx11addrlib.h b/src/amd/addrlib/src/gfx11/gfx11addrlib.h index 2c54444a901..3eb127bd6a8 100644 --- a/src/amd/addrlib/src/gfx11/gfx11addrlib.h +++ b/src/amd/addrlib/src/gfx11/gfx11addrlib.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -300,6 +300,16 @@ protected: const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; + virtual ADDR_E_RETURNCODE HwlCopyMemToSurface( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const; + + virtual ADDR_E_RETURNCODE HwlCopySurfaceToMem( + const ADDR2_COPY_MEMSURFACE_INPUT* pIn, + const ADDR2_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const; + virtual UINT_32 HwlComputeMaxBaseAlignments() const; virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const; @@ -328,14 +338,6 @@ private: const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; - UINT_32 ComputeOffsetFromSwizzlePattern( - const UINT_64* pPattern, - UINT_32 numBits, - UINT_32 x, - UINT_32 y, - UINT_32 z, - UINT_32 s) const; - UINT_32 ComputeOffsetFromEquation( const ADDR_EQUATION* pEq, UINT_32 x, @@ -373,7 +375,7 @@ private: VOID GetSwizzlePatternFromPatternInfo( const ADDR_SW_PATINFO* pPatInfo, - ADDR_BIT_SETTING (&pSwizzle)[20]) const + ADDR_BIT_SETTING (&pSwizzle)[ADDR_MAX_EQUATION_BIT]) const { memcpy(pSwizzle, GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx], diff --git a/src/amd/addrlib/src/gfx12/gfx12SwizzlePattern.h b/src/amd/addrlib/src/gfx12/gfx12SwizzlePattern.h index b29fbb8ef47..a6d5a7c9799 100644 --- a/src/amd/addrlib/src/gfx12/gfx12SwizzlePattern.h +++ b/src/amd/addrlib/src/gfx12/gfx12SwizzlePattern.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2022-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/src/gfx12/gfx12addrlib.cpp b/src/amd/addrlib/src/gfx12/gfx12addrlib.cpp index c9c1afb9a04..290df68ae6a 100644 --- a/src/amd/addrlib/src/gfx12/gfx12addrlib.cpp +++ b/src/amd/addrlib/src/gfx12/gfx12addrlib.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2022-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -15,6 +15,7 @@ #include "gfx12addrlib.h" #include "gfx12_gb_reg.h" +#include "addrswizzler.h" #include "amdgpu_asic_addr.h" @@ -187,7 +188,7 @@ VOID Gfx12Lib::InitEquationTable() // Skip linear equation (data table is not useful for 2D/3D images-- only contains x-coordinate bits) if (IsValidSwMode(swMode) && (IsLinear(swMode) == false)) { - const UINT_32 maxMsaa = Is2dSwizzle(swMode) ? MaxMsaaRateLog2 : 1; + const UINT_32 maxMsaa = Is2dSwizzle(swMode) ? MaxNumMsaaRates : 1; for (UINT_32 msaaIdx = 0; msaaIdx < maxMsaa; msaaIdx++) { @@ -266,7 +267,7 @@ VOID Gfx12Lib::InitBlockDimensionTable() if (IsValidSwMode(swMode)) { surfaceInfo.swizzleMode = swMode; - const UINT_32 maxMsaa = Is2dSwizzle(swMode) ? MaxMsaaRateLog2 : 1; + const UINT_32 maxMsaa = Is2dSwizzle(swMode) ? MaxNumMsaaRates : 1; for (UINT_32 msaaIdx = 0; msaaIdx < maxMsaa; msaaIdx++) { @@ -621,10 +622,9 @@ ADDR_E_RETURNCODE Gfx12Lib::HwlComputeSurfaceInfo( // Slices must be exact multiples of the block sizes. However: // - with 3D images, one block will contain multiple slices, so that needs to be taken into account. - // - // Note that with linear images that have only one slice, we can always guarantee pOut->sliceSize is 256B - // alignment so there is no need to worry about it. - ADDR_ASSERT(((pOut->sliceSize * pOut->blockExtent.depth) % GetBlockSize(pSurfInfo->swizzleMode)) == 0); + // - with linear images that have only one slice, we may trim and use the pitch alignment for size. + ADDR_ASSERT(((pOut->sliceSize * pOut->blockExtent.depth) % + GetBlockSize(pSurfInfo->swizzleMode, CanTrimLinearPadding(pSurfInfo))) == 0); } return returnCode; @@ -880,6 +880,231 @@ ADDR_E_RETURNCODE Gfx12Lib::HwlComputeSurfaceAddrFromCoordTiled( return ret; } +/** +************************************************************************************************************************ +* Gfx12Lib::HwlCopyMemToSurface +* +* @brief +* Copy multiple regions from memory to a non-linear surface. +* +* @return +* Error or success. +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx12Lib::HwlCopyMemToSurface( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount + ) const +{ + // Copy memory to tiled surface. We will use the 'swizzler' object to dispatch to a version of the copy routine + // optimized for a particular micro-swizzle mode if available. + ADDR3_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR3_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR3_MIP_INFO mipInfo[MaxMipLevels] = {{0}}; + ADDR_ASSERT(pIn->numMipLevels <= MaxMipLevels); + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numSamples > 1) + { + // TODO: MSAA + returnCode = ADDR_NOTIMPLEMENTED; + } + + localIn.size = sizeof(localIn); + localIn.flags = pIn->flags; + localIn.swizzleMode = pIn->swizzleMode; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unAlignedDims.width, 1u); + localIn.height = Max(pIn->unAlignedDims.height, 1u); + localIn.numSlices = Max(pIn->unAlignedDims.depth, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + + localOut.size = sizeof(localOut); + localOut.pMipInfo = mipInfo; + + if (returnCode == ADDR_OK) + { + returnCode = ComputeSurfaceInfo(&localIn, &localOut); + } + + LutAddresser addresser = LutAddresser(); + UnalignedCopyMemImgFunc pfnCopyUnaligned = nullptr; + if (returnCode == ADDR_OK) + { + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(pIn->swizzleMode, + Log2(pIn->bpp >> 3), + pIn->numSamples); + + ADDR_BIT_SETTING fullSwizzlePattern[Log2Size256K] = {}; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + addresser.Init(fullSwizzlePattern, Log2Size256K, localOut.blockExtent, blkSizeLog2); + pfnCopyUnaligned = addresser.GetCopyMemImgFunc(); + if (pfnCopyUnaligned == nullptr) + { + ADDR_ASSERT_ALWAYS(); // What format is this? + returnCode = ADDR_INVALIDPARAMS; + } + } + + if (returnCode == ADDR_OK) + { + for (UINT_32 regionIdx = 0; regionIdx < regionCount; regionIdx++) + { + const ADDR3_COPY_MEMSURFACE_REGION* pCurRegion = &pRegions[regionIdx]; + const ADDR3_MIP_INFO* pMipInfo = &mipInfo[pCurRegion->mipId]; + UINT_64 mipOffset = pIn->singleSubres ? 0 : pMipInfo->macroBlockOffset; + UINT_32 yBlks = pMipInfo->pitch / localOut.blockExtent.width; + + UINT_32 xStart = pCurRegion->x + pMipInfo->mipTailCoordX; + UINT_32 yStart = pCurRegion->y + pMipInfo->mipTailCoordY; + UINT_32 sliceStart = pCurRegion->slice + pMipInfo->mipTailCoordZ; + + for (UINT_32 slice = sliceStart; slice < (sliceStart + pCurRegion->copyDims.depth); slice++) + { + // The copy functions take the base address of the hardware slice, not the logical slice. Those are + // not the same thing in 3D swizzles. Logical slices within 3D swizzles are handled by sliceXor + // for unaligned copies. + UINT_32 sliceBlkStart = PowTwoAlignDown(slice, localOut.blockExtent.depth); + UINT_32 sliceXor = pIn->pbXor ^ addresser.GetAddressZ(slice); + + UINT_64 memOffset = ((slice - pCurRegion->slice) * pCurRegion->memSlicePitch); + UINT_64 imgOffset = mipOffset + (sliceBlkStart * localOut.sliceSize); + + ADDR_COORD2D sliceOrigin = { xStart, yStart }; + ADDR_EXTENT2D sliceExtent = { pCurRegion->copyDims.width, pCurRegion->copyDims.height }; + + pfnCopyUnaligned(VoidPtrInc(pIn->pMappedSurface, imgOffset), + VoidPtrInc(pCurRegion->pMem, memOffset), + pCurRegion->memRowPitch, + yBlks, + sliceOrigin, + sliceExtent, + sliceXor, + addresser); + } + } + } + return returnCode; +} + +/** +************************************************************************************************************************ +* Gfx12Lib::HwlCopySurfaceToMem +* +* @brief +* Copy multiple regions from a non-linear surface to memory. +* +* @return +* Error or success. +************************************************************************************************************************ +*/ +ADDR_E_RETURNCODE Gfx12Lib::HwlCopySurfaceToMem( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount + ) const +{ + // Copy memory to tiled surface. We will use the 'swizzler' object to dispatch to a version of the copy routine + // optimized for a particular micro-swizzle mode if available. + ADDR3_COMPUTE_SURFACE_INFO_INPUT localIn = {0}; + ADDR3_COMPUTE_SURFACE_INFO_OUTPUT localOut = {0}; + ADDR3_MIP_INFO mipInfo[MaxMipLevels] = {{0}}; + ADDR_ASSERT(pIn->numMipLevels <= MaxMipLevels); + ADDR_E_RETURNCODE returnCode = ADDR_OK; + + if (pIn->numSamples > 1) + { + // TODO: MSAA + returnCode = ADDR_NOTIMPLEMENTED; + } + + localIn.size = sizeof(localIn); + localIn.flags = pIn->flags; + localIn.swizzleMode = pIn->swizzleMode; + localIn.resourceType = pIn->resourceType; + localIn.format = pIn->format; + localIn.bpp = pIn->bpp; + localIn.width = Max(pIn->unAlignedDims.width, 1u); + localIn.height = Max(pIn->unAlignedDims.height, 1u); + localIn.numSlices = Max(pIn->unAlignedDims.depth, 1u); + localIn.numMipLevels = Max(pIn->numMipLevels, 1u); + localIn.numSamples = Max(pIn->numSamples, 1u); + + localOut.size = sizeof(localOut); + localOut.pMipInfo = mipInfo; + + if (returnCode == ADDR_OK) + { + returnCode = ComputeSurfaceInfo(&localIn, &localOut); + } + + LutAddresser addresser = LutAddresser(); + UnalignedCopyMemImgFunc pfnCopyUnaligned = nullptr; + if (returnCode == ADDR_OK) + { + const UINT_32 blkSizeLog2 = GetBlockSizeLog2(pIn->swizzleMode); + const ADDR_SW_PATINFO* pPatInfo = GetSwizzlePatternInfo(pIn->swizzleMode, + Log2(pIn->bpp >> 3), + pIn->numSamples); + + ADDR_BIT_SETTING fullSwizzlePattern[Log2Size256K] = {}; + GetSwizzlePatternFromPatternInfo(pPatInfo, fullSwizzlePattern); + addresser.Init(fullSwizzlePattern, Log2Size256K, localOut.blockExtent, blkSizeLog2); + pfnCopyUnaligned = addresser.GetCopyImgMemFunc(); + if (pfnCopyUnaligned == nullptr) + { + ADDR_ASSERT_ALWAYS(); // What format is this? + returnCode = ADDR_INVALIDPARAMS; + } + } + + if (returnCode == ADDR_OK) + { + for (UINT_32 regionIdx = 0; regionIdx < regionCount; regionIdx++) + { + const ADDR3_COPY_MEMSURFACE_REGION* pCurRegion = &pRegions[regionIdx]; + const ADDR3_MIP_INFO* pMipInfo = &mipInfo[pCurRegion->mipId]; + UINT_64 mipOffset = pIn->singleSubres ? 0 : pMipInfo->macroBlockOffset; + UINT_32 yBlks = pMipInfo->pitch / localOut.blockExtent.width; + + UINT_32 xStart = pCurRegion->x + pMipInfo->mipTailCoordX; + UINT_32 yStart = pCurRegion->y + pMipInfo->mipTailCoordY; + UINT_32 sliceStart = pCurRegion->slice + pMipInfo->mipTailCoordZ; + + for (UINT_32 slice = sliceStart; slice < (sliceStart + pCurRegion->copyDims.depth); slice++) + { + // The copy functions take the base address of the hardware slice, not the logical slice. Those are + // not the same thing in 3D swizzles. Logical slices within 3D swizzles are handled by sliceXor + // for unaligned copies. + UINT_32 sliceBlkStart = PowTwoAlignDown(slice, localOut.blockExtent.depth); + UINT_32 sliceXor = pIn->pbXor ^ addresser.GetAddressZ(slice); + + UINT_64 memOffset = ((slice - pCurRegion->slice) * pCurRegion->memSlicePitch); + UINT_64 imgOffset = mipOffset + (sliceBlkStart * localOut.sliceSize); + + ADDR_COORD2D sliceOrigin = { xStart, yStart }; + ADDR_EXTENT2D sliceExtent = { pCurRegion->copyDims.width, pCurRegion->copyDims.height }; + + pfnCopyUnaligned(VoidPtrInc(pIn->pMappedSurface, imgOffset), + VoidPtrInc(pCurRegion->pMem, memOffset), + pCurRegion->memRowPitch, + yBlks, + sliceOrigin, + sliceExtent, + sliceXor, + addresser); + } + } + } + return returnCode; +} + + /** ************************************************************************************************************************ * Gfx12Lib::HwlComputePipeBankXor @@ -1768,43 +1993,36 @@ ADDR_E_RETURNCODE Gfx12Lib::HwlGetPossibleSwizzleModes( pOut->validModes.sw2d64kB = 1; pOut->validModes.sw2d256kB = 1; } - // Block-compressed images need to be either using 2D or linear swizzle modes. - else if (flags.blockCompressed) + // Some APIs (like Vulkan) require that PRT should always use 64KB blocks + else if (flags.standardPrt) { - pOut->validModes.swLinear = 1; - - // We find cases where Tex3d BlockCompressed image adopts 2D_256B should be prohibited. - if (IsTex3d(pIn->resourceType) == FALSE) + if (IsTex3d(pIn->resourceType) && (flags.view3dAs2dArray == 0)) { - pOut->validModes.sw2d256B = 1; + pOut->validModes.sw3d64kB = 1; + } + else + { + pOut->validModes.sw2d64kB = 1; } - pOut->validModes.sw2d4kB = 1; - pOut->validModes.sw2d64kB = 1; - pOut->validModes.sw2d256kB = 1; } - else if (IsTex1d(pIn->resourceType)) + else if (// Block-compressed images need to be either using 2D or linear swizzle modes. + flags.blockCompressed || + // Only 3D w/ view3dAs2dArray == 0 will use 1D/2D block swizzle modes + (IsTex3d(pIn->resourceType) == FALSE) || flags.view3dAs2dArray || + // NV12 and P010 support + // SW_LINEAR, SW_256B_2D, SW_4KB_2D, SW_64KB_2D, SW_256KB_2D + // There could be more multimedia formats that require more hw specific tiling modes... + flags.nv12 || flags.p010) { - pOut->validModes.swLinear = 1; - pOut->validModes.sw2d256B = 1; - pOut->validModes.sw2d4kB = 1; - pOut->validModes.sw2d64kB = 1; - pOut->validModes.sw2d256kB = 1; - } - else if (flags.nv12 || flags.p010 || IsTex2d(pIn->resourceType) || flags.view3dAs2dArray) - { - // NV12 and P010 support - // SW_LINEAR, SW_256B_2D, SW_4KB_2D, SW_64KB_2D, SW_256KB_2D - // There could be more multimedia formats that require more hw specific tiling modes... - - // The exception is VRS images. // Linear is not allowed for VRS images. if (flags.isVrsImage == 0) { pOut->validModes.swLinear = 1; } - if (flags.view3dAs2dArray == 0) + + // 3D resources can't use SW_256B_2D + if (IsTex3d(pIn->resourceType) == FALSE) { - // ADDR3_256B_2D can't support 3D images. pOut->validModes.sw2d256B = 1; } pOut->validModes.sw2d4kB = 1; diff --git a/src/amd/addrlib/src/gfx12/gfx12addrlib.h b/src/amd/addrlib/src/gfx12/gfx12addrlib.h index 75e030a883e..e1f8fe35e20 100644 --- a/src/amd/addrlib/src/gfx12/gfx12addrlib.h +++ b/src/amd/addrlib/src/gfx12/gfx12addrlib.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2022-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -162,6 +162,16 @@ private: const ADDR3_COMPUTE_SURFACE_INFO_PARAMS_INPUT* pIn, const ADDR3_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + virtual ADDR_E_RETURNCODE HwlCopyMemToSurface( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const override; + + virtual ADDR_E_RETURNCODE HwlCopySurfaceToMem( + const ADDR3_COPY_MEMSURFACE_INPUT* pIn, + const ADDR3_COPY_MEMSURFACE_REGION* pRegions, + UINT_32 regionCount) const override; + UINT_32 m_numSwizzleBits; // Initialize equation table diff --git a/src/amd/addrlib/src/gfx9/gfx9addrlib.cpp b/src/amd/addrlib/src/gfx9/gfx9addrlib.cpp index eaedbca831c..705792560ec 100644 --- a/src/amd/addrlib/src/gfx9/gfx9addrlib.cpp +++ b/src/amd/addrlib/src/gfx9/gfx9addrlib.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -3834,7 +3834,7 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting( } // Select the biggest allowed block type - minSizeBlk = Log2NonPow2(allowedBlockSet.value) + 1; + minSizeBlk = Log2(allowedBlockSet.value) + 1; if (minSizeBlk == static_cast(AddrBlockMaxTiledType)) { @@ -3960,7 +3960,7 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting( // Determine swizzle mode now. Always select the "largest" swizzle mode for a given block type + swizzle // type combination. For example, for AddrBlockThin64KB + ADDR_SW_S, select SW_64KB_S_X(25) if it's // available, or otherwise select SW_64KB_S_T(17) if it's available, or otherwise select SW_64KB_S(9). - pOut->swizzleMode = static_cast(Log2NonPow2(allowedSwModeSet.value)); + pOut->swizzleMode = static_cast(Log2(allowedSwModeSet.value)); } returnCode = ADDR_OK; diff --git a/src/amd/addrlib/src/gfx9/gfx9addrlib.h b/src/amd/addrlib/src/gfx9/gfx9addrlib.h index 6a0fa661acd..e6b7a446c9a 100644 --- a/src/amd/addrlib/src/gfx9/gfx9addrlib.h +++ b/src/amd/addrlib/src/gfx9/gfx9addrlib.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/src/r800/ciaddrlib.cpp b/src/amd/addrlib/src/r800/ciaddrlib.cpp index 1eedf94d1fc..4ebcd3c2ba8 100644 --- a/src/amd/addrlib/src/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/src/r800/ciaddrlib.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/src/r800/egbaddrlib.cpp b/src/amd/addrlib/src/r800/egbaddrlib.cpp index 4c285675eb5..3592ce36e9e 100644 --- a/src/amd/addrlib/src/r800/egbaddrlib.cpp +++ b/src/amd/addrlib/src/r800/egbaddrlib.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/src/r800/siaddrlib.cpp b/src/amd/addrlib/src/r800/siaddrlib.cpp index afe00ae81a3..e551b9016ba 100644 --- a/src/amd/addrlib/src/r800/siaddrlib.cpp +++ b/src/amd/addrlib/src/r800/siaddrlib.cpp @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ diff --git a/src/amd/addrlib/src/r800/siaddrlib.h b/src/amd/addrlib/src/r800/siaddrlib.h index d0dd841cebe..3ec09d693d2 100644 --- a/src/amd/addrlib/src/r800/siaddrlib.h +++ b/src/amd/addrlib/src/r800/siaddrlib.h @@ -1,7 +1,7 @@ /* ************************************************************************************************************************ * -* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved. +* Copyright (C) 2007-2024 Advanced Micro Devices, Inc. All rights reserved. * SPDX-License-Identifier: MIT * ***********************************************************************************************************************/ @@ -68,11 +68,10 @@ struct SiChipSettings UINT_32 isPolaris10 : 1; UINT_32 isPolaris11 : 1; UINT_32 isPolaris12 : 1; - // VI fusion UINT_32 isVegaM : 1; UINT_32 isCarrizo : 1; - UINT_32 : 2; + UINT_32 : 1; }; /** diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 8a779de901d..a9b1bae7876 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -3205,7 +3205,6 @@ static bool gfx12_compute_surface(struct ac_addrlib *addrlib, const struct radeo struct radeon_surf *surf) { bool compressed = surf->blk_w == 4 && surf->blk_h == 4; - bool is_color_surface = !(surf->flags & RADEON_SURF_Z_OR_SBUFFER); bool stencil_only = (surf->flags & RADEON_SURF_SBUFFER) && !(surf->flags & RADEON_SURF_ZBUFFER); ADDR3_COMPUTE_SURFACE_INFO_INPUT AddrSurfInfoIn = {0}; @@ -3220,13 +3219,11 @@ static bool gfx12_compute_surface(struct ac_addrlib *addrlib, const struct radeo AddrSurfInfoIn.bpp = surf->bpe * 8; } - AddrSurfInfoIn.flags.color = is_color_surface && !(surf->flags & RADEON_SURF_NO_RENDER_TARGET); - AddrSurfInfoIn.flags.depth = (surf->flags & RADEON_SURF_ZBUFFER) != 0; + AddrSurfInfoIn.flags.depth = !!(surf->flags & RADEON_SURF_ZBUFFER); AddrSurfInfoIn.flags.stencil = stencil_only; - AddrSurfInfoIn.flags.texture = !(surf->flags & RADEON_SURF_NO_TEXTURE); - AddrSurfInfoIn.flags.unordered = !(surf->flags & RADEON_SURF_NO_TEXTURE); AddrSurfInfoIn.flags.blockCompressed = compressed; AddrSurfInfoIn.flags.isVrsImage = !!(surf->flags & RADEON_SURF_VRS_RATE); + AddrSurfInfoIn.flags.standardPrt = !!(surf->flags & RADEON_SURF_PRT); if (config->is_3d) AddrSurfInfoIn.resourceType = ADDR_RSRC_TEX_3D; @@ -3254,11 +3251,6 @@ static bool gfx12_compute_surface(struct ac_addrlib *addrlib, const struct radeo AddrSurfInfoIn.swizzleMode = ac_get_modifier_swizzle_mode(info->gfx_level, surf->modifier); } else if (surf->flags & RADEON_SURF_IMPORTED) { AddrSurfInfoIn.swizzleMode = surf->u.gfx9.swizzle_mode; - } else if (surf->flags & RADEON_SURF_PRT) { - if (config->is_3d) - AddrSurfInfoIn.swizzleMode = ADDR3_64KB_3D; - else - AddrSurfInfoIn.swizzleMode = ADDR3_64KB_2D; } else if (mode == RADEON_SURF_MODE_LINEAR_ALIGNED) { assert(config->info.samples <= 1 && !(surf->flags & RADEON_SURF_Z_OR_SBUFFER)); AddrSurfInfoIn.swizzleMode = ADDR3_LINEAR; diff --git a/src/amd/common/ac_surface_modifier_test.c b/src/amd/common/ac_surface_modifier_test.c index 244366d2be0..e66863be23d 100644 --- a/src/amd/common/ac_surface_modifier_test.c +++ b/src/amd/common/ac_surface_modifier_test.c @@ -221,8 +221,6 @@ static void gfx12_generate_hash(struct ac_addrlib *ac_addrlib, ADDR3_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT input = {0}; input.size = sizeof(input); input.swizzleMode = surf->u.gfx9.swizzle_mode; - input.flags.color = 1; - input.flags.texture = 1; input.resourceType = ADDR_RSRC_TEX_2D; input.bpp = util_format_get_blocksizebits(entry->format); input.unAlignedDims.width = entry->w;