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i965/fs: Separate the sampler from the surface in generate_tex

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Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Jason Ekstrand 2015-11-02 15:24:05 -08:00
parent a37b8110c1
commit c0c14de130
2 changed files with 15 additions and 6 deletions
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1
src/mesa/drivers/dri/i965/brw_fs.h
View file

@ -448,6 +448,7 @@ private:
void generate_linterp(fs_inst *inst, struct brw_reg dst,
struct brw_reg *src);
void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
struct brw_reg surface_index,
struct brw_reg sampler_index);
void generate_get_buffer_size(fs_inst *inst, struct brw_reg dst,
struct brw_reg src,

20
src/mesa/drivers/dri/i965/brw_fs_generator.cpp
View file

@ -678,6 +678,7 @@ fs_generator::generate_get_buffer_size(fs_inst *inst,
void
fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,
struct brw_reg surface_index,
struct brw_reg sampler_index)
{
int msg_type = -1;
@ -933,14 +934,16 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
? prog_data->binding_table.gather_texture_start
: prog_data->binding_table.texture_start;
if (sampler_index.file == BRW_IMMEDIATE_VALUE) {
if (surface_index.file == BRW_IMMEDIATE_VALUE &&
sampler_index.file == BRW_IMMEDIATE_VALUE) {
uint32_t surface = surface_index.ud;
uint32_t sampler = sampler_index.ud;
brw_SAMPLE(p,
retype(dst, BRW_REGISTER_TYPE_UW),
inst->base_mrf,
src,
sampler + base_binding_table_index,
surface + base_binding_table_index,
sampler % 16,
msg_type,
rlen,
@ -949,19 +952,24 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
simd_mode,
return_format);
brw_mark_surface_used(prog_data, sampler + base_binding_table_index);
brw_mark_surface_used(prog_data, surface + base_binding_table_index);
} else {
/* Non-const sampler index */
struct brw_reg addr = vec1(retype(brw_address_reg(0), BRW_REGISTER_TYPE_UD));
struct brw_reg surface_reg = vec1(retype(surface_index, BRW_REGISTER_TYPE_UD));
struct brw_reg sampler_reg = vec1(retype(sampler_index, BRW_REGISTER_TYPE_UD));
brw_push_insn_state(p);
brw_set_default_mask_control(p, BRW_MASK_DISABLE);
brw_set_default_access_mode(p, BRW_ALIGN_1);
/* addr = ((sampler * 0x101) + base_binding_table_index) & 0xfff */
brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101));
if (memcmp(&surface_reg, &sampler_reg, sizeof(surface_reg)) == 0) {
brw_MUL(p, addr, sampler_reg, brw_imm_uw(0x101));
} else {
brw_SHL(p, addr, sampler_reg, brw_imm_ud(8));
brw_OR(p, addr, addr, surface_reg);
}
if (base_binding_table_index)
brw_ADD(p, addr, addr, brw_imm_ud(base_binding_table_index));
brw_AND(p, addr, addr, brw_imm_ud(0xfff));
@ -2070,7 +2078,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
case SHADER_OPCODE_TG4:
case SHADER_OPCODE_TG4_OFFSET:
case SHADER_OPCODE_SAMPLEINFO:
generate_tex(inst, dst, src[0], src[1]);
generate_tex(inst, dst, src[0], src[1], src[1]);
break;
case FS_OPCODE_DDX_COARSE:
case FS_OPCODE_DDX_FINE: