From c0823a2d31c995395a8d2567b0c14793e8b569ca Mon Sep 17 00:00:00 2001 From: Connor Abbott Date: Mon, 17 May 2021 16:38:26 +0200 Subject: [PATCH] ir3: Make branch conditions non-SSA In particular, make sure they have a physreg assigned. This was the last place after RA where SSA registers were created, which won't work with the new post-RA delay calculation that relies on the physreg. Part-of: --- src/freedreno/ir3/ir3_legalize.c | 8 ++++++-- src/freedreno/ir3/ir3_print.c | 14 ++++++++------ 2 files changed, 14 insertions(+), 8 deletions(-) diff --git a/src/freedreno/ir3/ir3_legalize.c b/src/freedreno/ir3/ir3_legalize.c index d7065066cc7..caeb4456b8a 100644 --- a/src/freedreno/ir3/ir3_legalize.c +++ b/src/freedreno/ir3/ir3_legalize.c @@ -627,12 +627,16 @@ block_sched(struct ir3 *ir) /* create "else" branch first (since "then" block should * frequently/always end up being a fall-thru): */ - br = ir3_B(block, block->condition, 0); + br = ir3_instr_create(block, OPC_B, 2); + ir3_reg_create(br, INVALID_REG, IR3_REG_DEST); + ir3_reg_create(br, regid(REG_P0, 0), 0)->def = block->condition->regs[0]; br->cat0.inv1 = true; br->cat0.target = block->successors[1]; /* "then" branch: */ - br = ir3_B(block, block->condition, 0); + br = ir3_instr_create(block, OPC_B, 2); + ir3_reg_create(br, INVALID_REG, IR3_REG_DEST); + ir3_reg_create(br, regid(REG_P0, 0), 0)->def = block->condition->regs[0]; br->cat0.target = block->successors[0]; } else if (block->successors[0]) { diff --git a/src/freedreno/ir3/ir3_print.c b/src/freedreno/ir3/ir3_print.c index 8814f760318..d1fac82498c 100644 --- a/src/freedreno/ir3/ir3_print.c +++ b/src/freedreno/ir3/ir3_print.c @@ -331,16 +331,18 @@ print_instr(struct ir3_instruction *instr, int lvl) printf(".%u", instr->cat0.idx); } if (brinfo[instr->cat0.brtype].nsrc >= 1) { - printf(" %sp0.%c ("SYN_SSA("ssa_%u")"),", + printf(" %sp0.%c (", instr->cat0.inv1 ? "!" : "", - "xyzw"[instr->cat0.comp1 & 0x3], - instr->regs[1]->def->instr->serialno); + "xyzw"[instr->cat0.comp1 & 0x3]); + print_reg_name(instr, instr->regs[1]); + printf("), "); } if (brinfo[instr->cat0.brtype].nsrc >= 2) { - printf(" %sp0.%c ("SYN_SSA("ssa_%u")"),", + printf(" %sp0.%c (", instr->cat0.inv2 ? "!" : "", - "xyzw"[instr->cat0.comp2 & 0x3], - instr->regs[2]->def->instr->serialno); + "xyzw"[instr->cat0.comp2 & 0x3]); + print_reg_name(instr, instr->regs[2]); + printf("), "); } } printf(" target=block%u", block_id(instr->cat0.target));