diff --git a/src/freedreno/ir3/ir3.c b/src/freedreno/ir3/ir3.c index 11d7054e173..4654eb9148b 100644 --- a/src/freedreno/ir3/ir3.c +++ b/src/freedreno/ir3/ir3.c @@ -442,17 +442,18 @@ struct ir3_instruction * ir3_instr_clone(struct ir3_instruction *instr) new_instr->regs_count = 0; new_instr->dsts_count = 0; new_instr->srcs_count = 0; - for (i = 0; i < instr->regs_count; i++) { - struct ir3_register *reg = instr->regs[i]; - struct ir3_register *new_reg; - if (reg->flags & IR3_REG_DEST) - new_reg = ir3_dst_create(new_instr, reg->num, reg->flags); - else - new_reg = ir3_src_create(new_instr, reg->num, reg->flags); + for (i = 0; i < instr->dsts_count; i++) { + struct ir3_register *reg = instr->dsts[i]; + struct ir3_register *new_reg = ir3_dst_create(new_instr, reg->num, reg->flags); *new_reg = *reg; - if ((new_reg->flags & IR3_REG_DEST) && new_reg->instr) + if (new_reg->instr) new_reg->instr = new_instr; } + for (i = 0; i < instr->srcs_count; i++) { + struct ir3_register *reg = instr->srcs[i]; + struct ir3_register *new_reg = ir3_src_create(new_instr, reg->num, reg->flags); + *new_reg = *reg; + } return new_instr; } diff --git a/src/freedreno/isa/encode.c b/src/freedreno/isa/encode.c index 1a29a53e78a..470c7d38fa3 100644 --- a/src/freedreno/isa/encode.c +++ b/src/freedreno/isa/encode.c @@ -52,7 +52,7 @@ extract_SRC1_R(struct ir3_instruction *instr) assert(!instr->repeat); return instr->nop & 0x1; } - return !!(instr->regs[1]->flags & IR3_REG_R); + return !!(instr->srcs[0]->flags & IR3_REG_R); } static inline bool @@ -63,8 +63,8 @@ extract_SRC2_R(struct ir3_instruction *instr) return (instr->nop >> 1) & 0x1; } /* src2 does not appear in all cat2, but SRC2_R does (for nop encoding) */ - if (instr->regs_count > 2) - return !!(instr->regs[2]->flags & IR3_REG_R); + if (instr->srcs_count > 1) + return !!(instr->srcs[1]->flags & IR3_REG_R); return 0; } @@ -97,7 +97,7 @@ __instruction_case(struct encode_state *s, struct ir3_instruction *instr) return OPC_BRAX; } } else if (instr->opc == OPC_MOV) { - struct ir3_register *src = instr->regs[1]; + struct ir3_register *src = instr->srcs[0]; if (src->flags & IR3_REG_IMMED) { return OPC_MOV_IMMED; } if (src->flags & IR3_REG_RELATIV) { @@ -157,15 +157,15 @@ extract_cat5_SRC(struct ir3_instruction *instr, unsigned n) if (instr->flags & IR3_INSTR_S2EN) { n++; } - if (n < instr->regs_count) - return instr->regs[n]; + if (n < instr->srcs_count) + return instr->srcs[n]; return NULL; } static inline bool extract_cat5_FULL(struct ir3_instruction *instr) { - struct ir3_register *reg = extract_cat5_SRC(instr, 1); + struct ir3_register *reg = extract_cat5_SRC(instr, 0); /* some cat5 have zero src regs, in which case 'FULL' is false */ if (!reg) return false; @@ -207,7 +207,7 @@ extract_cat5_DESC_MODE(struct ir3_instruction *instr) static inline unsigned extract_cat6_DESC_MODE(struct ir3_instruction *instr) { - struct ir3_register *ssbo = instr->regs[1]; + struct ir3_register *ssbo = instr->srcs[0]; if (ssbo->flags & IR3_REG_IMMED) { return 0; // todo enum } else if (instr->flags & IR3_INSTR_NONUNIF) { @@ -230,8 +230,8 @@ extract_cat6_SRC(struct ir3_instruction *instr, unsigned n) if (instr->flags & IR3_INSTR_G) { n++; } - assert(n < instr->regs_count); - return instr->regs[n]; + assert(n < instr->srcs_count); + return instr->srcs[n]; } typedef enum { diff --git a/src/freedreno/isa/ir3-cat1.xml b/src/freedreno/isa/ir3-cat1.xml index 2633894a05e..4ad4e7d7225 100644 --- a/src/freedreno/isa/ir3-cat1.xml +++ b/src/freedreno/isa/ir3-cat1.xml @@ -76,10 +76,10 @@ SOFTWARE. 001 - src->regs[1] - !!(src->regs[1]->flags & IR3_REG_R) + src->srcs[0] + !!(src->srcs[0]->flags & IR3_REG_R) !!(src->flags & IR3_INSTR_UL) - !!(src->regs[0]->flags & IR3_REG_RELATIV) + !!(src->dsts[0]->flags & IR3_REG_RELATIV) src->cat1.round @@ -354,7 +354,7 @@ SOFTWARE. 10 - src->regs[0] + src->dsts[0] @@ -377,9 +377,9 @@ SOFTWARE. 00 - src->regs[2] - src->regs[3] - src->regs[1] + src->srcs[0] + src->srcs[1] + src->dsts[1] @@ -402,10 +402,10 @@ SOFTWARE. 01 - src->regs[1] - src->regs[2] - src->regs[3] - src->regs[4] + src->srcs[0] + src->srcs[1] + src->srcs[2] + src->srcs[3] @@ -428,10 +428,10 @@ SOFTWARE. 10 - src->regs[4] - src->regs[1] - src->regs[2] - src->regs[3] + src->srcs[0] + src->dsts[1] + src->dsts[2] + src->dsts[3] @@ -463,7 +463,7 @@ SOFTWARE. the existing stuff: --> - util_last_bit(src->regs[0]->wrmask) - 1 + util_last_bit(src->dsts[0]->wrmask) - 1 diff --git a/src/freedreno/isa/ir3-cat2.xml b/src/freedreno/isa/ir3-cat2.xml index d62c933d3aa..204d641cbc3 100644 --- a/src/freedreno/isa/ir3-cat2.xml +++ b/src/freedreno/isa/ir3-cat2.xml @@ -60,11 +60,11 @@ SOFTWARE. !!(src->flags & IR3_INSTR_SAT) - ((src->regs[0]->num >> 2) == 62) ? 0 : - !!((src->regs[1]->flags ^ src->regs[0]->flags) & IR3_REG_HALF) + ((src->dsts[0]->num >> 2) == 62) ? 0 : + !!((src->srcs[0]->flags ^ src->dsts[0]->flags) & IR3_REG_HALF) - !!(src->regs[0]->flags & IR3_REG_EI) - !(src->regs[1]->flags & IR3_REG_HALF) + !!(src->dsts[0]->flags & IR3_REG_EI) + !(src->srcs[0]->flags & IR3_REG_HALF) extract_SRC1_R(src) extract_SRC2_R(src) diff --git a/src/freedreno/isa/ir3-cat3.xml b/src/freedreno/isa/ir3-cat3.xml index 8ae7d1e31d1..f59e0aa099e 100644 --- a/src/freedreno/isa/ir3-cat3.xml +++ b/src/freedreno/isa/ir3-cat3.xml @@ -132,16 +132,16 @@ SOFTWARE. - !!(src->regs[1]->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)) + !!(src->srcs[0]->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)) extract_SRC1_R(src) extract_SRC2_R(src) - !!(src->regs[3]->flags & IR3_REG_R) - !!(src->regs[2]->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)) - !!(src->regs[3]->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)) - src->regs[1] + !!(src->srcs[2]->flags & IR3_REG_R) + !!(src->srcs[1]->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)) + !!(src->srcs[2]->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)) + src->srcs[0] - ((src->regs[0]->num >> 2) == 62) ? 0 : - !!((src->regs[1]->flags ^ src->regs[0]->flags) & IR3_REG_HALF) + ((src->dsts[0]->num >> 2) == 62) ? 0 : + !!((src->srcs[0]->flags ^ src->dsts[0]->flags) & IR3_REG_HALF) diff --git a/src/freedreno/isa/ir3-cat4.xml b/src/freedreno/isa/ir3-cat4.xml index 9a1ea49b117..a9acda2d965 100644 --- a/src/freedreno/isa/ir3-cat4.xml +++ b/src/freedreno/isa/ir3-cat4.xml @@ -60,13 +60,13 @@ SOFTWARE. 100 - src->regs[1] + src->srcs[0] - ((src->regs[0]->num >> 2) == 62) ? 0 : - !!((src->regs[1]->flags ^ src->regs[0]->flags) & IR3_REG_HALF) + ((src->dsts[0]->num >> 2) == 62) ? 0 : + !!((src->srcs[0]->flags ^ src->dsts[0]->flags) & IR3_REG_HALF) - !(src->regs[1]->flags & IR3_REG_HALF) - !!(src->regs[1]->flags & IR3_REG_R) + !(src->srcs[0]->flags & IR3_REG_HALF) + !!(src->srcs[0]->flags & IR3_REG_R) diff --git a/src/freedreno/isa/ir3-cat5.xml b/src/freedreno/isa/ir3-cat5.xml index a1c2dea967a..a75c428d697 100644 --- a/src/freedreno/isa/ir3-cat5.xml +++ b/src/freedreno/isa/ir3-cat5.xml @@ -141,7 +141,7 @@ SOFTWARE. extract_cat5_FULL(src) src src - src->regs[0]->wrmask + src->dsts[0]->wrmask src src src->cat5.tex_base >> 1 @@ -153,12 +153,12 @@ SOFTWARE. !!(src->flags & IR3_INSTR_P) extract_cat5_DESC_MODE(src) - extract_cat5_SRC(src, 1) - extract_cat5_SRC(src, 2) - (src->regs_count > 1) ? src->regs[1] : NULL + extract_cat5_SRC(src, 0) + extract_cat5_SRC(src, 1) + (src->srcs_count > 0) ? src->srcs[0] : NULL diff --git a/src/freedreno/isa/ir3-cat6.xml b/src/freedreno/isa/ir3-cat6.xml index 5740cd2d92d..9283d30d653 100644 --- a/src/freedreno/isa/ir3-cat6.xml +++ b/src/freedreno/isa/ir3-cat6.xml @@ -70,10 +70,10 @@ SOFTWARE. 00 00000 - !(src->regs[2]->flags & IR3_REG_IMMED) - src->regs[2] - src->regs[2]->iim_val - src->regs[3]->uim_val + !(src->srcs[1]->flags & IR3_REG_IMMED) + src->srcs[1] + src->srcs[1]->iim_val + src->srcs[2]->uim_val @@ -110,11 +110,11 @@ SOFTWARE. x 00011 - src->regs[3]->uim_val - src->regs[4] + src->srcs[2]->uim_val + src->srcs[3] 1 - src->regs[2] - (src->flags & IR3_INSTR_G) && !(src->regs[4]->flags & IR3_REG_IMMED) + src->srcs[1] + (src->flags & IR3_INSTR_G) && !(src->srcs[3]->flags & IR3_REG_IMMED) src->cat6.dst_offset src->cat6.dst_offset >> 8 @@ -132,9 +132,9 @@ SOFTWARE. xxxxxxxxx xx - src->regs[2]->uim_val - src->regs[1] - src->regs[3]->uim_val + src->srcs[1]->uim_val + src->srcs[0] + src->srcs[2]->uim_val @@ -185,8 +185,8 @@ SOFTWARE. xx 11111 - src->regs[2]->uim_val - src->regs[1]->uim_val + src->srcs[1]->uim_val + src->srcs[0]->uim_val @@ -212,9 +212,9 @@ SOFTWARE. --> src->cat6.dst_offset >> 8 src->cat6.dst_offset & 0xff - src->regs[2] - src->regs[1]" - src->regs[3]->uim_val + src->srcs[1] + src->srcs[0]" + src->srcs[2]->uim_val @@ -279,8 +279,8 @@ SOFTWARE. xx 11100 - src->regs[1]->uim_val - src->regs[2] + src->srcs[0]->uim_val + src->srcs[1] @@ -309,8 +309,8 @@ SOFTWARE. 01111 src->cat6.d - 1 - src->regs[1] - !!(src->regs[1]->flags & IR3_REG_IMMED) + src->srcs[0] + !!(src->srcs[0]->flags & IR3_REG_IMMED) @@ -349,12 +349,12 @@ SOFTWARE. src->cat6.d - 1 src src->cat6.iim_val - 1 - src->regs[1] - !!(src->regs[1]->flags & IR3_REG_IMMED) - src->regs[2] - !!(src->regs[2]->flags & IR3_REG_IMMED) - src->regs[3] - !!(src->regs[3]->flags & IR3_REG_IMMED) + src->srcs[0] + !!(src->srcs[0]->flags & IR3_REG_IMMED) + src->srcs[1] + !!(src->srcs[1]->flags & IR3_REG_IMMED) + src->srcs[2] + !!(src->srcs[2]->flags & IR3_REG_IMMED) @@ -390,14 +390,14 @@ SOFTWARE. src->cat6.d - 1 src src->cat6.iim_val - 1 - src->regs[1] - !!(src->regs[1]->flags & IR3_REG_IMMED) - src->regs[2] - !!(src->regs[2]->flags & IR3_REG_IMMED) - src->regs[3] - !!(src->regs[3]->flags & IR3_REG_IMMED) - src->regs[4] - !!(src->regs[4]->flags & IR3_REG_IMMED) + src->srcs[0] + !!(src->srcs[0]->flags & IR3_REG_IMMED) + src->srcs[1] + !!(src->srcs[1]->flags & IR3_REG_IMMED) + src->srcs[2] + !!(src->srcs[2]->flags & IR3_REG_IMMED) + src->srcs[3] + !!(src->srcs[3]->flags & IR3_REG_IMMED) @@ -459,14 +459,14 @@ SOFTWARE. src src->cat6.d - 1 src->cat6.iim_val - 1 - src->regs[1] - !!(src->regs[1]->flags & IR3_REG_IMMED) - extract_cat6_SRC(src, 1) - !!(extract_cat6_SRC(src, 1)->flags & IR3_REG_IMMED) - extract_cat6_SRC(src, 2) - !!(extract_cat6_SRC(src, 2)->flags & IR3_REG_IMMED) - extract_cat6_SRC(src, 3) - !!(extract_cat6_SRC(src, 3)->flags & IR3_REG_IMMED) + src->srcs[0] + !!(src->srcs[0]->flags & IR3_REG_IMMED) + extract_cat6_SRC(src, 0) + !!(extract_cat6_SRC(src, 0)->flags & IR3_REG_IMMED) + extract_cat6_SRC(src, 1) + !!(extract_cat6_SRC(src, 1)->flags & IR3_REG_IMMED) + extract_cat6_SRC(src, 2) + !!(extract_cat6_SRC(src, 2)->flags & IR3_REG_IMMED) @@ -591,10 +591,10 @@ SOFTWARE. 1 0 - !!(src->regs[2]->flags & IR3_REG_IMMED) + !!(src->srcs[1]->flags & IR3_REG_IMMED) src->cat6.d - src->regs[2] - src->regs[1] + src->srcs[1] + src->srcs[0] @@ -664,8 +664,8 @@ SOFTWARE. src->cat6.d - 1 src - src->regs[1] - src->regs[2] + src->srcs[0] + src->srcs[1] @@ -693,9 +693,9 @@ SOFTWARE. src src->cat6.d - 1 - src->regs[1] - src->regs[3] - src->regs[2] + src->srcs[0] + src->srcs[2] + src->srcs[1] @@ -716,7 +716,7 @@ SOFTWARE. 000110 10 - src->regs[0] + src->dsts[0] @@ -869,4 +869,4 @@ SOFTWARE. - \ No newline at end of file + diff --git a/src/freedreno/isa/ir3.xml b/src/freedreno/isa/ir3.xml index fc5cb20885c..fc95e90298d 100644 --- a/src/freedreno/isa/ir3.xml +++ b/src/freedreno/isa/ir3.xml @@ -64,10 +64,10 @@ TODO: that are specific to a single instruction category, mappings should be defined at that level instead. --> - src->regs[0] - src->regs[1] - src->regs[2] - src->regs[3] + src->dsts[0] + src->srcs[0] + src->srcs[1] + src->srcs[2] src->repeat !!(src->flags & IR3_INSTR_SS) !!(src->flags & IR3_INSTR_JP)