From bff0ff5ae30830d9fdf28b2b243eea4742512f4e Mon Sep 17 00:00:00 2001
From: Rob Clark <robdclark@chromium.org>
Date: Fri, 5 Aug 2022 09:39:18 -0700
Subject: [PATCH] freedreno/ir3: Don't use negative opc for meta instructions
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Stricter compilers complain about this, ie:

  error: left operand of shift expression ‘(-1 << 7)’ is negative [-fpermissive]

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>
---
 src/freedreno/ir3/disasm-a3xx.c |  2 +-
 src/freedreno/ir3/instr-a3xx.h  | 17 +++++++++--------
 src/freedreno/ir3/ir3.c         |  2 +-
 src/freedreno/ir3/ir3.h         |  2 +-
 4 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/src/freedreno/ir3/disasm-a3xx.c b/src/freedreno/ir3/disasm-a3xx.c
index 4d54674b843..0e1227aa042 100644
--- a/src/freedreno/ir3/disasm-a3xx.c
+++ b/src/freedreno/ir3/disasm-a3xx.c
@@ -410,7 +410,7 @@ static const struct opc_info {
 const char *
 disasm_a3xx_instr_name(opc_t opc)
 {
-   if (opc_cat(opc) == -1)
+   if (opc_cat(opc) == OPC_META)
       return "??meta??";
    return opcs[opc].name;
 }
diff --git a/src/freedreno/ir3/instr-a3xx.h b/src/freedreno/ir3/instr-a3xx.h
index 57e90aa58ce..daa3ecb975f 100644
--- a/src/freedreno/ir3/instr-a3xx.h
+++ b/src/freedreno/ir3/instr-a3xx.h
@@ -367,9 +367,10 @@ typedef enum {
    OPC_DCINV           = _OPC(7, 5),
    OPC_DCFLU           = _OPC(7, 6),
 
-   /* meta instructions (category -1): */
+   /* meta instructions (category 8): */
+#define OPC_META 8
    /* placeholder instr to mark shader inputs: */
-   OPC_META_INPUT      = _OPC(-1, 0),
+   OPC_META_INPUT      = _OPC(OPC_META, 0),
    /* The "collect" and "split" instructions are used for keeping
     * track of instructions that write to multiple dst registers
     * (split) like texture sample instructions, or read multiple
@@ -378,13 +379,13 @@ typedef enum {
     * A "split" extracts a scalar component from a vecN, and a
     * "collect" gathers multiple scalar components into a vecN
     */
-   OPC_META_SPLIT      = _OPC(-1, 2),
-   OPC_META_COLLECT    = _OPC(-1, 3),
+   OPC_META_SPLIT      = _OPC(OPC_META, 2),
+   OPC_META_COLLECT    = _OPC(OPC_META, 3),
 
    /* placeholder for texture fetches that run before FS invocation
     * starts:
     */
-   OPC_META_TEX_PREFETCH = _OPC(-1, 4),
+   OPC_META_TEX_PREFETCH = _OPC(OPC_META, 4),
 
    /* Parallel copies have multiple destinations, and copy each destination
     * to its corresponding source. This happens "in parallel," meaning that
@@ -392,12 +393,12 @@ typedef enum {
     * is stored. These are produced in RA when register shuffling is
     * required, and then lowered away immediately afterwards.
     */
-   OPC_META_PARALLEL_COPY = _OPC(-1, 5),
-   OPC_META_PHI = _OPC(-1, 6),
+   OPC_META_PARALLEL_COPY = _OPC(OPC_META, 5),
+   OPC_META_PHI = _OPC(OPC_META, 6),
    /*
     * A manually encoded opcode
     */
-   OPC_META_RAW = _OPC(-1, 7)
+   OPC_META_RAW = _OPC(OPC_META, 7)
 } opc_t;
 /* clang-format on */
 
diff --git a/src/freedreno/ir3/ir3.c b/src/freedreno/ir3/ir3.c
index 6d66e2e7c1f..9746d335a64 100644
--- a/src/freedreno/ir3/ir3.c
+++ b/src/freedreno/ir3/ir3.c
@@ -340,7 +340,7 @@ ir3_collect_info(struct ir3_shader_variant *v)
             if (instr->opc == OPC_NOP) {
                nops_count = 1 + instr->repeat;
                info->instrs_per_cat[0] += nops_count;
-            } else {
+            } else if (!is_meta(instr)) {
                info->instrs_per_cat[opc_cat(instr->opc)] += 1 + instr->repeat;
                info->instrs_per_cat[0] += nops_count;
             }
diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h
index 170049143e3..8a84f6d66b5 100644
--- a/src/freedreno/ir3/ir3.h
+++ b/src/freedreno/ir3/ir3.h
@@ -1139,7 +1139,7 @@ cat4_full_opc(opc_t opc)
 static inline bool
 is_meta(struct ir3_instruction *instr)
 {
-   return (opc_cat(instr->opc) == -1);
+   return (opc_cat(instr->opc) == OPC_META);
 }
 
 static inline unsigned