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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-05 05:18:08 +02:00
nvk: Skip creating a nvkmd device if we don't have to
KHR_maintenance9 allows for the creation of VkDevices with no queues for the purpose of offline compilation and other similar usages. Notably, devices with 0 queues aren't allowed to allocate memory, create command buffers, or create fences/semaphores; this allows us to completely skip creating a nvkmd device and going through the kernel for these objects. Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35804>
This commit is contained in:
Mohamed Ahmed
Marge Bot
parent
969e639344
commit
bfc6ec0981
1 changed files with 135 additions and 123 deletions
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@ -157,122 +157,129 @@ nvk_CreateDevice(VkPhysicalDevice physicalDevice,
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dev->vk.shader_ops = &nvk_device_shader_ops;
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result = nvkmd_pdev_create_dev(pdev->nvkmd, &pdev->vk.base, &dev->nvkmd);
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if (result != VK_SUCCESS)
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goto fail_init;
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uint32_t queue_count = 0;
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for (uint32_t i = 0; i < pCreateInfo->queueCreateInfoCount; i++)
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queue_count += pCreateInfo->pQueueCreateInfos[i].queueCount;
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vk_device_set_drm_fd(&dev->vk, nvkmd_dev_get_drm_fd(dev->nvkmd));
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dev->vk.command_buffer_ops = &nvk_cmd_buffer_ops;
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dev->vk.get_timestamp = nvk_device_get_timestamp;
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dev->vk.copy_sync_payloads = vk_drm_syncobj_copy_payloads;
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result = nvk_upload_queue_init(dev, &dev->upload);
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if (result != VK_SUCCESS)
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goto fail_nvkmd;
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result = nvkmd_dev_alloc_mapped_mem(dev->nvkmd, &pdev->vk.base,
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0x1000, 0, NVKMD_MEM_LOCAL,
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NVKMD_MEM_MAP_WR, &dev->zero_page);
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if (result != VK_SUCCESS)
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goto fail_upload;
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memset(dev->zero_page->map, 0, 0x1000);
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nvkmd_mem_unmap(dev->zero_page, 0);
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result = nvk_descriptor_table_init(dev, &dev->images,
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sizeof(struct nil_descriptor),
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1024, 1024 * 1024);
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if (result != VK_SUCCESS)
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goto fail_zero_page;
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/* Reserve the descriptor at offset 0 to be the null descriptor */
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const struct nil_descriptor null_desc =
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nil_null_descriptor(&pdev->info, dev->zero_page->va->addr);
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ASSERTED uint32_t null_image_index;
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result = nvk_descriptor_table_add(dev, &dev->images,
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&null_desc, sizeof(null_desc),
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&null_image_index);
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assert(result == VK_SUCCESS);
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assert(null_image_index == 0);
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result = nvk_descriptor_table_init(dev, &dev->samplers,
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8 * 4 /* tsc entry size */,
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4096, 4096);
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if (result != VK_SUCCESS)
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goto fail_images;
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/* On Kepler and earlier, TXF takes a sampler but SPIR-V defines it as not
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* taking one so we need to reserve one at device create time. If we do so
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* now then it will always have sampler index 0 so we can rely on that in
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* the compiler lowering code (similar to null descriptors).
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*/
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if (pdev->info.cls_eng3d < MAXWELL_A) {
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const struct nvk_sampler_header txf_sampler = nvk_txf_sampler_header(pdev);
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ASSERTED uint32_t txf_sampler_index;
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result = nvk_descriptor_table_add(dev, &dev->samplers,
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&txf_sampler, sizeof(txf_sampler),
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&txf_sampler_index);
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assert(result == VK_SUCCESS);
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assert(txf_sampler_index == 0);
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}
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if (dev->vk.enabled_features.descriptorBuffer ||
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nvk_use_edb_buffer_views(pdev)) {
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result = nvk_edb_bview_cache_init(dev, &dev->edb_bview_cache);
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if (queue_count > 0) {
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result = nvkmd_pdev_create_dev(pdev->nvkmd, &pdev->vk.base, &dev->nvkmd);
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if (result != VK_SUCCESS)
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goto fail_samplers;
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}
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goto fail_init;
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/* If we have a full BAR, go ahead and do shader uploads on the CPU.
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* Otherwise, we fall back to doing shader uploads via the upload queue.
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*
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* Also, the I-cache pre-fetches and NVIDIA has informed us
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* overallocating shaders BOs by 2K is sufficient.
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*/
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enum nvkmd_mem_map_flags shader_map_flags = 0;
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if (pdev->info.bar_size_B >= pdev->info.vram_size_B)
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shader_map_flags = NVKMD_MEM_MAP_WR;
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result = nvk_heap_init(dev, &dev->shader_heap,
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NVKMD_MEM_LOCAL, shader_map_flags,
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2048 /* overalloc */,
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pdev->info.cls_eng3d < VOLTA_A);
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if (result != VK_SUCCESS)
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goto fail_edb_bview_cache;
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vk_device_set_drm_fd(&dev->vk, nvkmd_dev_get_drm_fd(dev->nvkmd));
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dev->vk.command_buffer_ops = &nvk_cmd_buffer_ops;
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result = nvk_heap_init(dev, &dev->event_heap,
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NVKMD_MEM_LOCAL, NVKMD_MEM_MAP_WR,
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0 /* overalloc */, false /* contiguous */);
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if (result != VK_SUCCESS)
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goto fail_shader_heap;
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dev->vk.get_timestamp = nvk_device_get_timestamp;
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dev->vk.copy_sync_payloads = vk_drm_syncobj_copy_payloads;
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if (pdev->info.cls_eng3d < MAXWELL_B) {
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result = nvk_heap_init(dev, &dev->qmd_heap,
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result = nvk_upload_queue_init(dev, &dev->upload);
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if (result != VK_SUCCESS)
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goto fail_nvkmd;
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result = nvkmd_dev_alloc_mapped_mem(dev->nvkmd, &pdev->vk.base,
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0x1000, 0, NVKMD_MEM_LOCAL,
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NVKMD_MEM_MAP_WR, &dev->zero_page);
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if (result != VK_SUCCESS)
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goto fail_upload;
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memset(dev->zero_page->map, 0, 0x1000);
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nvkmd_mem_unmap(dev->zero_page, 0);
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result = nvk_descriptor_table_init(dev, &dev->images,
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sizeof(struct nil_descriptor),
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1024, 1024 * 1024);
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if (result != VK_SUCCESS)
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goto fail_zero_page;
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/* Reserve the descriptor at offset 0 to be the null descriptor */
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const struct nil_descriptor null_desc =
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nil_null_descriptor(&pdev->info, dev->zero_page->va->addr);
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ASSERTED uint32_t null_image_index;
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result = nvk_descriptor_table_add(dev, &dev->images,
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&null_desc, sizeof(null_desc),
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&null_image_index);
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assert(result == VK_SUCCESS);
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assert(null_image_index == 0);
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result = nvk_descriptor_table_init(dev, &dev->samplers,
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8 * 4 /* tsc entry size */,
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4096, 4096);
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if (result != VK_SUCCESS)
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goto fail_images;
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/* On Kepler and earlier, TXF takes a sampler but SPIR-V defines it as
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* not taking one so we need to reserve one at device create time. If
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* we do so now then it will always have sampler index 0 so we can rely
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* on that in the compiler lowering code (similar to null descriptors).
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*/
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if (pdev->info.cls_eng3d < MAXWELL_A) {
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const struct nvk_sampler_header txf_sampler =
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nvk_txf_sampler_header(pdev);
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ASSERTED uint32_t txf_sampler_index;
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result = nvk_descriptor_table_add(dev, &dev->samplers,
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&txf_sampler, sizeof(txf_sampler),
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&txf_sampler_index);
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assert(result == VK_SUCCESS);
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assert(txf_sampler_index == 0);
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}
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if (dev->vk.enabled_features.descriptorBuffer ||
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nvk_use_edb_buffer_views(pdev)) {
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result = nvk_edb_bview_cache_init(dev, &dev->edb_bview_cache);
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if (result != VK_SUCCESS)
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goto fail_samplers;
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}
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/* If we have a full BAR, go ahead and do shader uploads on the CPU.
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* Otherwise, we fall back to doing shader uploads via the upload queue.
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*
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* Also, the I-cache pre-fetches and NVIDIA has informed us
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* overallocating shaders BOs by 2K is sufficient.
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*/
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enum nvkmd_mem_map_flags shader_map_flags = 0;
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if (pdev->info.bar_size_B >= pdev->info.vram_size_B)
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shader_map_flags = NVKMD_MEM_MAP_WR;
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result = nvk_heap_init(dev, &dev->shader_heap,
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NVKMD_MEM_LOCAL, shader_map_flags,
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2048 /* overalloc */,
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pdev->info.cls_eng3d < VOLTA_A);
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if (result != VK_SUCCESS)
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goto fail_edb_bview_cache;
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result = nvk_heap_init(dev, &dev->event_heap,
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NVKMD_MEM_LOCAL, NVKMD_MEM_MAP_WR,
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0 /* overalloc */, false /* contiguous */);
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if (result != VK_SUCCESS)
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goto fail_event_heap;
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}
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goto fail_shader_heap;
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nvk_slm_area_init(&dev->slm);
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if (pdev->info.cls_eng3d >= FERMI_A &&
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pdev->info.cls_eng3d < MAXWELL_A) {
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/* max size is 256k */
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result = nvkmd_dev_alloc_mem(dev->nvkmd, &pdev->vk.base,
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256 * 1024, 0, NVKMD_MEM_LOCAL,
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&dev->vab_memory);
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if (result != VK_SUCCESS)
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goto fail_slm;
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}
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for (unsigned i = 0; i < pCreateInfo->queueCreateInfoCount; i++) {
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for (unsigned q = 0; q < pCreateInfo->pQueueCreateInfos[i].queueCount; q++) {
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result = nvk_queue_create(dev, &pCreateInfo->pQueueCreateInfos[i], q);
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if (pdev->info.cls_eng3d < MAXWELL_B) {
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result = nvk_heap_init(dev, &dev->qmd_heap,
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NVKMD_MEM_LOCAL, NVKMD_MEM_MAP_WR,
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0 /* overalloc */, false /* contiguous */);
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if (result != VK_SUCCESS)
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goto fail_queues;
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goto fail_event_heap;
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}
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nvk_slm_area_init(&dev->slm);
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if (pdev->info.cls_eng3d >= FERMI_A &&
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pdev->info.cls_eng3d < MAXWELL_A) {
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/* max size is 256k */
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result = nvkmd_dev_alloc_mem(dev->nvkmd, &pdev->vk.base,
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256 * 1024, 0, NVKMD_MEM_LOCAL,
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&dev->vab_memory);
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if (result != VK_SUCCESS)
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goto fail_slm;
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}
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for (unsigned i = 0; i < pCreateInfo->queueCreateInfoCount; i++) {
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for (unsigned q = 0; q < pCreateInfo->pQueueCreateInfos[i].queueCount; q++) {
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result = nvk_queue_create(dev, &pCreateInfo->pQueueCreateInfos[i], q);
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if (result != VK_SUCCESS)
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goto fail_queues;
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}
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}
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}
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@ -285,9 +292,11 @@ nvk_CreateDevice(VkPhysicalDevice physicalDevice,
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goto fail_queues;
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}
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result = nvk_device_init_meta(dev);
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if (result != VK_SUCCESS)
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goto fail_mem_cache;
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if (queue_count > 0) {
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result = nvk_device_init_meta(dev);
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if (result != VK_SUCCESS)
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goto fail_mem_cache;
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}
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*pDevice = nvk_device_to_handle(dev);
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@ -342,7 +351,8 @@ nvk_DestroyDevice(VkDevice _device, const VkAllocationCallbacks *pAllocator)
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if (dev->copy_queries)
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vk_shader_destroy(&dev->vk, &dev->copy_queries->vk, &dev->vk.alloc);
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nvk_device_finish_meta(dev);
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if (dev->nvkmd)
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nvk_device_finish_meta(dev);
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vk_pipeline_cache_destroy(dev->vk.mem_cache, NULL);
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@ -354,20 +364,22 @@ nvk_DestroyDevice(VkDevice _device, const VkAllocationCallbacks *pAllocator)
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if (dev->vab_memory)
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nvkmd_mem_unref(dev->vab_memory);
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/* Idle the upload queue before we tear down heaps */
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nvk_upload_queue_sync(dev, &dev->upload);
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if (dev->nvkmd) {
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/* Idle the upload queue before we tear down heaps */
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nvk_upload_queue_sync(dev, &dev->upload);
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nvk_slm_area_finish(&dev->slm);
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if (pdev->info.cls_eng3d < MAXWELL_B)
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nvk_heap_finish(dev, &dev->qmd_heap);
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nvk_heap_finish(dev, &dev->event_heap);
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nvk_heap_finish(dev, &dev->shader_heap);
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nvk_edb_bview_cache_finish(dev, &dev->edb_bview_cache);
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nvk_descriptor_table_finish(dev, &dev->samplers);
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nvk_descriptor_table_finish(dev, &dev->images);
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nvkmd_mem_unref(dev->zero_page);
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nvk_upload_queue_finish(dev, &dev->upload);
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nvkmd_dev_destroy(dev->nvkmd);
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nvk_slm_area_finish(&dev->slm);
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if (pdev->info.cls_eng3d < MAXWELL_B)
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nvk_heap_finish(dev, &dev->qmd_heap);
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nvk_heap_finish(dev, &dev->event_heap);
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nvk_heap_finish(dev, &dev->shader_heap);
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nvk_edb_bview_cache_finish(dev, &dev->edb_bview_cache);
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nvk_descriptor_table_finish(dev, &dev->samplers);
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nvk_descriptor_table_finish(dev, &dev->images);
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nvkmd_mem_unref(dev->zero_page);
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nvk_upload_queue_finish(dev, &dev->upload);
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nvkmd_dev_destroy(dev->nvkmd);
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}
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vk_device_finish(&dev->vk);
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vk_free(&dev->vk.alloc, dev);
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