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r100/r200: Share PolygonStripple code.

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This commit is contained in:
Pauli Nieminen 2009-08-28 04:58:50 +03:00
parent e541845959
commit bfbad4fbb7
5 changed files with 30 additions and 56 deletions
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32
src/mesa/drivers/dri/r200/r200_state.c
View file

@ -764,36 +764,6 @@ static void r200PolygonOffset( GLcontext *ctx,
rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_CONSTANT] = constant.ui32;
}
static void r200PolygonStipple( GLcontext *ctx, const GLubyte *mask )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
GLint i;
BATCH_LOCALS(&rmesa->radeon);
drm_radeon_stipple_t stipple;
radeon_firevertices(&rmesa->radeon);
BEGIN_BATCH_NO_AUTOSTATE(35);
OUT_BATCH(CP_PACKET0(R200_RE_STIPPLE_ADDR, 0));
OUT_BATCH(0x00000000);
OUT_BATCH(CP_PACKET0_ONE(R200_RE_STIPPLE_DATA, 31));
/* Must flip pattern upside down.
*/
for ( i = 31 ; i >= 0; i--) {
OUT_BATCH(((GLuint *) mask)[i]);
}
END_BATCH();
/* FIXME: Use window x,y offsets into stipple RAM.
*/
stipple.mask = rmesa->state.stipple.mask;
}
static void r200PolygonMode( GLcontext *ctx, GLenum face, GLenum mode )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
@ -2532,7 +2502,7 @@ void r200InitStateFuncs( struct dd_function_table *functions )
functions->LogicOpcode = r200LogicOpCode;
functions->PolygonMode = r200PolygonMode;
functions->PolygonOffset = r200PolygonOffset;
functions->PolygonStipple = r200PolygonStipple;
functions->PolygonStipple = radeonPolygonStipple;
functions->PointParameterfv = r200PointParameter;
functions->PointSize = r200PointSize;
functions->RenderMode = r200RenderMode;

25
src/mesa/drivers/dri/radeon/radeon_common.c
View file

@ -273,6 +273,31 @@ void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h)
}
}
void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
GLint i;
BATCH_LOCALS(radeon);
radeon_firevertices(radeon);
BEGIN_BATCH_NO_AUTOSTATE(35);
OUT_BATCH(CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0));
OUT_BATCH(0x00000000);
OUT_BATCH(CP_PACKET0_ONE(RADEON_RE_STIPPLE_DATA, 31));
/* Must flip pattern upside down.
*/
for ( i = 31 ; i >= 0; i--) {
OUT_BATCH(((GLuint *) mask)[i]);
}
END_BATCH();
}
/* ================================================================
* SwapBuffers with client-side throttling

1
src/mesa/drivers/dri/radeon/radeon_common.h
View file

@ -10,6 +10,7 @@ void radeonRecalcScissorRects(radeonContextPtr radeon);
void radeonSetCliprects(radeonContextPtr radeon);
void radeonUpdateScissor( GLcontext *ctx );
void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h);
void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask );
void radeonWaitForIdleLocked(radeonContextPtr radeon);
extern uint32_t radeonGetAge(radeonContextPtr radeon);

25
src/mesa/drivers/dri/radeon/radeon_state.c
View file

@ -550,31 +550,6 @@ static void radeonPolygonOffset( GLcontext *ctx,
rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_CONSTANT] = constant.ui32;
}
static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint i;
drm_radeon_stipple_t stipple;
/* Must flip pattern upside down.
*/
for ( i = 0 ; i < 32 ; i++ ) {
rmesa->state.stipple.mask[31 - i] = ((GLuint *) mask)[i];
}
/* TODO: push this into cmd mechanism
*/
radeon_firevertices(&rmesa->radeon);
LOCK_HARDWARE( &rmesa->radeon );
/* FIXME: Use window x,y offsets into stipple RAM.
*/
stipple.mask = rmesa->state.stipple.mask;
drmCommandWrite( rmesa->radeon.dri.fd, DRM_RADEON_STIPPLE,
&stipple, sizeof(drm_radeon_stipple_t) );
UNLOCK_HARDWARE( &rmesa->radeon );
}
static void radeonPolygonMode( GLcontext *ctx, GLenum face, GLenum mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);

3
src/mesa/drivers/dri/radeon/server/radeon_reg.h
View file

@ -1663,6 +1663,9 @@
# define RADEON_FORCE_Z_DIRTY (1 << 29)
# define RADEON_Z_WRITE_ENABLE (1 << 30)
# define RADEON_Z_DECOMPRESSION_ENABLE (1 << 31)
#define RADEON_RE_STIPPLE_ADDR 0x1cc8
#define RADEON_RE_STIPPLE_DATA 0x1ccc
#define RADEON_RE_LINE_PATTERN 0x1cd0
# define RADEON_LINE_PATTERN_MASK 0x0000ffff
# define RADEON_LINE_REPEAT_COUNT_SHIFT 16