From bf9fa6e6191dcf223d72ae7e1bea96a29bfefcbd Mon Sep 17 00:00:00 2001 From: Faith Ekstrand Date: Wed, 15 Apr 2026 08:50:53 -0400 Subject: [PATCH] pan/nir: Load texel buffer conversion descriptors in NIR Reviewed-by: Christoph Pillmayer Reviewed-by: Lorenzo Rossi Part-of: --- src/panfrost/compiler/bifrost/bifrost_nir.c | 6 ++-- src/panfrost/compiler/pan_nir.h | 34 +++++++++++++++++++++ 2 files changed, 37 insertions(+), 3 deletions(-) diff --git a/src/panfrost/compiler/bifrost/bifrost_nir.c b/src/panfrost/compiler/bifrost/bifrost_nir.c index b1da1e54fbb..bc7cfe7cccd 100644 --- a/src/panfrost/compiler/bifrost/bifrost_nir.c +++ b/src/panfrost/compiler/bifrost/bifrost_nir.c @@ -1100,7 +1100,7 @@ lower_texel_buffer_fetch(nir_builder *b, nir_tex_instr *tex, void *data) nir_def *loaded_mem; if (*arch >= 9) { - nir_def *icd = nir_load_texel_buf_conv_pan(b, res_handle); + nir_def *icd = pan_nir_load_va_buf_cvt(b, res_handle); loaded_mem = nir_load_global_cvt_pan(b, tex->def.num_components, tex->def.bit_size, texel_addr, icd, tex->dest_type); @@ -1153,7 +1153,7 @@ lower_buf_image_access(nir_builder *b, nir_intrinsic_instr *intr, void *data) case nir_intrinsic_image_load: { nir_def *icd; if (*arch >= 9) - icd = nir_load_texel_buf_conv_pan(b, res_handle); + icd = pan_nir_load_va_buf_cvt(b, res_handle); else icd = nir_channel(b, loaded_texel_addr, 2); nir_def *loaded_mem = nir_load_global_cvt_pan( @@ -1175,7 +1175,7 @@ lower_buf_image_access(nir_builder *b, nir_intrinsic_instr *intr, void *data) nir_def *value = intr->src[3].ssa; nir_def *icd; if (*arch >= 9) - icd = nir_load_texel_buf_conv_pan(b, res_handle); + icd = pan_nir_load_va_buf_cvt(b, res_handle); else icd = nir_channel(b, loaded_texel_addr, 2); nir_store_global_cvt_pan(b, value, texel_addr, icd, .src_type = 32); diff --git a/src/panfrost/compiler/pan_nir.h b/src/panfrost/compiler/pan_nir.h index afe170a8298..d4e963aef5a 100644 --- a/src/panfrost/compiler/pan_nir.h +++ b/src/panfrost/compiler/pan_nir.h @@ -57,6 +57,40 @@ pan_nir_res_handle(nir_builder *b, uint32_t table, } } +static nir_def * +pan_nir_load_va_desc(nir_builder *b, unsigned num_components, unsigned bit_size, + nir_def *handle, uint32_t offset) +{ + nir_def *table = nir_ushr_imm(b, handle, 24); + nir_def *index = nir_iand_imm(b, handle, 0x00ffffff); + + nir_def *table_handle = nir_ior_imm(b, table, pan_res_handle(62, 0)); + nir_def *table_offset = nir_iadd_imm(b, nir_imul_imm(b, index, 32), offset); + + assert(offset < 32); + return nir_load_ssbo(b, num_components, bit_size, + table_handle, table_offset, + .access = ACCESS_CAN_REORDER, + .align_mul = 32, + .align_offset = offset); +} + +static nir_def * +pan_nir_load_va_buf_cvt(nir_builder *b, nir_def *handle) +{ + /* Dword 7 of the buffer descriptor type is unused by hardware and is + * reserved for software to do whatever it wants with it. By convention, + * we place the conversion in dw7 so that we can fetch it from the shader. + */ + nir_def *cvt = pan_nir_load_va_desc(b, 1, 32, handle, 7 * 4); + + /* CONSTANT 0000 L */ + nir_def *zero_cvt = nir_imm_int(b, 95 << 12 | 231); + cvt = nir_bcsel(b, nir_ieq_imm(b, cvt, 0), zero_cvt, cvt); + + return cvt; +} + bool pan_nir_lower_bool_to_bitsize(nir_shader *shader); bool pan_nir_lower_vertex_id(nir_shader *shader);