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radeonsi: set correct pipe config for Hawaii in DB

Browse source 
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák 2013-12-27 19:17:47 +01:00
parent 2748b7da7e
commit bf3c361113
3 changed files with 26 additions and 15 deletions
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33
src/gallium/drivers/radeonsi/si_state.c
View file

@ -125,27 +125,30 @@ static unsigned cik_bank_wh(unsigned bankwh)
return bankwh;
}
static unsigned cik_db_pipe_config(unsigned tile_pipes,
unsigned num_rbs)
static unsigned cik_db_pipe_config(struct r600_screen *rscreen, unsigned tile_mode)
{
unsigned pipe_config;
if (rscreen->b.info.si_tile_mode_array_valid) {
uint32_t gb_tile_mode = rscreen->b.info.si_tile_mode_array[tile_mode];
switch (tile_pipes) {
return G_009910_PIPE_CONFIG(gb_tile_mode);
}
/* This is probably broken for a lot of chips, but it's only used
* if the kernel cannot return the tile mode array for CIK. */
switch (rscreen->b.info.r600_num_tile_pipes) {
case 16:
return V_02803C_X_ADDR_SURF_P16_32X32_16X16;
case 8:
pipe_config = V_02803C_X_ADDR_SURF_P8_32X32_16X16;
break;
return V_02803C_X_ADDR_SURF_P8_32X32_16X16;
case 4:
default:
if (num_rbs == 4)
pipe_config = V_02803C_X_ADDR_SURF_P4_16X16;
if (rscreen->b.info.r600_num_backends == 4)
return V_02803C_X_ADDR_SURF_P4_16X16;
else
pipe_config = V_02803C_X_ADDR_SURF_P4_8X16;
break;
return V_02803C_X_ADDR_SURF_P4_8X16;
case 2:
pipe_config = V_02803C_ADDR_SURF_P2;
break;
return V_02803C_ADDR_SURF_P2;
}
return pipe_config;
}
/*
@ -1798,8 +1801,8 @@ static void si_db(struct r600_context *rctx, struct si_pm4_state *pm4,
bankw = cik_bank_wh(bankw);
bankh = cik_bank_wh(bankh);
nbanks = cik_num_banks(rscreen->b.tiling_info.num_banks);
pipe_config = cik_db_pipe_config(rscreen->b.info.r600_num_tile_pipes,
rscreen->b.info.r600_num_backends);
tile_mode_index = si_tile_mode_index(rtex, level, false);
pipe_config = cik_db_pipe_config(rscreen, tile_mode_index);
db_depth_info |= S_02803C_ARRAY_MODE(array_mode) |
S_02803C_PIPE_CONFIG(pipe_config) |

5
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
View file

@ -418,6 +418,11 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_PIPES, NULL,
&ws->info.r600_max_pipes);
if (radeon_get_drm_value(ws->fd, RADEON_INFO_SI_TILE_MODE_ARRAY, NULL,
ws->info.si_tile_mode_array)) {
ws->info.si_tile_mode_array_valid = TRUE;
}
return TRUE;
}

3
src/gallium/winsys/radeon/drm/radeon_winsys.h
View file

@ -195,6 +195,9 @@ struct radeon_info {
boolean r600_backend_map_valid;
boolean r600_virtual_address;
boolean r600_has_dma;
boolean si_tile_mode_array_valid;
uint32_t si_tile_mode_array[32];
};
enum radeon_feature_id {