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radv: allow to force-enable LLVM internally for a specific shader stage
For ACO debugging purposes, developers only. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6208>
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e63a7882a0
commit
bea8930468
3 changed files with 29 additions and 16 deletions
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@ -2625,7 +2625,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
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pipeline->layout,
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&keys[MESA_SHADER_FRAGMENT],
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&infos[MESA_SHADER_FRAGMENT],
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pipeline->device->physical_device->use_llvm);
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radv_use_llvm_for_stage(pipeline->device, MESA_SHADER_FRAGMENT));
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/* TODO: These are no longer used as keys we should refactor this */
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keys[MESA_SHADER_VERTEX].vs_common_out.export_prim_id =
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@ -2677,7 +2677,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
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radv_nir_shader_info_pass(combined_nir[i],
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pipeline->layout, &key,
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&infos[MESA_SHADER_TESS_CTRL],
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pipeline->device->physical_device->use_llvm);
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radv_use_llvm_for_stage(pipeline->device, MESA_SHADER_TESS_CTRL));
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}
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keys[MESA_SHADER_TESS_EVAL].tes.num_patches =
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@ -2701,7 +2701,7 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
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pipeline->layout,
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&keys[pre_stage],
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&infos[MESA_SHADER_GEOMETRY],
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pipeline->device->physical_device->use_llvm);
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radv_use_llvm_for_stage(pipeline->device, MESA_SHADER_GEOMETRY));
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}
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filled_stages |= (1 << pre_stage);
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@ -2726,7 +2726,8 @@ radv_fill_shader_info(struct radv_pipeline *pipeline,
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radv_nir_shader_info_init(&infos[i]);
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radv_nir_shader_info_pass(nir[i], pipeline->layout,
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&keys[i], &infos[i], pipeline->device->physical_device->use_llvm);
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&keys[i], &infos[i],
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radv_use_llvm_for_stage(pipeline->device, i));
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}
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for (int i = 0; i < MESA_SHADER_STAGES; i++) {
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@ -2936,7 +2937,7 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline,
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/* do this again since information such as outputs_read can be out-of-date */
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nir_shader_gather_info(nir[i], nir_shader_get_entrypoint(nir[i]));
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if (device->physical_device->use_llvm) {
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if (radv_use_llvm_for_stage(device, i)) {
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NIR_PASS_V(nir[i], nir_lower_bool_to_int32);
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} else {
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NIR_PASS_V(nir[i], nir_lower_non_uniform_access,
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@ -2994,7 +2995,8 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline,
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radv_nir_shader_info_pass(nir[MESA_SHADER_GEOMETRY],
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pipeline->layout, &key,
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&info, pipeline->device->physical_device->use_llvm);
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&info,
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radv_use_llvm_for_stage(pipeline->device, MESA_SHADER_GEOMETRY));
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info.wave_size = 64; /* Wave32 not supported. */
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info.ballot_bit_size = 64;
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@ -5513,7 +5515,7 @@ VkResult radv_GetPipelineExecutableInternalRepresentationsKHR(
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/* backend IR */
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if (p < end) {
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p->isText = true;
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if (pipeline->device->physical_device->use_llvm) {
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if (radv_use_llvm_for_stage(pipeline->device, stage)) {
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desc_copy(p->name, "LLVM IR");
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desc_copy(p->description, "The LLVM IR after some optimizations");
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} else {
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@ -2604,6 +2604,16 @@ static inline uint32_t si_translate_stencil_op(enum VkStencilOp op)
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}
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}
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/**
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* Helper used for debugging compiler issues by enabling/disabling LLVM for a
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* specific shader stage (developers only).
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*/
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static inline bool
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radv_use_llvm_for_stage(struct radv_device *device, UNUSED gl_shader_stage stage)
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{
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return device->physical_device->use_llvm;
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}
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#define RADV_DEFINE_HANDLE_CASTS(__radv_type, __VkType) \
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\
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static inline struct __radv_type * \
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@ -311,8 +311,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
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{
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nir_shader *nir;
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const nir_shader_compiler_options *nir_options =
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device->physical_device->use_llvm ? &nir_options_llvm :
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&nir_options_aco;
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radv_use_llvm_for_stage(device, stage) ? &nir_options_llvm : &nir_options_aco;
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if (module->nir) {
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/* Some things such as our meta clear/blit code will give us a NIR
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@ -464,7 +463,7 @@ radv_shader_compile_to_nir(struct radv_device *device,
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NIR_PASS_V(nir, nir_split_per_member_structs);
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if (nir->info.stage == MESA_SHADER_FRAGMENT &&
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!device->physical_device->use_llvm)
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!radv_use_llvm_for_stage(device, nir->info.stage))
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NIR_PASS_V(nir, nir_lower_io_to_vector, nir_var_shader_out);
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if (nir->info.stage == MESA_SHADER_FRAGMENT)
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NIR_PASS_V(nir, nir_lower_input_attachments, true);
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@ -1170,11 +1169,11 @@ shader_variant_compile(struct radv_device *device,
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shader_count >= 2 ? shaders[shader_count - 2]->info.stage
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: MESA_SHADER_VERTEX);
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if (device->physical_device->use_llvm ||
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if (radv_use_llvm_for_stage(device, stage) ||
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options->dump_shader || options->record_ir)
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ac_init_llvm_once();
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if (device->physical_device->use_llvm) {
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if (radv_use_llvm_for_stage(device, stage)) {
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llvm_compile_shader(device, shader_count, shaders, &binary, &args);
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} else {
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aco_compile_shader(shader_count, shaders, &binary, &args);
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@ -1232,16 +1231,17 @@ radv_shader_variant_compile(struct radv_device *device,
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bool keep_shader_info, bool keep_statistic_info,
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struct radv_shader_binary **binary_out)
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{
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gl_shader_stage stage = shaders[shader_count - 1]->info.stage;
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struct radv_nir_compiler_options options = {0};
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options.layout = layout;
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if (key)
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options.key = *key;
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options.explicit_scratch_args = !device->physical_device->use_llvm;
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options.explicit_scratch_args = !radv_use_llvm_for_stage(device, stage);
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options.robust_buffer_access = device->robust_buffer_access;
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return shader_variant_compile(device, module, shaders, shader_count, shaders[shader_count - 1]->info.stage, info,
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return shader_variant_compile(device, module, shaders, shader_count, stage, info,
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&options, false, keep_shader_info, keep_statistic_info, binary_out);
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}
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@ -1254,11 +1254,12 @@ radv_create_gs_copy_shader(struct radv_device *device,
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bool multiview)
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{
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struct radv_nir_compiler_options options = {0};
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gl_shader_stage stage = MESA_SHADER_VERTEX;
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options.explicit_scratch_args = !device->physical_device->use_llvm;
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options.explicit_scratch_args = !radv_use_llvm_for_stage(device, stage);
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options.key.has_multiview_view_index = multiview;
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return shader_variant_compile(device, NULL, &shader, 1, MESA_SHADER_VERTEX,
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return shader_variant_compile(device, NULL, &shader, 1, stage,
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info, &options, true, keep_shader_info, keep_statistic_info, binary_out);
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}
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