nir, tu: Add and use load_frag_coord_gmem_ir3

We used load_frag_coord_unscaled_ir3 for loading the fragment coord for
input attachments in GMEM, where the normal scaling for gl_FragCoord
shouldn't be used. However with custom resolve a different scaling will
apply to attachments in GMEM. Separate "unscaled" from "gmem" and rename
the NIR options, in preparation for this.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38451>
This commit is contained in:
Connor Abbott 2025-11-05 16:21:40 -05:00 committed by Marge Bot
parent cd1e784148
commit bd821b9a17
5 changed files with 21 additions and 13 deletions

View file

@ -6043,8 +6043,8 @@ bool nir_lower_idiv(nir_shader *shader, const nir_lower_idiv_options *options);
typedef struct nir_input_attachment_options {
bool use_ia_coord_intrin;
bool use_view_id_for_layer;
bool unscaled_depth_stencil_ir3;
uint32_t unscaled_input_attachment_ir3;
bool gmem_depth_stencil_ir3;
uint32_t gmem_input_attachment_ir3;
} nir_input_attachment_options;
bool nir_lower_input_attachments(nir_shader *shader,

View file

@ -848,6 +848,7 @@ visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state)
case nir_intrinsic_load_frag_coord_w:
case nir_intrinsic_load_frag_coord_zw_pan:
case nir_intrinsic_load_frag_coord_unscaled_ir3:
case nir_intrinsic_load_frag_coord_gmem_ir3:
case nir_intrinsic_load_pixel_coord:
case nir_intrinsic_load_fully_covered:
case nir_intrinsic_load_sample_pos:

View file

@ -1509,6 +1509,8 @@ system_value("subgroup_id_shift_ir3", 1)
# System values for freedreno fragment shaders.
intrinsic("load_frag_coord_unscaled_ir3", dest_comp=4,
flags=[CAN_ELIMINATE, CAN_REORDER], bit_sizes=[32])
intrinsic("load_frag_coord_gmem_ir3", dest_comp=4,
flags=[CAN_ELIMINATE, CAN_REORDER], bit_sizes=[32])
# Per-view gl_FragSizeEXT and gl_FragCoord offset.
intrinsic("load_frag_size_ir3", src_comp=[1], dest_comp=2, indices=[RANGE],

View file

@ -29,21 +29,21 @@ load_frag_coord(nir_builder *b, nir_deref_instr *deref,
const nir_input_attachment_options *options)
{
nir_def *frag_coord = nir_load_frag_coord(b);
if (options->unscaled_input_attachment_ir3 ||
options->unscaled_depth_stencil_ir3) {
if (options->gmem_input_attachment_ir3 ||
options->gmem_depth_stencil_ir3) {
nir_variable *var = nir_deref_instr_get_variable(deref);
unsigned base = var->data.index;
nir_def *unscaled_frag_coord = nir_load_frag_coord_unscaled_ir3(b);
nir_def *gmem_frag_coord = nir_load_frag_coord_gmem_ir3(b);
if (deref->deref_type == nir_deref_type_array &&
options->unscaled_input_attachment_ir3) {
nir_def *unscaled =
nir_i2b(b, nir_iand(b, nir_ishr(b, nir_imm_int(b, options->unscaled_input_attachment_ir3 >> base), deref->arr.index.ssa),
options->gmem_input_attachment_ir3) {
nir_def *gmem =
nir_i2b(b, nir_iand(b, nir_ishr(b, nir_imm_int(b, options->gmem_input_attachment_ir3 >> base), deref->arr.index.ssa),
nir_imm_int(b, 1)));
frag_coord = nir_bcsel(b, unscaled, unscaled_frag_coord, frag_coord);
frag_coord = nir_bcsel(b, gmem, gmem_frag_coord, frag_coord);
} else {
assert(deref->deref_type == nir_deref_type_var);
bool unscaled = base == NIR_VARIABLE_NO_INDEX ? options->unscaled_depth_stencil_ir3 : ((options->unscaled_input_attachment_ir3 >> base) & 1);
frag_coord = unscaled ? unscaled_frag_coord : frag_coord;
bool gmem = base == NIR_VARIABLE_NO_INDEX ? options->gmem_depth_stencil_ir3 : ((options->gmem_input_attachment_ir3 >> base) & 1);
frag_coord = gmem ? gmem_frag_coord : frag_coord;
}
}
return frag_coord;

View file

@ -1160,6 +1160,7 @@ lower_fdm_filter(const nir_instr *instr, const void *data)
nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
return intrin->intrinsic == nir_intrinsic_load_frag_size ||
intrin->intrinsic == nir_intrinsic_load_frag_coord_gmem_ir3 ||
(intrin->intrinsic == nir_intrinsic_load_frag_coord &&
options->adjust_fragcoord);
}
@ -1209,6 +1210,10 @@ lower_fdm_instr(struct nir_builder *b, nir_instr *instr, void *data)
nir_channel(b, unscaled_coord, 3));
}
if (intrin->intrinsic == nir_intrinsic_load_frag_coord_gmem_ir3) {
return nir_load_frag_coord_unscaled_ir3(b);
}
assert(intrin->intrinsic == nir_intrinsic_load_frag_size);
return frag_size;
}
@ -2771,9 +2776,9 @@ tu_shader_create(struct tu_device *dev,
* multiview is enabled.
*/
.use_view_id_for_layer = key->multiview_mask != 0,
.unscaled_depth_stencil_ir3 =
.gmem_depth_stencil_ir3 =
key->dynamic_renderpass && !(key->read_only_input_attachments & 1),
.unscaled_input_attachment_ir3 =
.gmem_input_attachment_ir3 =
key->dynamic_renderpass ?
~(key->read_only_input_attachments >> 1) :
key->unscaled_input_fragcoord,