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brw: drop buggy SLM optimization
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This was incorrect for OpenCL due to the possibility of variable shared memory
existing despite shared_size == 0. Fortunately the optimization it was trying to
do should be done in NIR via nir_opt_barrier_modes so we can just drop the brw
code and move on with our merry lives. Fixes OpenCL tests on Iris:

non_uniform_work_group non_uniform_3d_barriers
basic async_strided_copy_local_to_global

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39795>
This commit is contained in:
Alyssa Rosenzweig 2026-02-09 18:53:03 -05:00 • committed by Marge Bot
parent a517184396
commit bd5ebbb2f8
1 changed files with 0 additions and 6 deletions
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6
src/intel/compiler/brw/brw_from_nir.cpp
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@ -5093,12 +5093,6 @@ brw_from_nir_emit_intrinsic(nir_to_brw_state &ntb,
if (opcode == BRW_OPCODE_NOP)
break;
if (s.nir->info.shared_size > 0) {
assert(mesa_shader_stage_uses_workgroup(s.stage));
} else {
slm_fence = false;
}
/* If the workgroup fits in a single HW thread, the messages for SLM are
* processed in-order and the shader itself is already synchronized so
* the memory fence is not necessary.