From bd516c65814d5fdd70ce655b447c8a3ed7c98bb3 Mon Sep 17 00:00:00 2001
From: Nanley Chery <nanley.g.chery@intel.com>
Date: Fri, 23 Jul 2021 16:37:47 -0700
Subject: [PATCH] intel/isl: Disable I915_FORMAT_MOD_Y_TILED on XeHP+

XeHP lacks support for Y-tiling.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12132>
---
 src/intel/isl/isl_drm.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/intel/isl/isl_drm.c b/src/intel/isl/isl_drm.c
index 4b539191ec8..760d75a2c04 100644
--- a/src/intel/isl/isl_drm.c
+++ b/src/intel/isl/isl_drm.c
@@ -150,6 +150,10 @@ isl_drm_modifier_get_score(const struct intel_device_info *devinfo,
    case I915_FORMAT_MOD_X_TILED:
       return 2;
    case I915_FORMAT_MOD_Y_TILED:
+      /* Gfx12.5 doesn't have Y-tiling. */
+      if (devinfo->verx10 >= 125)
+         return 0;
+
       return 3;
    case I915_FORMAT_MOD_Y_TILED_CCS:
       /* Gfx12's CCS layout differs from Gfx9-11. */