From bcfec61d1ee2675b8aaaf3adec8109ce6fa6c003 Mon Sep 17 00:00:00 2001 From: Sagar Ghuge Date: Mon, 14 Sep 2020 15:52:11 -0700 Subject: [PATCH] anv: Add driconf option to disable compression for 16bpp format MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On Fallout4, enabling HIZ_CCS_WT compression for D16_UNORM format regress the performance by 2%, in order to avoid that disable compression via driconf option. The experiment showed that, running Fallout4 with HIZ performs better than HIZ_CCS and HIZ_CCS_WT. Reason behind that is the benchmark uses the depth pass with D16_UNORM surfaces format which fills the L3 cache and next pass doesn't make use of it where we end up clearing cache. v2: - Don't add conditional check in isl (Nanley, Jason) - Move disable_d16unorm_compression flag to instance (Lionel) - Use plane_format.isl_format (Nanley) v3: - Add more descriptive comment (Marcin Ĺšlusarz) Signed-off-by: Sagar Ghuge Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/vulkan/anv_device.c | 3 +++ src/intel/vulkan/anv_image.c | 15 ++++++++++++++- src/intel/vulkan/anv_private.h | 1 + src/util/00-mesa-defaults.conf | 5 +++++ src/util/driconf.h | 8 ++++++++ 5 files changed, 31 insertions(+), 1 deletion(-) diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index c019703cd63..fe24730ecf5 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -53,6 +53,7 @@ static const driOptionDescription anv_dri_options[] = { DRI_CONF_SECTION_PERFORMANCE DRI_CONF_VK_X11_OVERRIDE_MIN_IMAGE_COUNT(0) DRI_CONF_VK_X11_STRICT_IMAGE_COUNT(false) + DRI_CONF_DISABLE_D16UNORM_COMPRESSION(false) DRI_CONF_SECTION_END DRI_CONF_SECTION_DEBUG @@ -781,6 +782,8 @@ VkResult anv_CreateInstance( VG(VALGRIND_CREATE_MEMPOOL(instance, 0, false)); anv_init_dri_options(instance); + instance->disable_d16unorm_compression = + driQueryOptionb(&instance->dri_options, "disable_d16unorm_compression"); *pInstance = anv_instance_to_handle(instance); diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c index 1324d97d654..ee6247f3610 100644 --- a/src/intel/vulkan/anv_image.c +++ b/src/intel/vulkan/anv_image.c @@ -420,7 +420,20 @@ add_aux_surface_if_supported(struct anv_device *device, * TODO: This is a heuristic trade-off; we haven't tuned it at all. */ assert(device->info.gen >= 12); - image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS_WT; + /* The experiment showed that running the benchmark with HIZ performs + * better than HIZ_CCS and HIZ_CCS_WT. Because the benchmark uses the + * depth pass with D16_UNORM surfaces format which fills the L3 cache + * and next pass doesn't make use of it where we end up clearing cache + * which results in performance regression. + * + * In order to avoid perf regression, disable HIZ_CCS_WT compression + * for D16_UNORM surface format on Fallout4 via driconf option. + */ + if (plane_format.isl_format == ISL_FORMAT_R16_UNORM && + device->physical->instance->disable_d16unorm_compression) + image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ; + else + image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS_WT; } else { assert(device->info.gen >= 12); image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS; diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 2935bef4bc2..aa216cb87c9 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -1171,6 +1171,7 @@ struct anv_instance { struct driOptionCache dri_options; struct driOptionCache available_dri_options; + bool disable_d16unorm_compression; }; VkResult anv_init_wsi(struct anv_physical_device *physical_device); diff --git a/src/util/00-mesa-defaults.conf b/src/util/00-mesa-defaults.conf index 2d21c9cbf6f..ba3fc5da401 100644 --- a/src/util/00-mesa-defaults.conf +++ b/src/util/00-mesa-defaults.conf @@ -733,6 +733,11 @@ TODO: document the other workarounds.