From bcdde99675d2721e30c2cdda4c7c964dc69c1cda Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 6 Nov 2022 21:42:38 -0500 Subject: [PATCH] radeonsi: don't convert to fp16 in the compute blit if not testing Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_compute_blit.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_compute_blit.c b/src/gallium/drivers/radeonsi/si_compute_blit.c index 84187a609a5..474e5f589c4 100644 --- a/src/gallium/drivers/radeonsi/si_compute_blit.c +++ b/src/gallium/drivers/radeonsi/si_compute_blit.c @@ -1158,10 +1158,17 @@ bool si_compute_blit(struct si_context *sctx, const struct pipe_blit_info *info, options.use_integer_one = util_format_is_pure_integer(info->dst.format) && options.last_src_channel < options.last_dst_channel && options.last_dst_channel == 3; - options.fp16_rtz = !util_format_is_pure_integer(info->dst.format) && - (dst_desc->channel[i].size <= 10 || - (dst_desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT && - dst_desc->channel[i].size <= 16)); + + /* WARNING: We only use this codepath for AMD_TEST to get results identical with the gfx blit, + * otherwise we wouldn't be able to fully validate whether everything else works. + * The test expects that the behavior is identical to u_blitter. + */ + if (testing) { + options.fp16_rtz = !util_format_is_pure_integer(info->dst.format) && + (dst_desc->channel[i].size <= 10 || + (dst_desc->channel[i].type == UTIL_FORMAT_TYPE_FLOAT && + dst_desc->channel[i].size <= 16)); + } struct hash_entry *entry = _mesa_hash_table_search(sctx->cs_blit_shaders, (void*)(uintptr_t)options.key);